开源软件构建与测试

We truncated the diff of some files because they were too big. If you want to see the full diff for every file, click here.

Changes of Revision 2

_service:extract_file:binutils.spec Deleted

@@ -1,551 +0,0 @@
-Summary: Binary utilities
-Name:    binutils
-Version: 2.37
-Release: 6
-License: GPLv3+
-URL:     https://sourceware.org/binutils
-
-Source:  https://ftp.gnu.org/gnu/binutils/binutils-%{version}.tar.xz
-
-# risc-v do not support gold linker.
-%ifnarch riscv64
-%bcond_without gold
-%else
-%bcond_with gold
-%endif
-
-Patch0:  binutils-2.20.51.0.2-libtool-lib64.patch
-Patch1:  export-demangle.h-in-devel-package.patch
-#BUZ:845084
-Patch2:  binutils-2.22.52.0.4-no-config-h-check.patch
-#BUG:1452111
-Patch3:  binutils-2.27-aarch64-ifunc.patch
-
-#PATCH-CVE-UPSTREAM
-Patch4:  CVE-2019-1010204.patch
-
-Patch5:  Fix-a-potential-use-of-an-uninitialised-value-in-the.patch
-Patch6:  backport-CVE-2021-45078.patch
-Patch7:  backport-0001-CVE-2021-42574.patch
-Patch8:  backport-0002-CVE-2021-42574.patch
-Patch9:  backport-0003-CVE-2021-42574.patch
-Patch10: bfd-Close-the-file-descriptor-if-there-is-no-archive.patch
-
-Provides: bundled(libiberty)
-
-Buildroot: %(mktemp -ud %{_tmppath}/%{name}-%{version}-%{release}-XXXXXX)
-
-BuildRequires: gcc, perl, sed, coreutils, dejagnu, zlib-devel, glibc-static, sharutils, bc, libstdc++-static
-BuildRequires: bison, m4, gcc-c++, gettext, flex, zlib-devel, texinfo >= 4.0, perl-podlators chrpath
-Requires(post): info coreutils chkconfig
-Requires(preun):info chkconfig
-
-%define _gnu %{nil}
-# The higher of these two numbers determines the default ld.
-%{!?ld_bfd_priority: %global ld_bfd_priority    50}
-
-%if %{with gold}
-%{!?ld_gold_priority:%global ld_gold_priority   30}
-%endif
-
-%description
-The GNU Binutils are a collection of binary tools. The main ones are:
-ld - the GNU linker.
-as - the GNU assembler.
-addr2line - Converts addresses into filenames and line numbers.
-ar - A utility for creating, modifying and extracting from archives.
-c++filt - Filter to demangle encoded C++ symbols.
-dlltool - Creates files for building and using DLLs.
-gold - A new, faster, ELF only linker, still in beta test.
-gprof - Displays profiling information.
-nlmconv - Converts object code into an NLM.
-nm - Lists symbols from object files.
-objcopy - Copies and translates object files.
-objdump - Displays information from object files.
-ranlib - Generates an index to the contents of an archive.
-readelf - Displays information from any ELF format object file.
-size - Lists the section sizes of an object or archive file.
-strings - Lists printable strings from files.
-trip - Discards symbols.
-windmc - A Windows compatible message compiler.
-windres - A compiler for Windows resource files.
-
-
-%package devel
-Summary: devel package including header files and libraries.
-Provides: binutils-static = %{version}-%{release}
-Requires: zlib-devel, binutils = %{version}-%{release}, coreutils
-Requires(post): info
-Requires(preun):info
-
-%description devel
-The devel package contains BFD and opcodes static and dynamic libraries.
-The static libraries are used by the dynamic libraries which are linkier
-scripts imported from glibc/Makerules.
-
-%package help
-Summary: binutils help
-
-%description help
-The help package contains man files.
-
-%prep
-%autosetup -n %{name}-%{version} -p1
-
-
-sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in}
-sed -i -e '/^libopcodes_la_$DEPENDENCIES\|LIBADD$/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in}
-perl -pi -e 's/i\3-7\86/i3456786/g' */conf*
-
-sed -i -e '/pagesize/s/0x1000,/0x10000,/' gold/aarch64.cc
-sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*aarch64.c
-
-sed -i -e 's/^ PACKAGE=/ PACKAGE=/' */configure
-# revert name change when testing.
-sed -i -e "2aDEJATOOL = binutils" binutils/Makefile.am
-sed -i -e "2aDEJATOOL = gas" gas/Makefile.am
-sed -i -e "2aDEJATOOL = ld" ld/Makefile.am
-sed -i -e "s/^DEJATOOL = .*/DEJATOOL = binutils/" binutils/Makefile.in
-sed -i -e "s/^DEJATOOL = .*/DEJATOOL = gas/" gas/Makefile.in
-sed -i -e "s/^DEJATOOL = .*/DEJATOOL = ld/" ld/Makefile.in
-
-touch */configure
-
-%build
-CARGS=
-case %{_target_platform} in i?86*|arm*|aarch64*|riscv64*)
-  CARGS="$CARGS --enable-64-bit-bfd"
-  ;;
-esac
-
-case %{_target_platform} in x86_64*|i?86*|aarch64*|riscv64*)
-  CARGS="$CARGS --enable-targets=x86_64-pep --enable-relro=yes"
-  ;;
-esac
-
-export CFLAGS="$RPM_OPT_FLAGS"
-export LDFLAGS=$RPM_LD_FLAGS
-
-%configure \
-  --quiet \
-  --build=%{_target_platform} --host=%{_target_platform} \
-  --target=%{_target_platform} \
-  --enable-ld \
-%if %{with gold}
-  --enable-gold=default \
-%endif
-  --with-sysroot=/ \
-  --enable-deterministic-archives=no \
-  --enable-lto \
-  --enable-compressed-debug-sections=none \
-  --enable-generate-build-notes=no \
-  $CARGS \
-  --enable-plugins \
-  --enable-shared
-
-%make_build %{_smp_mflags} tooldir=%{_prefix} all
-%make_build %{_smp_mflags} tooldir=%{_prefix} info
-
-%check
-make -k check < /dev/null || :
-cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum
-for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log}
-do
-  ln $file binutils-%{_target_platform}-$(basename $file) || :
-done
-tar cjf binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log}
-uuencode binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}.tar.bz2
-rm -f binutils-%{_target_platform}.tar.bz2 binutils-%{_target_platform}-*.{sum,log}
-
-%install
-%make_install DESTDIR=%{buildroot}
-
-make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info
-
-for library in bfd/libbfd.a libiberty/libiberty.a opcodes/libopcodes.a
-do
-  install -m 644 $library %{buildroot}%{_libdir}
-done
-
-install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include
-chmod +x %{buildroot}%{_libdir}/lib*.so*
-
-rm -f %{buildroot}%{_libdir}/lib{bfd,opcodes}.{so,la}
-
-#Remove rpath
-chrpath --delete %{buildroot}%{_bindir}/{ld.bfd,objcopy,addr2line,gprof,size,strings,c++filt,strip,as,objdump,nm,ranlib,ar,readelf}
-chrpath --delete %{buildroot}%{_libdir}/libopcodes-%{version}.so
-chrpath --delete %{buildroot}%{_libdir}/libctf.so.0.0.0
-
-mkdir -p %{buildroot}/etc/ld.so.conf.d
-echo "%{_libdir}" > %{buildroot}/etc/ld.so.conf.d/%{name}-%{_arch}.conf
-
-%ifarch %{ix86} x86_64 arm
-sed -i -e '/^#include "ansidecl.h"/{p;s~^.*$~#include <bits/wordsize.h>~;}' \
-    -e 's/^#define BFD_DEFAULT_TARGET_SIZE $32\|64$ *$/#define BFD_DEFAULT_TARGET_SIZE __WORDSIZE/' \
-    -e 's/^#define BFD_HOST_64BIT_LONG 01 *$/#define BFD_HOST_64BIT_LONG (__WORDSIZE == 64)/' \
-    -e 's/^#define BFD_HOST_64_BIT $long $\?long *$/#if __WORDSIZE == 32\
-#define BFD_HOST_64_BIT long long\
-#else\
-#define BFD_HOST_64_BIT long\
-#endif/' \
-    -e 's/^#define BFD_HOST_U_64_BIT unsigned $long $\?long *$/#define BFD_HOST_U_64_BIT unsigned BFD_HOST_64_BIT/' \
-    %{buildroot}%{_prefix}/include/bfd.h
-%endif
-touch -r bfd/bfd-in2.h %{buildroot}%{_prefix}/include/bfd.h
-
-# Generate libbfd.so and libopcodes.so
-
-%ifarch x86_64

_service:tar_scm:binutils.spec Added

@@ -0,0 +1,625 @@
+Summary: Binary utilities
+Name:    binutils
+Version: 2.37
+Release: 14
+License: GPLv3+
+URL:     https://sourceware.org/binutils
+
+Source:  https://ftp.gnu.org/gnu/binutils/binutils-%{version}.tar.xz
+
+# risc-v do not support gold linker.
+%ifnarch riscv64
+%bcond_without gold
+%else
+%bcond_with gold
+%endif
+
+Patch0:  binutils-2.20.51.0.2-libtool-lib64.patch
+Patch1:  export-demangle.h-in-devel-package.patch
+#BUZ:845084
+Patch2:  binutils-2.22.52.0.4-no-config-h-check.patch
+#BUG:1452111
+Patch3:  binutils-2.27-aarch64-ifunc.patch
+
+#PATCH-CVE-UPSTREAM
+Patch4:  CVE-2019-1010204.patch
+
+Patch5:  Fix-a-potential-use-of-an-uninitialised-value-in-the.patch
+Patch6:  backport-CVE-2021-45078.patch
+Patch7:  backport-0001-CVE-2021-42574.patch
+Patch8:  backport-0002-CVE-2021-42574.patch
+Patch9:  backport-0003-CVE-2021-42574.patch
+Patch10: bfd-Close-the-file-descriptor-if-there-is-no-archive.patch
+Patch11: binutils-AArch64-EFI.patch
+Patch12: backport-0001-PR28391-strip-objcopy-preserve-dates-.a-cannot-set-t.patch
+
+Patch13: 0001-x86-Add-int1-as-one-byte-opcode-0xf1.patch
+Patch14: 0002-x86-drop-OP_Mask.patch
+Patch15: 0003-x86-correct-VCVT-U-SI2SD-rounding-mode-handling.patch
+Patch16: 0004-x86-64-generalize-OP_G-s-EVEX.R-handling.patch
+Patch17: 0005-x86-64-properly-bounds-check-bnd-N-in-OP_G.patch
+Patch18: 0006-x86-fold-duplicate-register-printing-code.patch
+Patch19: 0007-x86-fold-duplicate-code-in-MOVSXD_Fixup.patch
+Patch20: 0008-x86-correct-EVEX.V-handling-outside-of-64-bit-mode.patch
+Patch21: 0009-x86-drop-vex_mode-and-vex_scalar_mode.patch
+Patch22: 0010-x86-fold-duplicate-vector-register-printing-code.patch
+Patch23: 0011-x86-drop-xmm_m-b-w-d-q-_mode.patch
+Patch24: 0012-x86-drop-vex_scalar_w_dq_mode.patch
+Patch25: 0013-x86-drop-dq-b-d-_mode.patch
+Patch26: 0014-x86-express-unduly-set-rounding-control-bits-in-disa.patch
+Patch27: 0015-x86-Simplify-check-for-distinct-TMM-register-operand.patch
+Patch28: 0016-PATCH-1-2-Enable-Intel-AVX512_FP16-instructions.patch
+Patch29: 0017-PATCH-2-2-Add-tests-for-Intel-AVX512_FP16-instructio.patch
+Patch30: 0018-x86-ELF-fix-.tfloat-output.patch
+Patch31: 0019-x86-ELF-fix-.ds.x-output.patch
+Patch32: 0020-x86-ELF-fix-.tfloat-output-with-hex-input.patch
+Patch33: 0021-x86-introduce-.hfloat-directive.patch
+Patch34: 0022-x86-Avoid-abort-on-invalid-broadcast.patch
+Patch35: 0023-x86-Put-back-3-aborts-in-OP_E_memory.patch
+Patch36: 0024-x86-Print-bad-on-invalid-broadcast-in-OP_E_memory.patch
+Patch37: 0025-x86-Terminate-mnemonicendp-in-swap_operand.patch
+Patch38: 0026-opcodes-Make-i386-dis.c-thread-safe.patch
+Patch39: 0027-x86-reduce-AVX512-FP16-set-of-insns-decoded-through-.patch
+Patch40: 0028-x86-reduce-AVX512-FP-set-of-insns-decoded-through-ve.patch
+Patch41: 0029-x86-consistently-use-scalar_mode-for-AVX512-FP16-sca.patch
+Patch42: backport-CVE-2022-38126.patch
+
+Patch43: backport-0001-texi2pod.pl-add-no-op-no-split-option-support-PR2814.patch
+
+Patch44: backport-AArch64-Add-support-for-AArch64-EFI-efi-aarch64.patch
+Patch45: backport-Add-support-for-AArch64-EFI-efi-aarch64.patch
+Patch46: backport-don-t-over-align-file-positions-of-PE-executable-sec.patch
+Patch47: backport-PR28186-SEGV-elf.c-7991-30-in-_bfd_elf_fixup_group_sections.patch
+Patch48: backport-PR28422-build_id-use-after-free.patch
+Patch49: backport-PR28540-segmentation-fault-on-NULL-byte_get.patch
+
+
+Provides: bundled(libiberty)
+
+Buildroot: %(mktemp -ud %{_tmppath}/%{name}-%{version}-%{release}-XXXXXX)
+
+BuildRequires: gcc, perl, sed, coreutils, dejagnu, zlib-devel, glibc-static, sharutils, bc, libstdc++-static
+BuildRequires: bison, m4, gcc-c++, gettext, flex, zlib-devel, texinfo >= 4.0, perl-podlators chrpath
+Requires(post): info coreutils chkconfig
+Requires(preun):info chkconfig
+
+%define _gnu %{nil}
+# The higher of these two numbers determines the default ld.
+%{!?ld_bfd_priority: %global ld_bfd_priority    50}
+
+%if %{with gold}
+%{!?ld_gold_priority:%global ld_gold_priority   30}
+%endif
+
+%description
+The GNU Binutils are a collection of binary tools. The main ones are:
+ld - the GNU linker.
+as - the GNU assembler.
+addr2line - Converts addresses into filenames and line numbers.
+ar - A utility for creating, modifying and extracting from archives.
+c++filt - Filter to demangle encoded C++ symbols.
+dlltool - Creates files for building and using DLLs.
+gold - A new, faster, ELF only linker, still in beta test.
+gprof - Displays profiling information.
+nlmconv - Converts object code into an NLM.
+nm - Lists symbols from object files.
+objcopy - Copies and translates object files.
+objdump - Displays information from object files.
+ranlib - Generates an index to the contents of an archive.
+readelf - Displays information from any ELF format object file.
+size - Lists the section sizes of an object or archive file.
+strings - Lists printable strings from files.
+trip - Discards symbols.
+windmc - A Windows compatible message compiler.
+windres - A compiler for Windows resource files.
+
+
+%package devel
+Summary: devel package including header files and libraries.
+Provides: binutils-static = %{version}-%{release}
+Requires: zlib-devel, binutils = %{version}-%{release}, coreutils
+Requires(post): info
+Requires(preun):info
+
+%description devel
+The devel package contains BFD and opcodes static and dynamic libraries.
+The static libraries are used by the dynamic libraries which are linkier
+scripts imported from glibc/Makerules.
+
+%package help
+Summary: binutils help
+
+%description help
+The help package contains man files.
+
+%prep
+%autosetup -n %{name}-%{version} -p1
+
+
+sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in}
+sed -i -e '/^libopcodes_la_$DEPENDENCIES\|LIBADD$/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in}
+perl -pi -e 's/i\3-7\86/i3456786/g' */conf*
+
+sed -i -e '/pagesize/s/0x1000,/0x10000,/' gold/aarch64.cc
+sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*aarch64.c
+
+sed -i -e 's/^ PACKAGE=/ PACKAGE=/' */configure
+# revert name change when testing.
+sed -i -e "2aDEJATOOL = binutils" binutils/Makefile.am
+sed -i -e "2aDEJATOOL = gas" gas/Makefile.am
+sed -i -e "2aDEJATOOL = ld" ld/Makefile.am
+sed -i -e "s/^DEJATOOL = .*/DEJATOOL = binutils/" binutils/Makefile.in
+sed -i -e "s/^DEJATOOL = .*/DEJATOOL = gas/" gas/Makefile.in
+sed -i -e "s/^DEJATOOL = .*/DEJATOOL = ld/" ld/Makefile.in
+
+touch gas/doc/as.texi
+touch */configure
+
+%build
+CARGS=
+case %{_target_platform} in i?86*|arm*|aarch64*|riscv64*)
+  CARGS="$CARGS --enable-64-bit-bfd"
+  ;;
+esac
+
+case %{_target_platform} in x86_64*|i?86*|aarch64*|riscv64*)
+  CARGS="$CARGS --enable-targets=x86_64-pep --enable-relro=yes"
+  ;;
+esac
+
+export CFLAGS="$RPM_OPT_FLAGS"
+export LDFLAGS=$RPM_LD_FLAGS
+
+%configure \
+  --quiet \
+  --build=%{_target_platform} --host=%{_target_platform} \
+  --target=%{_target_platform} \
+  --enable-ld \
+%if %{with gold}
+  --enable-gold=default \
+%endif
+  --with-sysroot=/ \
+  --enable-deterministic-archives=no \
+  --enable-lto \
+  --enable-compressed-debug-sections=none \
+  --enable-generate-build-notes=no \
+  $CARGS \
+  --enable-plugins \
+  --enable-shared
+
+%make_build %{_smp_mflags} tooldir=%{_prefix} all
+%make_build %{_smp_mflags} tooldir=%{_prefix} info
+
+%check
+make -k check < /dev/null || :
+cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum
+for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log}
+do
+  ln $file binutils-%{_target_platform}-$(basename $file) || :
+done

_service:extract_file:CVE-2019-1010204.patch Deleted

_service:extract_file:Fix-a-potential-use-of-an-uninitialised-value-in-the.patch Deleted

@@ -1,31 +0,0 @@
-From 151f5de4a6548cd83a79b4705f1e901776ddacc5 Mon Sep 17 00:00:00 2001
-From: Nick Clifton <nickc@redhat.com>
-Date: Thu, 28 May 2020 11:04:27 +0100
-Subject: PATCH Fix a potential use of an uninitialised value in the ns32k
- disassembler.
-
-	* ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
-	static.
----
- opcodes/ns32k-dis.c | 5 ++++-
- 1 files changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/opcodes/ns32k-dis.c b/opcodes/ns32k-dis.c
-index 12df182..ccad820 100644
---- a/opcodes/ns32k-dis.c
-+++ b/opcodes/ns32k-dis.c
-@@ -738,7 +738,10 @@ print_insn_ns32k (bfd_vma memaddr, disassemble_info *info)
-   unsigned short first_word;
-   int ioffset;		/* Bits into instruction.  */
-   int aoffset;		/* Bits into arguments.  */
--  char arg_bufsMAX_ARGS+1ARG_LEN;
-+  /* The arg_bufs array is made static in order to avoid a potential
-+     use of an uninitialised value if we are asekd to disassemble a
-+     corrupt instruction.  */
-+  static char arg_bufsMAX_ARGS+1ARG_LEN;
-   int argnum;
-   int maxarg;
-   struct private priv;
--- 
-1.8.3.1
-

_service:extract_file:backport-0001-CVE-2021-42574.patch Deleted

@@ -1,1983 +0,0 @@
-From b3aa80b45c4f46029efeb204bb9f2d2c4278a0e5 Mon Sep 17 00:00:00 2001
-From: Nick Clifton <nickc@redhat.com>
-Date: Tue, 9 Nov 2021 13:25:42 +0000
-Subject: PATCH Add --unicode option to control how unicode characters are
- handled by display tools.
-
-	* nm.c: Add --unicode option to control how unicode characters are
-	handled.
-	* objdump.c: Likewise.
-	* readelf.c: Likewise.
-	* strings.c: Likewise. 
-	* binutils.texi: Document the new feature. 
-	* NEWS: Document the new feature. 
-	* testsuite/binutils-all/unicode.exp: New file. 
-	* testsuite/binutils-all/nm.hex.unicode 
-	* testsuite/binutils-all/strings.escape.unicode 
-	* testsuite/binutils-all/objdump.highlight.unicode 
-	* testsuite/binutils-all/readelf.invalid.unicode 
- 
-Conflict:Context adaptation
----
- binutils/NEWS              |   9 +
- binutils/doc/binutils.texi |  78 +++++
- binutils/nm.c              | 228 +++++++++++++-
- binutils/objdump.c         | 235 ++++++++++++--
- binutils/readelf.c         | 190 +++++++++++-
- binutils/strings.c         | 757 +++++++++++++++++++++++++++++++++++++++++----
- 6 files changed, 1394 insertions(+), 103 deletions(-)
-
-diff --git a/binutils/NEWS b/binutils/NEWS
-index 8a73387..db9114e 100644
---- a/binutils/NEWS
-+++ b/binutils/NEWS
-@@ -1,5 +1,14 @@
- -*- text -*-
- 
-+* Tools which display symbols or strings (readelf, strings, nm, objdump)
-+  have a new command line option which controls how unicode characters are
-+  handled.  By default they are treated as normal for the tool.  Using
-+  --unicode=locale will display them according to the current locale.
-+  Using --unicode=hex will display them as hex byte values, whilst
-+  --unicode=escape will display them as escape sequences.  In addition
-+  using --unicode=highlight will display them as unicode escape sequences
-+  highlighted in red (if supported by the output device).
-+
- Changes in 2.37:
- 
- * The readelf tool has a new command line option which can be used to specify
-diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
-index 504c3ea..5de0631 100644
---- a/binutils/doc/binutils.texi
-+++ b/binutils/doc/binutils.texi
-@@ -812,6 +812,7 @@ nm @option{-A}|@option{-o}|@option{--print-file-name}
-    @option{-s}|@option{--print-armap}
-    @option{-t} @var{radix}|@option{--radix=}@var{radix}
-    @option{-u}|@option{--undefined-only}
-+   @option{-U} @var{method} @option{--unicode=}@var{method}
-    @option{-V}|@option{--version}
-    @option{-X 32_64}
-    @option{--defined-only}
-@@ -1132,6 +1133,21 @@ Use @var{radix} as the radix for printing the symbol values.  It must be
- @cindex undefined symbols
- Display only undefined symbols (those external to each object file).
- 
-+@item -U @var{d|i|l|e|x|h}
-+@itemx --unicode=@var{default|invalid|locale|escape|hex|highlight}
-+Controls the display of UTF-8 encoded mulibyte characters in strings.
-+The default (@option{--unicode=default}) is to give them no special
-+treatment.  The @option{--unicode=locale} option displays the sequence
-+in the current locale, which may or may not support them.  The options
-+@option{--unicode=hex} and @option{--unicode=invalid} display them as
-+hex byte sequences enclosed by either angle brackets or curly braces.
-+
-+The @option{--unicode=escape} option displays them as escape sequences
-+(@var{\uxxxx}) and the @option{--unicode=highlight} option displays
-+them as escape sequences highlighted in red (if supported by the
-+output device).  The colouring is intended to draw attention to the
-+presence of unicode sequences where they might not be expected.
-+
- @item -V
- @itemx --version
- Show the version number of @command{nm} and exit.
-@@ -2247,6 +2263,7 @@ objdump @option{-a}|@option{--archive-headers}
-         @option{--prefix-strip=}@var{level}
-         @option{--insn-width=}@var{width}
-         @option{--visualize-jumps=color|=extended-color|=off}
-+        @option{-U} @var{method} @option{--unicode=}@var{method}
-         @option{-V}|@option{--version}
-         @option{-H}|@option{--help}
-         @var{objfile}@dots{}
-@@ -2921,6 +2938,21 @@ When displaying symbols include those which the target considers to be
- special in some way and which would not normally be of interest to the
- user.
- 
-+@item -U @var{d|i|l|e|x|h}
-+@itemx --unicode=@var{default|invalid|locale|escape|hex|highlight}
-+Controls the display of UTF-8 encoded mulibyte characters in strings.
-+The default (@option{--unicode=default}) is to give them no special
-+treatment.  The @option{--unicode=locale} option displays the sequence
-+in the current locale, which may or may not support them.  The options
-+@option{--unicode=hex} and @option{--unicode=invalid} display them as
-+hex byte sequences enclosed by either angle brackets or curly braces.
-+
-+The @option{--unicode=escape} option displays them as escape sequences
-+(@var{\uxxxx}) and the @option{--unicode=highlight} option displays
-+them as escape sequences highlighted in red (if supported by the
-+output device).  The colouring is intended to draw attention to the
-+presence of unicode sequences where they might not be expected.
-+
- @item -V
- @itemx --version
- Print the version number of @command{objdump} and exit.
-@@ -3197,6 +3229,7 @@ strings @option{-afovV} @option{-}@var{min-len}
-         @option{-n} @var{min-len} @option{--bytes=}@var{min-len}
-         @option{-t} @var{radix} @option{--radix=}@var{radix}
-         @option{-e} @var{encoding} @option{--encoding=}@var{encoding}
-+        @option{-U} @var{method} @option{--unicode=}@var{method}
-         @option{-} @option{--all} @option{--print-file-name}
-         @option{-T} @var{bfdname} @option{--target=}@var{bfdname}
-         @option{-w} @option{--include-all-whitespace}
-@@ -3288,6 +3321,28 @@ single-8-bit-byte characters, @samp{b} = 16-bit bigendian, @samp{l} =
- littleendian.  Useful for finding wide character strings. (@samp{l}
- and @samp{b} apply to, for example, Unicode UTF-16/UCS-2 encodings).
- 
-+@item -U @var{d|i|l|e|x|h}
-+@itemx --unicode=@var{default|invalid|locale|escape|hex|highlight}
-+Controls the display of UTF-8 encoded mulibyte characters in strings.
-+The default (@option{--unicode=default}) is to give them no special
-+treatment, and instead rely upon the setting of the
-+@option{--encoding} option.  The other values for this option
-+automatically enable @option{--encoding=S}.
-+
-+The @option{--unicode=invalid} option treats them as non-graphic
-+characters and hence not part of a valid string.  All the remaining
-+options treat them as valid string characters.
-+
-+The @option{--unicode=locale} option displays them in the current
-+locale, which may or may not support UTF-8 encoding.  The
-+@option{--unicode=hex} option displays them as hex byte sequences
-+enclosed between @var{<>} characters.  The @option{--unicode=escape}
-+option displays them as escape sequences (@var{\uxxxx}) and the
-+@option{--unicode=highlight} option displays them as escape sequences
-+highlighted in red (if supported by the output device).  The colouring
-+is intended to draw attention to the presence of unicode sequences
-+where they might not be expected.
-+
- @item -T @var{bfdname}
- @itemx --target=@var{bfdname}
- @cindex object code format
-@@ -4796,6 +4851,7 @@ readelf @option{-a}|@option{--all}
-         @option{--demangle@var{=style}}|@option{--no-demangle}
-         @option{--quiet}
-         @option{--recurse-limit}|@option{--no-recurse-limit}
-+        @option{-U} @var{method}|@option{--unicode=}@var{method}
-         @option{-n}|@option{--notes}
-         @option{-r}|@option{--relocs}
-         @option{-u}|@option{--unwind}
-@@ -4962,6 +5018,28 @@ necessary in order to demangle truly complicated names.  Note however
- that if the recursion limit is disabled then stack exhaustion is
- possible and any bug reports about such an event will be rejected.
- 
-+@item -U @var{d|i|l|e|x|h}
-+@itemx --unicode=default|invalid|locale|escape|hex|highlight
-+Controls the display of non-ASCII characters in identifier names.
-+The default (@option{--unicode=locale} or @option{--unicode=default}) is
-+to treat them as multibyte characters and display them in the current
-+locale.  All other versions of this option treat the bytes as UTF-8
-+encoded values and attempt to interpret them.  If they cannot be
-+interpreted or if the @option{--unicode=invalid} option is used then
-+they are displayed as a sequence of hex bytes, encloses in curly
-+parethesis characters.
-+
-+Using the @option{--unicode=escape} option will display the characters
-+as as unicode escape sequences (@var{\uxxxx}).  Using the
-+@option{--unicode=hex} will display the characters as hex byte
-+sequences enclosed between angle brackets.
-+
-+Using the @option{--unicode=highlight} will display the characters as 
-+unicode escape sequences but it will also highlighted them in red,
-+assuming that colouring is supported by the output device.  The
-+colouring is intended to draw attention to the presence of unicode
-+sequences when they might not be expected.
-+
- @item -e
- @itemx --headers
- Display all the headers in the file.  Equivalent to @option{-h -l -S}.
-diff --git a/binutils/nm.c b/binutils/nm.c
-index 82ccec6..3f8abfc 100644
---- a/binutils/nm.c
-+++ b/binutils/nm.c
-@@ -38,6 +38,11 @@
- #include "bucomm.h"
- #include "plugin-api.h"
- #include "plugin.h"
-+#include "safe-ctype.h"
-+
-+#ifndef streq
-+#define streq(a,b) (strcmp ((a),(b)) == 0)
-+#endif

_service:extract_file:backport-0002-CVE-2021-42574.patch Deleted

@@ -1,194 +0,0 @@
-From 795588aec4f894206863c938bd6d716895886009 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Pekka=20Sepp=C3=A4nen?= <pexu@sourceware.mail.kapsi.fi>
-Date: Wed, 10 Nov 2021 20:15:19 +1030
-Subject: PATCH PR28575, readelf.c and strings.c use undefined type uint
-
-Since --unicode support (commit b3aa80b45c4) both binutils/readelf.c
-and binutils/strings.c use 'uint' in a few locations.  It likely
-should be 'unsigned int' since there isn't anything defining 'uint'
-within binutils (besides zlib) and AFAIK it isn't a standard type.
-
-	* readelf.c (print_symbol): Replace uint with unsigned int.
-	* strings.c (string_min, display_utf8_char): Likewise.
-	(print_unicode_stream_body, print_unicode_stream): Likewise.
-	(print_strings): Likewise.
-	(get_unicode_byte): Wrap long line.
----
- binutils/readelf.c |  4 ++--
- binutils/strings.c | 41 ++++++++++++++++++++++-------------------
- 2 files changed, 24 insertions(+), 21 deletions(-)
-
-diff --git a/binutils/readelf.c b/binutils/readelf.c
-index c71d542f051b..5a87728d3e98 100644
---- a/binutils/readelf.c
-+++ b/binutils/readelf.c
-@@ -702,7 +702,7 @@ print_symbol (signed int width, const char * symbol)
- 	  /* Display unicode characters as something else.  */
- 	  unsigned char bytes4;
- 	  bool          is_utf8;
--	  uint          nbytes;
-+	  unsigned int  nbytes;
- 
- 	  bytes0 = c;
- 
-@@ -767,7 +767,7 @@ print_symbol (signed int width, const char * symbol)
- 
- 	  if (unicode_display == unicode_hex || ! is_utf8)
- 	    {
--	      uint i;
-+	      unsigned int i;
- 
- 	      if (width_remaining < (nbytes * 2) + 2)
- 		break;
-diff --git a/binutils/strings.c b/binutils/strings.c
-index e8649a80d6a7..13db60f57a57 100644
---- a/binutils/strings.c
-+++ b/binutils/strings.c
-@@ -57,7 +57,7 @@
- 
-   --unicode={default|locale|invalid|hex|escape|highlight}
-   -u {d|l|i|x|e|h}
--                Determine how to handle UTF-8 unicode characters.  The default
-+		Determine how to handle UTF-8 unicode characters.  The default
- 		is no special treatment.  All other versions of this option
- 		only apply if the encoding is valid and enabling the option
- 		implies --encoding=S.
-@@ -123,7 +123,7 @@ extern int errno;
- static int address_radix;
- 
- /* Minimum length of sequence of graphic chars to trigger output.  */
--static uint string_min;
-+static unsigned int string_min;
- 
- /* Whether or not we include all whitespace as a graphic char.   */
- static bool include_all_whitespace;
-@@ -272,7 +272,7 @@ main (int argc, char **argv)
- 
- 	case 's':
- 	  output_separator = optarg;
--          break;
-+	  break;
- 
- 	case 'U':
- 	  if (streq (optarg, "default") || streq (optarg, "d"))
-@@ -677,7 +677,7 @@ is_valid_utf8 (const unsigned char * buffer, unsigned long buflen)
- 
-   if ((buffer2 & 0xc0) != 0x80)
-     return 0;
--  
-+
-   if ((buffer0 & 0x10) == 0)
-     return 3;
- 
-@@ -694,11 +694,11 @@ is_valid_utf8 (const unsigned char * buffer, unsigned long buflen)
-    of unicode_display.  The character is known to be valid.
-    Returns the number of bytes consumed.  */
- 
--static uint
-+static unsigned int
- display_utf8_char (const unsigned char * buffer)
- {
--  uint j;
--  uint utf8_len;
-+  unsigned int j;
-+  unsigned int utf8_len;
- 
-   switch (buffer0 & 0x30)
-     {
-@@ -712,7 +712,7 @@ display_utf8_char (const unsigned char * buffer)
-     default:
-       utf8_len = 4;
-     }
--      
-+
-   switch (unicode_display)
-     {
-     default:
-@@ -728,7 +728,7 @@ display_utf8_char (const unsigned char * buffer)
- 	{
- 	case 2:
- 	  printf ("\\u%02x%02x",
--		  ((buffer0 & 0x1c) >> 2), 
-+		  ((buffer0 & 0x1c) >> 2),
- 		  ((buffer0 & 0x03) << 6) | (buffer1 & 0x3f));
- 	  break;
- 
-@@ -857,7 +857,7 @@ print_unicode_buffer (const char *            filename,
-     return;
- 
-   print_filename_and_address (filename, address + start_point);
--  
-+
-   /* We have found string_min characters.  Display them and any
-      more that follow.  */
-   for (i = start_point; i < buflen; i += char_len)
-@@ -888,7 +888,10 @@ print_unicode_buffer (const char *            filename,
- }
- 
- static int
--get_unicode_byte (FILE * stream, unsigned char * putback, uint * num_putback, uint * num_read)
-+get_unicode_byte (FILE *          stream,
-+		  unsigned char * putback,
-+		  unsigned int *  num_putback,
-+		  unsigned int *  num_read)
- {
-   if (* num_putback > 0)
-     {
-@@ -912,7 +915,7 @@ print_unicode_stream_body (const char *     filename,
- 			   file_ptr         address,
- 			   FILE *           stream,
- 			   unsigned char *  putback_buf,
--			   uint             num_putback,
-+			   unsigned int     num_putback,
- 			   unsigned char *  print_buf)
- {
-   /* It would be nice if we could just read the stream into a buffer
-@@ -921,9 +924,9 @@ print_unicode_stream_body (const char *     filename,
-      we go one byte at a time...  */
- 
-   file_ptr start_point = 0;
--  uint num_read = 0;
--  uint num_chars = 0;
--  uint num_print = 0;
-+  unsigned int num_read = 0;
-+  unsigned int num_chars = 0;
-+  unsigned int num_print = 0;
-   int c = 0;
- 
-   /* Find a series of string_min characters.  Put them into print_buf.  */
-@@ -1064,7 +1067,7 @@ print_unicode_stream_body (const char *     filename,
- 
-       print_filename_and_address (filename, address + start_point);
- 
--      uint i;
-+      unsigned int i;
-       for (i = 0; i < num_print;)
- 	{
- 	  if (print_bufi < 127)
-@@ -1075,7 +1078,7 @@ print_unicode_stream_body (const char *     filename,
- 
-       /* OK so now we have to start read unchecked bytes.  */
- 
--        /* Find a series of string_min characters.  Put them into print_buf.  */
-+      /* Find a series of string_min characters.  Put them into print_buf.  */
-       do
- 	{
- 	  c = get_unicode_byte (stream, putback_buf, & num_putback, & num_read);
-@@ -1213,7 +1216,7 @@ print_unicode_stream (const char * filename,
-   unsigned char * print_buf = xmalloc ((4 * string_min) + 1);
-   /* We should never have to put back more than 4 bytes.  */
-   unsigned char putback_buf5;
--  uint num_putback = 0;
-+  unsigned int num_putback = 0;
- 
-   print_unicode_stream_body (filename, address, stream, putback_buf, num_putback, print_buf);
-   free (print_buf);
-@@ -1250,7 +1253,7 @@ print_strings (const char *filename, FILE *stream, file_ptr address,
-   while (1)
-     {
-       file_ptr start;
--      uint i;
-+      unsigned int i;
-       long c;
- 
-       /* See if the next `string_min' chars are all graphic chars.  */

_service:extract_file:backport-0003-CVE-2021-42574.patch Deleted

@@ -1,33 +0,0 @@
-From 584294c4066d0101161e4e04744a46cce7a7863e Mon Sep 17 00:00:00 2001
-From: Nick Clifton <nickc@redhat.com>
-Date: Mon, 29 Nov 2021 15:37:24 +0000
-Subject: PATCH strings: Replace references to -u option with references to
- -U.
-
-	PR 28632
----
- binutils/strings.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/binutils/strings.c b/binutils/strings.c
-index f594299939f9..f85cb03406c9 100644
---- a/binutils/strings.c
-+++ b/binutils/strings.c
-@@ -57,7 +57,7 @@
- 		Specify a non-default object file format.
- 
-   --unicode={default|locale|invalid|hex|escape|highlight}
--  -u {d|l|i|x|e|h}
-+  -U {d|l|i|x|e|h}
- 		Determine how to handle UTF-8 unicode characters.  The default
- 		is no special treatment.  All other versions of this option
- 		only apply if the encoding is valid and enabling the option
-@@ -1333,7 +1333,7 @@ usage (FILE *stream, int status)
-   -e --encoding={s,S,b,l,B,L} Select character size and endianness:\n\
-                             s = 7-bit, S = 8-bit, {b,l} = 16-bit, {B,L} = 32-bit\n\
-   --unicode={default|show|invalid|hex|escape|highlight}\n\
--  -u {d|s|i|x|e|h}          Specify how to treat UTF-8 encoded unicode characters\n\
-+  -U {d|s|i|x|e|h}          Specify how to treat UTF-8 encoded unicode characters\n\
-   -s --output-separator=<string> String used to separate strings in output.\n\
-   @<file>                   Read options from <file>\n\
-   -h --help                 Display this information\n\

_service:extract_file:backport-CVE-2021-45078.patch Deleted

@@ -1,245 +0,0 @@
-From 161e87d12167b1e36193385485c1f6ce92f74f02 Mon Sep 17 00:00:00 2001
-From: Alan Modra <amodra@gmail.com>
-Date: Wed, 15 Dec 2021 11:48:42 +1030
-Subject: PATCH PR28694, Out-of-bounds write in stab_xcoff_builtin_type
-
-	PR 28694
-	* stabs.c (stab_xcoff_builtin_type): Make typenum unsigned.
-	Negate typenum earlier, simplifying bounds checking.  Correct
-	off-by-one indexing.  Adjust switch cases.
----
- binutils/stabs.c | 87 ++++++++++++++++++++++++------------------------
- 1 file changed, 43 insertions(+), 44 deletions(-)
-
-diff --git a/binutils/stabs.c b/binutils/stabs.c
-index 274bfb0e7fa..83ee3ea5fa4 100644
---- a/binutils/stabs.c
-+++ b/binutils/stabs.c
-@@ -202,7 +202,7 @@ static debug_type stab_find_type (void *, struct stab_handle *, const int *);
- static bool stab_record_type
-   (void *, struct stab_handle *, const int *, debug_type);
- static debug_type stab_xcoff_builtin_type
--  (void *, struct stab_handle *, int);
-+  (void *, struct stab_handle *, unsigned int);
- static debug_type stab_find_tagged_type
-   (void *, struct stab_handle *, const char *, int, enum debug_type_kind);
- static debug_type *stab_demangle_argtypes
-@@ -3496,166 +3496,167 @@ stab_record_type (void *dhandle ATTRIBUTE_UNUSED, struct stab_handle *info,
- 
- static debug_type
- stab_xcoff_builtin_type (void *dhandle, struct stab_handle *info,
--			 int typenum)
-+			 unsigned int typenum)
- {
-   debug_type rettype;
-   const char *name;
- 
--  if (typenum >= 0 || typenum < -XCOFF_TYPE_COUNT)
-+  typenum = -typenum - 1;
-+  if (typenum >= XCOFF_TYPE_COUNT)
-     {
--      fprintf (stderr, _("Unrecognized XCOFF type %d\n"), typenum);
-+      fprintf (stderr, _("Unrecognized XCOFF type %d\n"), -typenum - 1);
-       return DEBUG_TYPE_NULL;
-     }
--  if (info->xcoff_types-typenum != NULL)
--    return info->xcoff_types-typenum;
-+  if (info->xcoff_typestypenum != NULL)
-+    return info->xcoff_typestypenum;
- 
--  switch (-typenum)
-+  switch (typenum)
-     {
--    case 1:
-+    case 0:
-       /* The size of this and all the other types are fixed, defined
- 	 by the debugging format.  */
-       name = "int";
-       rettype = debug_make_int_type (dhandle, 4, false);
-       break;
--    case 2:
-+    case 1:
-       name = "char";
-       rettype = debug_make_int_type (dhandle, 1, false);
-       break;
--    case 3:
-+    case 2:
-       name = "short";
-       rettype = debug_make_int_type (dhandle, 2, false);
-       break;
--    case 4:
-+    case 3:
-       name = "long";
-       rettype = debug_make_int_type (dhandle, 4, false);
-       break;
--    case 5:
-+    case 4:
-       name = "unsigned char";
-       rettype = debug_make_int_type (dhandle, 1, true);
-       break;
--    case 6:
-+    case 5:
-       name = "signed char";
-       rettype = debug_make_int_type (dhandle, 1, false);
-       break;
--    case 7:
-+    case 6:
-       name = "unsigned short";
-       rettype = debug_make_int_type (dhandle, 2, true);
-       break;
--    case 8:
-+    case 7:
-       name = "unsigned int";
-       rettype = debug_make_int_type (dhandle, 4, true);
-       break;
--    case 9:
-+    case 8:
-       name = "unsigned";
-       rettype = debug_make_int_type (dhandle, 4, true);
-       break;
--    case 10:
-+    case 9:
-       name = "unsigned long";
-       rettype = debug_make_int_type (dhandle, 4, true);
-       break;
--    case 11:
-+    case 10:
-       name = "void";
-       rettype = debug_make_void_type (dhandle);
-       break;
--    case 12:
-+    case 11:
-       /* IEEE single precision (32 bit).  */
-       name = "float";
-       rettype = debug_make_float_type (dhandle, 4);
-       break;
--    case 13:
-+    case 12:
-       /* IEEE double precision (64 bit).  */
-       name = "double";
-       rettype = debug_make_float_type (dhandle, 8);
-       break;
--    case 14:
-+    case 13:
-       /* This is an IEEE double on the RS/6000, and different machines
- 	 with different sizes for "long double" should use different
- 	 negative type numbers.  See stabs.texinfo.  */
-       name = "long double";
-       rettype = debug_make_float_type (dhandle, 8);
-       break;
--    case 15:
-+    case 14:
-       name = "integer";
-       rettype = debug_make_int_type (dhandle, 4, false);
-       break;
--    case 16:
-+    case 15:
-       name = "boolean";
-       rettype = debug_make_bool_type (dhandle, 4);
-       break;
--    case 17:
-+    case 16:
-       name = "short real";
-       rettype = debug_make_float_type (dhandle, 4);
-       break;
--    case 18:
-+    case 17:
-       name = "real";
-       rettype = debug_make_float_type (dhandle, 8);
-       break;
--    case 19:
-+    case 18:
-       /* FIXME */
-       name = "stringptr";
-       rettype = NULL;
-       break;
--    case 20:
-+    case 19:
-       /* FIXME */
-       name = "character";
-       rettype = debug_make_int_type (dhandle, 1, true);
-       break;
--    case 21:
-+    case 20:
-       name = "logical*1";
-       rettype = debug_make_bool_type (dhandle, 1);
-       break;
--    case 22:
-+    case 21:
-       name = "logical*2";
-       rettype = debug_make_bool_type (dhandle, 2);
-       break;
--    case 23:
-+    case 22:
-       name = "logical*4";
-       rettype = debug_make_bool_type (dhandle, 4);
-       break;
--    case 24:
-+    case 23:
-       name = "logical";
-       rettype = debug_make_bool_type (dhandle, 4);
-       break;
--    case 25:
-+    case 24:
-       /* Complex type consisting of two IEEE single precision values.  */
-       name = "complex";
-       rettype = debug_make_complex_type (dhandle, 8);
-       break;
--    case 26:
-+    case 25:
-       /* Complex type consisting of two IEEE double precision values.  */
-       name = "double complex";
-       rettype = debug_make_complex_type (dhandle, 16);
-       break;
--    case 27:
-+    case 26:
-       name = "integer*1";
-       rettype = debug_make_int_type (dhandle, 1, false);
-       break;
--    case 28:

_service:extract_file:bfd-Close-the-file-descriptor-if-there-is-no-archive.patch Deleted

@@ -1,234 +0,0 @@
-From 1c611b40e6bfc8029bff7696814330b5bc0ee5c0 Mon Sep 17 00:00:00 2001
-From: "H.J. Lu" <hjl.tools@gmail.com>
-Date: Mon, 26 Jul 2021 05:59:55 -0700
-Subject: PATCH bfd: Close the file descriptor if there is no archive fd
-
-Close the file descriptor if there is no archive plugin file descriptor
-to avoid running out of file descriptors on thin archives with many
-archive members.
-
-bfd/
-
-	PR ld/28138
-	* plugin.c (bfd_plugin_close_file_descriptor): Close the file
-	descriptor there is no archive plugin file descriptor.
-
-ld/
-
-	PR ld/28138
-	* testsuite/ld-plugin/lto.exp: Run tmpdir/pr28138 only for
-	native build.
-
-	PR ld/28138
-	* testsuite/ld-plugin/lto.exp: Run ld/28138 tests.
-	* testsuite/ld-plugin/pr28138.c: New file.
-	* testsuite/ld-plugin/pr28138-1.c: Likewise.
-	* testsuite/ld-plugin/pr28138-2.c: Likewise.
-	* testsuite/ld-plugin/pr28138-3.c: Likewise.
-	* testsuite/ld-plugin/pr28138-4.c: Likewise.
-	* testsuite/ld-plugin/pr28138-5.c: Likewise.
-	* testsuite/ld-plugin/pr28138-6.c: Likewise.
-	* testsuite/ld-plugin/pr28138-7.c: Likewise.
-
-(cherry picked from commit 5a98fb7513b559e20dfebdbaa2a471afda3b4742)
-(cherry picked from commit 7dc37e1e1209c80e0bab784df6b6bac335e836f2)
-
-Signed-off-by: Kai Liu <kai.liu@suse.com>
----
- bfd/plugin.c                       |  8 +++++++
- ld/testsuite/ld-plugin/lto.exp     | 34 ++++++++++++++++++++++++++++++
- ld/testsuite/ld-plugin/pr28138-1.c |  6 ++++++
- ld/testsuite/ld-plugin/pr28138-2.c |  6 ++++++
- ld/testsuite/ld-plugin/pr28138-3.c |  6 ++++++
- ld/testsuite/ld-plugin/pr28138-4.c |  6 ++++++
- ld/testsuite/ld-plugin/pr28138-5.c |  6 ++++++
- ld/testsuite/ld-plugin/pr28138-6.c |  6 ++++++
- ld/testsuite/ld-plugin/pr28138-7.c |  6 ++++++
- ld/testsuite/ld-plugin/pr28138.c   | 20 ++++++++++++++++++
- 10 files changed, 104 insertions(+)
- create mode 100644 ld/testsuite/ld-plugin/pr28138-1.c
- create mode 100644 ld/testsuite/ld-plugin/pr28138-2.c
- create mode 100644 ld/testsuite/ld-plugin/pr28138-3.c
- create mode 100644 ld/testsuite/ld-plugin/pr28138-4.c
- create mode 100644 ld/testsuite/ld-plugin/pr28138-5.c
- create mode 100644 ld/testsuite/ld-plugin/pr28138-6.c
- create mode 100644 ld/testsuite/ld-plugin/pr28138-7.c
- create mode 100644 ld/testsuite/ld-plugin/pr28138.c
-
-diff --git a/bfd/plugin.c b/bfd/plugin.c
-index 6cfa2b66470..3bab8febe88 100644
---- a/bfd/plugin.c
-+++ b/bfd/plugin.c
-@@ -291,6 +291,14 @@ bfd_plugin_close_file_descriptor (bfd *abfd, int fd)
- 	     && !bfd_is_thin_archive (abfd->my_archive))
- 	abfd = abfd->my_archive;
- 
-+      /* Close the file descriptor if there is no archive plugin file
-+	 descriptor.  */
-+      if (abfd->archive_plugin_fd == -1)
-+	{
-+	  close (fd);
-+	  return;
-+	}
-+
-       abfd->archive_plugin_fd_open_count--;
-       /* Dup the archive plugin file descriptor for later use, which
- 	 will be closed by _bfd_archive_close_and_cleanup.  */
-diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
-index def69e43ab3..999d911ce6a 100644
---- a/ld/testsuite/ld-plugin/lto.exp
-+++ b/ld/testsuite/ld-plugin/lto.exp
-@@ -687,6 +687,40 @@ if { is_elf_format && check_lto_shared_available } {
-     }
- }
- 
-+run_cc_link_tests list \
-+    list \
-+	"Build pr28138.a" \
-+	"-T" "" \
-+	{pr28138-1.c pr28138-2.c pr28138-3.c pr28138-4.c pr28138-5.c \
-+	 pr28138-6.c pr28138-7.c} {} "pr28138.a" \
-+     \
-+    list \
-+	"Build pr28138.o" \
-+	"" "" \
-+	{pr28138.c} {} \
-+     \
-+
-+
-+set exec_output run_host_cmd "sh" \
-+			      "-c \"ulimit -n 20; \
-+			      $CC -Btmpdir/ld -o tmpdir/pr28138 \
-+			      tmpdir/pr28138.o tmpdir/pr28138.a\""
-+set exec_output prune_warnings $exec_output
-+if string match "" $exec_output then {
-+    if { isnative } {
-+	set exec_output run_host_cmd "tmpdir/pr28138" ""
-+	if string match "PASS" $exec_output then {
-+	    pass "PR ld/28138"
-+	} else {
-+	    fail "PR ld/28138"
-+	}
-+    } else {
-+	pass "PR ld/28138"
-+    }
-+} else {
-+    fail "PR ld/28138"
-+}
-+
- set testname "Build liblto-11.a"
- remote_file host delete "tmpdir/liblto-11.a"
- set catch_output run_host_cmd "$ar" "rc $plug_opt tmpdir/liblto-11.a tmpdir/lto-11a.o tmpdir/lto-11b.o tmpdir/lto-11c.o"
-diff --git a/ld/testsuite/ld-plugin/pr28138-1.c b/ld/testsuite/ld-plugin/pr28138-1.c
-new file mode 100644
-index 00000000000..51d119e1642
---- /dev/null
-+++ b/ld/testsuite/ld-plugin/pr28138-1.c
-@@ -0,0 +1,6 @@
-+extern int a0(void);
-+int
-+a1(void)
-+{
-+  return 1 + a0();
-+}
-diff --git a/ld/testsuite/ld-plugin/pr28138-2.c b/ld/testsuite/ld-plugin/pr28138-2.c
-new file mode 100644
-index 00000000000..1120cd797e9
---- /dev/null
-+++ b/ld/testsuite/ld-plugin/pr28138-2.c
-@@ -0,0 +1,6 @@
-+extern int a1(void);
-+int
-+a2(void)
-+{
-+  return 1 + a1();
-+}
-diff --git a/ld/testsuite/ld-plugin/pr28138-3.c b/ld/testsuite/ld-plugin/pr28138-3.c
-new file mode 100644
-index 00000000000..ec464947ee6
---- /dev/null
-+++ b/ld/testsuite/ld-plugin/pr28138-3.c
-@@ -0,0 +1,6 @@
-+extern int a2(void);
-+int
-+a3(void)
-+{
-+  return 1 + a2();
-+}
-diff --git a/ld/testsuite/ld-plugin/pr28138-4.c b/ld/testsuite/ld-plugin/pr28138-4.c
-new file mode 100644
-index 00000000000..475701b2c5c
---- /dev/null
-+++ b/ld/testsuite/ld-plugin/pr28138-4.c
-@@ -0,0 +1,6 @@
-+extern int a3(void);
-+int
-+a4(void)
-+{
-+  return 1 + a3();
-+}
-diff --git a/ld/testsuite/ld-plugin/pr28138-5.c b/ld/testsuite/ld-plugin/pr28138-5.c
-new file mode 100644
-index 00000000000..e24f86c363e
---- /dev/null
-+++ b/ld/testsuite/ld-plugin/pr28138-5.c
-@@ -0,0 +1,6 @@
-+extern int a4(void);
-+int
-+a5(void)
-+{
-+  return 1 + a4();
-+}
-diff --git a/ld/testsuite/ld-plugin/pr28138-6.c b/ld/testsuite/ld-plugin/pr28138-6.c
-new file mode 100644
-index 00000000000..b5b938bdb21
---- /dev/null
-+++ b/ld/testsuite/ld-plugin/pr28138-6.c
-@@ -0,0 +1,6 @@
-+extern int a5(void);
-+int
-+a6(void)
-+{
-+  return 1 + a5();
-+}
-diff --git a/ld/testsuite/ld-plugin/pr28138-7.c b/ld/testsuite/ld-plugin/pr28138-7.c
-new file mode 100644
-index 00000000000..4ef75bf0f0c
---- /dev/null
-+++ b/ld/testsuite/ld-plugin/pr28138-7.c
-@@ -0,0 +1,6 @@

_service:extract_file:binutils-2.20.51.0.2-libtool-lib64.patch Deleted

@@ -1,236 +0,0 @@
-diff -rcp ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure
---- a/bfd/configure	2010-04-08 14:53:48.000000000 +0100
-+++ b/bfd/configure	2010-04-08 14:56:50.000000000 +0100
-@@ -10762,10 +10762,34 @@
-   # before this can be enabled.
-   hardcode_into_libs=yes
- 
-+  # find out which ABI we are using
-+  libsuff=
-+  case "$host_cpu" in
-+  x86_64*|s390*|powerpc*|ppc*|sparc*)
-+    echo 'int i;' > conftest.$ac_ext
-+    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
-+  (eval $ac_compile) 2>&5
-+  ac_status=$?
-+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
-+  (exit $ac_status); }; then
-+      case `/usr/bin/file conftest.$ac_objext` in
-+      *64-bit*)
-+        libsuff=64
-+        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
-+          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
-+        fi
-+        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
-+        ;;
-+      esac
-+    fi
-+    rm -rf conftest*
-+    ;;
-+  esac
-+
-   # Append ld.so.conf contents to the search path
-   if test -f /etc/ld.so.conf; then
-     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
--    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
-+    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
-   fi
- 
-   # We used to test for /lib/ld.so.1 and disable shared libraries on
-diff -rcp ../binutils-2.20.51.0.7.original/binutils/configure ./binutils/configure
---- a/binutils/configure	2010-04-08 14:53:45.000000000 +0100
-+++ b/binutils/configure	2010-04-08 14:56:21.000000000 +0100
-@@ -10560,10 +10560,34 @@
-   # before this can be enabled.
-   hardcode_into_libs=yes
- 
-+  # find out which ABI we are using
-+  libsuff=
-+  case "$host_cpu" in
-+  x86_64*|s390*|powerpc*|ppc*|sparc*)
-+    echo 'int i;' > conftest.$ac_ext
-+    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
-+  (eval $ac_compile) 2>&5
-+  ac_status=$?
-+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
-+  (exit $ac_status); }; then
-+      case `/usr/bin/file conftest.$ac_objext` in
-+      *64-bit*)
-+        libsuff=64
-+        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
-+          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
-+        fi
-+        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
-+        ;;
-+      esac
-+    fi
-+    rm -rf conftest*
-+    ;;
-+  esac
-+
-   # Append ld.so.conf contents to the search path
-   if test -f /etc/ld.so.conf; then
-     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
--    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
-+    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
-   fi
- 
-   # We used to test for /lib/ld.so.1 and disable shared libraries on
-diff -rcp ../binutils-2.20.51.0.7.original/gas/configure ./gas/configure
---- a/gas/configure	2010-04-08 14:53:47.000000000 +0100
-+++ b/gas/configure	2010-04-08 14:57:24.000000000 +0100
-@@ -10547,10 +10547,34 @@
-   # before this can be enabled.
-   hardcode_into_libs=yes
- 
-+  # find out which ABI we are using
-+  libsuff=
-+  case "$host_cpu" in
-+  x86_64*|s390*|powerpc*|ppc*|sparc*)
-+    echo 'int i;' > conftest.$ac_ext
-+    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
-+  (eval $ac_compile) 2>&5
-+  ac_status=$?
-+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
-+  (exit $ac_status); }; then
-+      case `/usr/bin/file conftest.$ac_objext` in
-+      *64-bit*)
-+        libsuff=64
-+        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
-+          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
-+        fi
-+        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
-+        ;;
-+      esac
-+    fi
-+    rm -rf conftest*
-+    ;;
-+  esac
-+
-   # Append ld.so.conf contents to the search path
-   if test -f /etc/ld.so.conf; then
-     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
--    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
-+    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
-   fi
- 
-   # We used to test for /lib/ld.so.1 and disable shared libraries on
-diff -rcp ../binutils-2.20.51.0.7.original/gprof/configure ./gprof/configure
---- a/gprof/configure	2010-04-08 14:53:45.000000000 +0100
-+++ b/gprof/configure	2010-04-08 14:57:50.000000000 +0100
-@@ -10485,10 +10485,34 @@
-   # before this can be enabled.
-   hardcode_into_libs=yes
- 
-+  # find out which ABI we are using
-+  libsuff=
-+  case "$host_cpu" in
-+  x86_64*|s390*|powerpc*|ppc*|sparc*)
-+    echo 'int i;' > conftest.$ac_ext
-+    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
-+  (eval $ac_compile) 2>&5
-+  ac_status=$?
-+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
-+  (exit $ac_status); }; then
-+      case `/usr/bin/file conftest.$ac_objext` in
-+      *64-bit*)
-+        libsuff=64
-+        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
-+          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
-+        fi
-+        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
-+        ;;
-+      esac
-+    fi
-+    rm -rf conftest*
-+    ;;
-+  esac
-+
-   # Append ld.so.conf contents to the search path
-   if test -f /etc/ld.so.conf; then
-     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
--    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
-+    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
-   fi
- 
-   # We used to test for /lib/ld.so.1 and disable shared libraries on
-diff -rcp ../binutils-2.20.51.0.7.original/ld/configure ./ld/configure
---- a/ld/configure	2010-04-08 14:53:44.000000000 +0100
-+++ b/ld/configure	2010-04-08 14:58:21.000000000 +0100
-@@ -10966,10 +10966,34 @@
-   # before this can be enabled.
-   hardcode_into_libs=yes
- 
-+  # find out which ABI we are using
-+  libsuff=
-+  case "$host_cpu" in
-+  x86_64*|s390*|powerpc*|ppc*|sparc*)
-+    echo 'int i;' > conftest.$ac_ext
-+    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
-+  (eval $ac_compile) 2>&5
-+  ac_status=$?
-+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
-+  (exit $ac_status); }; then
-+      case `/usr/bin/file conftest.$ac_objext` in
-+      *64-bit*)
-+        libsuff=64
-+        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
-+          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
-+        fi
-+        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
-+        ;;
-+      esac
-+    fi
-+    rm -rf conftest*
-+    ;;
-+  esac
-+
-   # Append ld.so.conf contents to the search path
-   if test -f /etc/ld.so.conf; then
-     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
--    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
-+    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
-   fi
- 
-   # We used to test for /lib/ld.so.1 and disable shared libraries on
-Only in .: .#libtool.m4
-Only in .: #libtool.m4#
-diff -rcp ../binutils-2.20.51.0.7.original/opcodes/configure ./opcodes/configure
---- a/opcodes/configure	2010-04-08 14:53:45.000000000 +0100

_service:extract_file:binutils-2.22.52.0.4-no-config-h-check.patch Deleted

_service:extract_file:binutils-2.27-aarch64-ifunc.patch Deleted

_service:extract_file:export-demangle.h-in-devel-package.patch Deleted

@@ -1,48 +0,0 @@
-From 85f7739c1c9cfcd143b4192204246f4fe5dafeed Mon Sep 17 00:00:00 2001
-From: openEuler Buildteam <buildteam@openeuler.org>
-Date: Sat, 11 Jan 2020 13:34:40 +0800
-Subject: PATCH export demangle.h in devel package
-
----
- bfd/Makefile.am | 2 +-
- bfd/Makefile.in | 4 ++--
- 2 files changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index 6a39ef5..ddc3b54 100644
---- a/bfd/Makefile.am
-+++ b/bfd/Makefile.am
-@@ -33,7 +33,7 @@ bfdlibdir = @bfdlibdir@
- bfdincludedir = @bfdincludedir@
- bfdlib_LTLIBRARIES = libbfd.la
- bfdinclude_HEADERS = $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
--		     $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
-+		     $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
- else !INSTALL_LIBBFD
- # Empty these so that the respective installation directories will not be created.
- bfdlibdir =
-diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index 80499d6..09a93b9 100644
---- a/bfd/Makefile.in
-+++ b/bfd/Makefile.in
-@@ -249,7 +249,7 @@ am__can_run_installinfo = \
-   esac
- am__bfdinclude_HEADERS_DIST = $(INCDIR)/plugin-api.h bfd.h \
- 	$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
--	$(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
-+	$(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
- HEADERS = $(bfdinclude_HEADERS)
- RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive	\
-   distclean-recursive maintainer-clean-recursive
-@@ -468,7 +468,7 @@ libbfd_la_LDFLAGS = $(am__append_1) -release `cat libtool-soversion` \
- @INSTALL_LIBBFD_FALSE@bfdinclude_HEADERS = $(am__append_2)
- @INSTALL_LIBBFD_TRUE@bfdinclude_HEADERS = $(BFD_H) \
- @INSTALL_LIBBFD_TRUE@	$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
--@INSTALL_LIBBFD_TRUE@	$(INCDIR)/diagnostics.h \
-+@INSTALL_LIBBFD_TRUE@	$(INCDIR)/diagnostics.h $(INCDIR)/demangle.h \
- @INSTALL_LIBBFD_TRUE@	$(INCDIR)/bfdlink.h $(am__append_2)
- @INSTALL_LIBBFD_FALSE@rpath_bfdlibdir = @bfdlibdir@
- @INSTALL_LIBBFD_FALSE@noinst_LTLIBRARIES = libbfd.la
--- 
-1.8.3.1
-

_service:tar_scm:0001-x86-Add-int1-as-one-byte-opcode-0xf1.patch Added

@@ -0,0 +1,155 @@
+From 154b353f689cad41ed9455088b3dede30d9f2e00 Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Wed, 14 Jul 2021 14:17:48 -0700
+Subject: PATCH x86: Add int1 as one byte opcode 0xf1
+
+Also change the x86 disassembler to disassemble 0xf1 as int1, instead of
+icebp.
+
+gas/
+
+	PR gas/28088
+	* testsuite/gas/i386/opcode.s: Add int1.
+	* testsuite/gas/i386/x86-64-opcode.s: Add int1, int3 and int.
+	* testsuite/gas/i386/opcode-intel.d: Updated.
+	* testsuite/gas/i386/opcode-suffix.d: Likewise.
+	* testsuite/gas/i386/opcode.d: Likewise.
+	* testsuite/gas/i386/x86-64-opcode.d: Likewise.
+
+opcodes/
+
+	PR gas/28088
+	* i386-dis.c (dis386): Replace icebp with int1.
+	* i386-opc.tbl: Add int1.
+	* i386-tbl.h: Regenerate.
+
+diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d
+index 68e1e8810e6..732b033c916 100644
+--- a/gas/testsuite/gas/i386/opcode-intel.d
++++ b/gas/testsuite/gas/i386/opcode-intel.d
+@@ -588,6 +588,7 @@ Disassembly of section .text:
+  *0-9a-f+:	85 c3  	*test 	+ebx,eax
+  *0-9a-f+:	85 d8  	*test 	+eax,ebx
+  *0-9a-f+:	85 18  	*test 	+(DWORD PTR )?\eax\,ebx
++ *0-9a-f+:	f1 	+int1 	+
+  	*a-f0-9+:	0f 4a 90 90 90 90 90 	cmovp  edx,DWORD PTR \eax-0x6f6f6f70\
+  	*a-f0-9+:	0f 4b 90 90 90 90 90 	cmovnp edx,DWORD PTR \eax-0x6f6f6f70\
+  	*a-f0-9+:	66 0f 4a 90 90 90 90 90 	cmovp  dx,WORD PTR \eax-0x6f6f6f70\
+diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d
+index 8d7716b6fa8..6a9c4cd8717 100644
+--- a/gas/testsuite/gas/i386/opcode-suffix.d
++++ b/gas/testsuite/gas/i386/opcode-suffix.d
+@@ -588,6 +588,7 @@ Disassembly of section .text:
+  *0-9a-f+:	85 c3  	*testl 	+%eax,%ebx
+  *0-9a-f+:	85 d8  	*testl 	+%ebx,%eax
+  *0-9a-f+:	85 18  	*testl 	+%ebx,$%eax$
++ *0-9a-f+:	f1 	+int1 	+
+  	*a-f0-9+:	0f 4a 90 90 90 90 90 	cmovpl -0x6f6f6f70$%eax$,%edx
+  	*a-f0-9+:	0f 4b 90 90 90 90 90 	cmovnpl -0x6f6f6f70$%eax$,%edx
+  	*a-f0-9+:	66 0f 4a 90 90 90 90 90 	cmovpw -0x6f6f6f70$%eax$,%dx
+diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d
+index cc57b9edb80..9c1f67f5fd1 100644
+--- a/gas/testsuite/gas/i386/opcode.d
++++ b/gas/testsuite/gas/i386/opcode.d
+@@ -587,6 +587,7 @@ Disassembly of section .text:
+  9f5:	85 c3  	*test   %eax,%ebx
+  9f7:	85 d8  	*test   %ebx,%eax
+  9f9:	85 18  	*test   %ebx,$%eax$
++ 9fb:	f1  	*int1   
+  	*a-f0-9+:	0f 4a 90 90 90 90 90 	cmovp  -0x6f6f6f70$%eax$,%edx
+  	*a-f0-9+:	0f 4b 90 90 90 90 90 	cmovnp -0x6f6f6f70$%eax$,%edx
+  	*a-f0-9+:	66 0f 4a 90 90 90 90 90 	cmovp  -0x6f6f6f70$%eax$,%dx
+diff --git a/gas/testsuite/gas/i386/opcode.s b/gas/testsuite/gas/i386/opcode.s
+index 1f803c38e5d..d3255f2b80c 100644
+--- a/gas/testsuite/gas/i386/opcode.s
++++ b/gas/testsuite/gas/i386/opcode.s
+@@ -585,6 +585,8 @@ foo:
+  test   %ebx,%eax
+  test   (%eax),%ebx
+ 
++ int1
++
+  cmovpe  0x90909090(%eax),%edx
+  cmovpo 0x90909090(%eax),%edx
+  cmovpe  0x90909090(%eax),%dx
+diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d
+index ab55d2ca350..c925938fdc4 100644
+--- a/gas/testsuite/gas/i386/x86-64-opcode.d
++++ b/gas/testsuite/gas/i386/x86-64-opcode.d
+@@ -325,6 +325,9 @@ Disassembly of section .text:
+  	*a-f0-9+:	48 0f 07             	sysretq *
+  	*a-f0-9+:	0f 01 f8             	swapgs 
+  	*a-f0-9+:	66 68 22 22          	pushw  \$0x2222
++ 	*a-f0-9+:	f1                   	int1 +
++ 	*a-f0-9+:	cc                   	int3 +
++ 	*a-f0-9+:	cd 90                	int    \$0x90
+  	*a-f0-9+:	f6 c9 01             	test   \$(0x)?0*1,%cl
+  	*a-f0-9+:	66 f7 c9 02 00       	test   \$(0x)?0*2,%cx
+  	*a-f0-9+:	f7 c9 04 00 00 00    	test   \$(0x)?0*4,%ecx
+diff --git a/gas/testsuite/gas/i386/x86-64-opcode.s b/gas/testsuite/gas/i386/x86-64-opcode.s
+index 28c100f812e..6575cc33438 100644
+--- a/gas/testsuite/gas/i386/x86-64-opcode.s
++++ b/gas/testsuite/gas/i386/x86-64-opcode.s
+@@ -454,6 +454,10 @@
+ 
+ 	pushw $0x2222
+ 
++	int1
++	int3
++	int    $0x90
++
+ 	.byte 0xf6, 0xc9, 0x01
+ 	.byte 0x66, 0xf7, 0xc9, 0x02, 0x00
+ 	.byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 21e40850544..122f4af0b46 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -1965,7 +1965,7 @@ static const struct dis386 dis386 = {
+   { "outG",		{ indirDX, zAX }, 0 },
+   /* f0 */
+   { Bad_Opcode },	/* lock prefix */
+-  { "icebp",		{ XX }, 0 },
++  { "int1",		{ XX }, 0 },
+   { Bad_Opcode },	/* repne */
+   { Bad_Opcode },	/* repz */
+   { "hlt",		{ XX }, 0 },
+diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
+index b0530e5fb82..49e72d28b56 100644
+--- a/opcodes/i386-opc.tbl
++++ b/opcodes/i386-opc.tbl
+@@ -537,6 +537,7 @@ bts, 0xfba, 5, Cpu386, Modrm|No_bSuf|No_sSuf|No_ldSuf|HLEPrefixLock, { Imm8, Reg
+ // See gas/config/tc-i386.c for conversion of 'int $3' into the special
+ // int 3 insn.
+ int, 0xcd, None, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8 }
++int1, 0xf1, None, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
+ int3, 0xcc, None, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
+ into, 0xce, None, CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
+ iret, 0xcf, None, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, {}
+diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
+index df139ba6121..15c0b47a915 100644
+--- a/opcodes/i386-tbl.h
++++ b/opcodes/i386-tbl.h
+@@ -5229,6 +5229,19 @@ const insn_template i386_optab =
+         0, 0, 0, 0, 0, 0 } },
+     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 	  0, 0, 0, 0, 0, 0, 0 } } } },
++  { "int1", 0xf1, None, 0,
++    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
++      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
++    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++        0, 0, 0, 0, 0, 0 } },
++    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
++	  0, 0, 0, 0, 0, 0, 0 } } } },
+   { "int3", 0xcc, None, 0,
+     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+-- 
+2.33.0
+

_service:tar_scm:0002-x86-drop-OP_Mask.patch Added

@@ -0,0 +1,255 @@
+From d0579d4d1c724b524da43ad164ce140218497ead Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:01:09 +0200
+Subject: PATCH x86: drop OP_Mask()
+
+By moving its vex.r check there it becomes fully redundant with OP_G().
+
+diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
+index 50a11f417ad..2ed8f6730c5 100644
+--- a/opcodes/i386-dis-evex-prefix.h
++++ b/opcodes/i386-dis-evex-prefix.h
+@@ -151,9 +151,9 @@
+   },
+   /* PREFIX_EVEX_0FC2 */
+   {
+-    { "vcmppX",	{ XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
++    { "vcmppX",	{ MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+     { VEX_W_TABLE (EVEX_W_0FC2_P_1) },
+-    { "vcmppX",	{ XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
++    { "vcmppX",	{ MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+     { VEX_W_TABLE (EVEX_W_0FC2_P_3) },
+   },
+   /* PREFIX_EVEX_0FE6 */
+@@ -238,14 +238,14 @@
+   /* PREFIX_EVEX_0F3826 */
+   {
+     { Bad_Opcode },
+-    { "vptestnm%BW",	{ XMask, Vex, EXx }, 0 },
+-    { "vptestm%BW",	{ XMask, Vex, EXx }, 0 },
++    { "vptestnm%BW",	{ MaskG, Vex, EXx }, 0 },
++    { "vptestm%BW",	{ MaskG, Vex, EXx }, 0 },
+   },
+   /* PREFIX_EVEX_0F3827 */
+   {
+     { Bad_Opcode },
+-    { "vptestnm%DQ",	{ XMask, Vex, EXx }, 0 },
+-    { "vptestm%DQ",	{ XMask, Vex, EXx }, 0 },
++    { "vptestnm%DQ",	{ MaskG, Vex, EXx }, 0 },
++    { "vptestm%DQ",	{ MaskG, Vex, EXx }, 0 },
+   },
+   /* PREFIX_EVEX_0F3828 */
+   {
+@@ -256,7 +256,7 @@
+   /* PREFIX_EVEX_0F3829 */
+   {
+     { Bad_Opcode },
+-    { "vpmov%BW2m",	{ XMask, EXx }, 0 },
++    { "vpmov%BW2m",	{ MaskG, EXx }, 0 },
+     { VEX_W_TABLE (EVEX_W_0F3829_P_2) },
+   },
+   /* PREFIX_EVEX_0F382A */
+@@ -310,7 +310,7 @@
+   /* PREFIX_EVEX_0F3839 */
+   {
+     { Bad_Opcode },
+-    { "vpmov%DQ2m",	{ XMask, EXx }, 0 },
++    { "vpmov%DQ2m",	{ MaskG, EXx }, 0 },
+     { "vpmins%DQ",	{ XM, Vex, EXx }, 0 },
+   },
+   /* PREFIX_EVEX_0F383A */
+@@ -338,7 +338,7 @@
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { Bad_Opcode },
+-    { "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 },
++    { "vp2intersect%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_0F3872 */
+   {
+diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
+index 637ab846562..2c7d9bc2e34 100644
+--- a/opcodes/i386-dis-evex-w.h
++++ b/opcodes/i386-dis-evex-w.h
+@@ -142,7 +142,7 @@
+   },
+   /* EVEX_W_0F66 */
+   {
+-    { "vpcmpgtd",	{ XMask, Vex, EXx }, PREFIX_DATA },
++    { "vpcmpgtd",	{ MaskG, Vex, EXx }, PREFIX_DATA },
+   },
+   /* EVEX_W_0F6A */
+   {
+@@ -201,7 +201,7 @@
+   },
+   /* EVEX_W_0F76 */
+   {
+-    { "vpcmpeqd",	{ XMask, Vex, EXx }, PREFIX_DATA },
++    { "vpcmpeqd",	{ MaskG, Vex, EXx }, PREFIX_DATA },
+   },
+   /* EVEX_W_0F78_P_0 */
+   {
+@@ -270,12 +270,12 @@
+   },
+   /* EVEX_W_0FC2_P_1 */
+   {
+-    { "vcmpss",	{ XMask, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
++    { "vcmpss",	{ MaskG, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
+   },
+   /* EVEX_W_0FC2_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vcmpsd",	{ XMask, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
++    { "vcmpsd",	{ MaskG, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
+   },
+   /* EVEX_W_0FD2 */
+   {
+@@ -450,7 +450,7 @@
+   /* EVEX_W_0F3829_P_2 */
+   {
+     { Bad_Opcode },
+-    { "vpcmpeqq",	{ XMask, Vex, EXx }, 0 },
++    { "vpcmpeqq",	{ MaskG, Vex, EXx }, 0 },
+   },
+   /* EVEX_W_0F382A_P_1 */
+   {
+@@ -496,7 +496,7 @@
+   /* EVEX_W_0F3837 */
+   {
+     { Bad_Opcode },
+-    { "vpcmpgtq",	{ XMask, Vex, EXx }, PREFIX_DATA },
++    { "vpcmpgtq",	{ MaskG, Vex, EXx }, PREFIX_DATA },
+   },
+   /* EVEX_W_0F383A_P_1 */
+   {
+diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
+index 151f61d95a4..5f1ebaded85 100644
+--- a/opcodes/i386-dis-evex.h
++++ b/opcodes/i386-dis-evex.h
+@@ -114,8 +114,8 @@ static const struct dis386 evex_table256 = {
+     { "vpunpcklwd",	{ XM, Vex, EXx }, PREFIX_DATA },
+     { VEX_W_TABLE (EVEX_W_0F62) },
+     { "vpacksswb",	{ XM, Vex, EXx }, PREFIX_DATA },
+-    { "vpcmpgtb",	{ XMask, Vex, EXx }, PREFIX_DATA },
+-    { "vpcmpgtw",	{ XMask, Vex, EXx }, PREFIX_DATA },
++    { "vpcmpgtb",	{ MaskG, Vex, EXx }, PREFIX_DATA },
++    { "vpcmpgtw",	{ MaskG, Vex, EXx }, PREFIX_DATA },
+     { VEX_W_TABLE (EVEX_W_0F66) },
+     { "vpackuswb",	{ XM, Vex, EXx }, PREFIX_DATA },
+     /* 68 */
+@@ -132,8 +132,8 @@ static const struct dis386 evex_table256 = {
+     { REG_TABLE (REG_EVEX_0F71) },
+     { REG_TABLE (REG_EVEX_0F72) },
+     { REG_TABLE (REG_EVEX_0F73) },
+-    { "vpcmpeqb",	{ XMask, Vex, EXx }, PREFIX_DATA },
+-    { "vpcmpeqw",	{ XMask, Vex, EXx }, PREFIX_DATA },
++    { "vpcmpeqb",	{ MaskG, Vex, EXx }, PREFIX_DATA },
++    { "vpcmpeqw",	{ MaskG, Vex, EXx }, PREFIX_DATA },
+     { VEX_W_TABLE (EVEX_W_0F76) },
+     { Bad_Opcode },
+     /* 78 */
+@@ -453,7 +453,7 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { "vperm%BW",	{ XM, Vex, EXx }, PREFIX_DATA },
+     { Bad_Opcode },
+-    { "vpshufbitqmb",  { XMask, Vex, EXx }, PREFIX_DATA },
++    { "vpshufbitqmb",  { MaskG, Vex, EXx }, PREFIX_DATA },
+     /* 90 */
+     { "vpgatherd%DQ",	{ XMGatherD, MVexVSIBDWpX }, PREFIX_DATA },
+     { "vpgatherq%DQ",	{ XMGatherQ, MVexVSIBQWpX }, PREFIX_DATA },
+@@ -617,8 +617,8 @@ static const struct dis386 evex_table256 = {
+     { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B) },
+     { Bad_Opcode },
+     { VEX_W_TABLE (VEX_W_0F3A1D) },
+-    { "vpcmpu%DQ",	{ XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+-    { "vpcmp%DQ",	{ XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
++    { "vpcmpu%DQ",	{ MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
++    { "vpcmp%DQ",	{ MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
+     /* 20 */
+     { VEX_LEN_TABLE (VEX_LEN_0F3A20) },
+     { VEX_W_TABLE (EVEX_W_0F3A21) },
+@@ -653,8 +653,8 @@ static const struct dis386 evex_table256 = {
+     { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) },
+     { Bad_Opcode },
+     { Bad_Opcode },
+-    { "vpcmpu%BW",	{ XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+-    { "vpcmp%BW",	{ XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
++    { "vpcmpu%BW",	{ MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
++    { "vpcmp%BW",	{ MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
+     /* 40 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -698,8 +698,8 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { Bad_Opcode },
+-    { "vfpclassp%XW%XZ",	{ XMask, EXx, Ib }, PREFIX_DATA },
+-    { "vfpclasss%XW",	{ XMask, EXVexWdqScalar, Ib }, PREFIX_DATA },
++    { "vfpclassp%XW%XZ",	{ MaskG, EXx, Ib }, PREFIX_DATA },
++    { "vfpclasss%XW",	{ MaskG, EXVexWdqScalar, Ib }, PREFIX_DATA },
+     /* 68 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 122f4af0b46..f88276ced6b 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -116,8 +116,6 @@ static void FXSAVE_Fixup (int, int);
+ 
+ static void MOVSXD_Fixup (int, int);

_service:tar_scm:0003-x86-correct-VCVT-U-SI2SD-rounding-mode-handling.patch Added

@@ -0,0 +1,173 @@
+From be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:02:08 +0200
+Subject: PATCH x86: correct VCVT{,U}SI2SD rounding mode handling
+
+With EVEX.W clear the instruction doesn't ignore the rounding mode, but
+(like for other insns without rounding semantics) EVEX.b set causes #UD.
+Hence the handling of EVEX.W needs to be done when processing
+evex_rounding_64_mode, not at the decode stages.
+
+Derive a new 64-bit testcase from the 32-bit one to cover the different
+EVEX.W treatment in both cases.
+
+diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d
+index 2fbe295b86b..b02bca39098 100644
+--- a/gas/testsuite/gas/i386/evex.d
++++ b/gas/testsuite/gas/i386/evex.d
+@@ -1,5 +1,5 @@
+ #objdump: -dw -Msuffix
+-#name: i386 EVX insns
++#name: i386 EVEX insns
+ 
+ .*: +file format .*
+ 
+@@ -8,9 +8,12 @@ Disassembly of section .text:
+ 
+ 0+ <_start>:
+  +a-f0-9+:	62 f1 d6 38 2a f0    	vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 2a f0    	vcvtsi2sdl %eax,$bad$,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 38 2a f0    	vcvtsi2sdl %eax,$bad$,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d6 08 7b f0    	vcvtusi2ssl %eax,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 08 7b f0    	vcvtusi2sdl %eax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 08 7b f0    	vcvtusi2sdl %eax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d6 38 7b f0    	vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sdl %eax,$bad$,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 38 7b f0    	vcvtusi2sdl %eax,$bad$,%xmm5,%xmm6
+ #pass
+diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s
+index a64cc573dcd..90c635a27b6 100644
+--- a/gas/testsuite/gas/i386/evex.s
++++ b/gas/testsuite/gas/i386/evex.s
+@@ -4,8 +4,11 @@
+ 	.text
+ _start:
+ 	.byte 0x62, 0xf1, 0xd6, 0x38, 0x2a, 0xf0
++	.byte 0x62, 0xf1, 0x57, 0x38, 0x2a, 0xf0
+ 	.byte 0x62, 0xf1, 0xd7, 0x38, 0x2a, 0xf0
+ 	.byte 0x62, 0xf1, 0xd6, 0x08, 0x7b, 0xf0
++	.byte 0x62, 0xf1, 0x57, 0x08, 0x7b, 0xf0
+ 	.byte 0x62, 0xf1, 0xd7, 0x08, 0x7b, 0xf0
+ 	.byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0
++	.byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0
+ 	.byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0
+diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
+index 1e0a363a803..6f9543eec3a 100644
+--- a/gas/testsuite/gas/i386/i386.exp
++++ b/gas/testsuite/gas/i386/i386.exp
+@@ -929,6 +929,7 @@ if gas_64_check then {
+     run_dump_test "x86-64-avx512er-intel"
+     run_dump_test "x86-64-avx512pf"
+     run_dump_test "x86-64-avx512pf-intel"
++    run_dump_test "x86-64-evex"
+     run_dump_test "x86-64-evex-lig256"
+     run_dump_test "x86-64-evex-lig512"
+     run_dump_test "x86-64-evex-lig256-intel"
+diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d
+new file mode 100644
+index 00000000000..b360aa74a17
+--- /dev/null
++++ b/gas/testsuite/gas/i386/x86-64-evex.d
+@@ -0,0 +1,20 @@
++#objdump: -dw
++#name: x86-64 EVEX insns
++#source: evex.s
++
++.*: +file format .*
++
++
++Disassembly of section .text:
++
++0+ <_start>:
++ +a-f0-9+:	62 f1 d6 38 2a f0    	vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 2a f0    	vcvtsi2sd %eax,$bad$,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 d7 38 2a f0    	vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6
++ +a-f0-9+:	62 f1 d6 08 7b f0    	vcvtusi2ss %rax,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 08 7b f0    	vcvtusi2sd %eax,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 d7 08 7b f0    	vcvtusi2sd %rax,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 d6 38 7b f0    	vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sd %eax,$bad$,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 d7 38 7b f0    	vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
++#pass
+diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
+index 2ed8f6730c5..9ad9372a221 100644
+--- a/opcodes/i386-dis-evex-prefix.h
++++ b/opcodes/i386-dis-evex-prefix.h
+@@ -30,7 +30,7 @@
+     { Bad_Opcode },
+     { "vcvtsi2ss{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
+     { Bad_Opcode },
+-    { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
++    { "vcvtsi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+   },
+   /* PREFIX_EVEX_0F51 */
+   {
+@@ -134,7 +134,7 @@
+     { Bad_Opcode },
+     { "vcvtusi2ss{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
+     { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
+-    { VEX_W_TABLE (EVEX_W_0F7B_P_3) },
++    { "vcvtusi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+   },
+   /* PREFIX_EVEX_0F7E */
+   {
+diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
+index 2c7d9bc2e34..8af4695a004 100644
+--- a/opcodes/i386-dis-evex-w.h
++++ b/opcodes/i386-dis-evex-w.h
+@@ -37,11 +37,6 @@
+   {
+     { "vmovshdup",	{ XM, EXx }, 0 },
+   },
+-  /* EVEX_W_0F2A_P_3 */
+-  {
+-    { "vcvtsi2sd{%LQ|}",	{ XMScalar, VexScalar, Ed }, 0 },
+-    { "vcvtsi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+-  },
+   /* EVEX_W_0F51_P_1 */
+   {
+     { "vsqrtss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
+@@ -243,11 +238,6 @@
+     { "vcvtps2qq",	{ XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
+     { "vcvtpd2qq",	{ XM, EXx, EXxEVexR }, 0 },
+   },
+-  /* EVEX_W_0F7B_P_3 */
+-  {
+-    { "vcvtusi2sd{%LQ|}",	{ XMScalar, VexScalar, Ed }, 0 },
+-    { "vcvtusi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+-  },
+   /* EVEX_W_0F7E_P_1 */
+   {
+     { Bad_Opcode },
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index f88276ced6b..ccc49ff023f 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -1476,7 +1476,6 @@ enum
+   EVEX_W_0F12_P_3,
+   EVEX_W_0F16_P_0_M_1,
+   EVEX_W_0F16_P_1,
+-  EVEX_W_0F2A_P_3,
+   EVEX_W_0F51_P_1,
+   EVEX_W_0F51_P_3,
+   EVEX_W_0F58_P_1,
+@@ -1521,7 +1520,6 @@ enum
+   EVEX_W_0F7A_P_2,
+   EVEX_W_0F7A_P_3,
+   EVEX_W_0F7B_P_2,
+-  EVEX_W_0F7B_P_3,
+   EVEX_W_0F7E_P_1,
+   EVEX_W_0F7F_P_1,
+   EVEX_W_0F7F_P_2,
+@@ -13724,7 +13722,7 @@ OP_Rounding (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+     switch (bytemode)
+       {
+       case evex_rounding_64_mode:
+-	if (address_mode != mode_64bit)
++	if (address_mode != mode_64bit || !vex.w)
+ 	  {
+ 	    oappend ("(bad)");
+ 	    break;
+-- 
+2.33.0
+

_service:tar_scm:0004-x86-64-generalize-OP_G-s-EVEX.R-handling.patch Added

@@ -0,0 +1,70 @@
+From 3fa77affb00ef5d9bcb7f080750625749cdfa611 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:02:54 +0200
+Subject: PATCH x86-64: generalize OP_G()'s EVEX.R' handling
+
+EVEX.R' is invalid to be clear not only for mask registers, but also for
+GPRs - IOW everything handled in this function.
+
+diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d
+index b02bca39098..367b2eb1321 100644
+--- a/gas/testsuite/gas/i386/evex.d
++++ b/gas/testsuite/gas/i386/evex.d
+@@ -16,4 +16,6 @@ Disassembly of section .text:
+  +a-f0-9+:	62 f1 d6 38 7b f0    	vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+  +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sdl %eax,$bad$,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 38 7b f0    	vcvtusi2sdl %eax,$bad$,%xmm5,%xmm6
++ +a-f0-9+:	62 e1 7e 08 2d c0    	vcvtss2si %xmm0,%eax
++ +a-f0-9+:	62 e1 7c 08 c2 c0 00 	vcmpeqps %xmm0,%xmm0,%k0
+ #pass
+diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s
+index 90c635a27b6..ff6cb43499b 100644
+--- a/gas/testsuite/gas/i386/evex.s
++++ b/gas/testsuite/gas/i386/evex.s
+@@ -12,3 +12,5 @@ _start:
+ 	.byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0
+ 	.byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0
+ 	.byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0
++	.byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
++	.byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
+diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d
+index b360aa74a17..3a7b48e0bf9 100644
+--- a/gas/testsuite/gas/i386/x86-64-evex.d
++++ b/gas/testsuite/gas/i386/x86-64-evex.d
+@@ -17,4 +17,6 @@ Disassembly of section .text:
+  +a-f0-9+:	62 f1 d6 38 7b f0    	vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+  +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sd %eax,$bad$,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 38 7b f0    	vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
++ +a-f0-9+:	62 e1 7e 08 2d c0    	vcvtss2si %xmm0,$bad$
++ +a-f0-9+:	62 e1 7c 08 c2 c0 00 	vcmpeqps %xmm0,%xmm0,$bad$
+ #pass
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index ccc49ff023f..e95d2ef9d64 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -11934,6 +11934,13 @@ OP_G (int bytemode, int sizeflag)
+ {
+   int add = 0;
+   const char **names;
++
++  if (vex.evex && !vex.r && address_mode == mode_64bit)
++    {
++      oappend ("(bad)");
++      return;
++    }
++
+   USED_REX (REX_R);
+   if (rex & REX_R)
+     add += 8;
+@@ -12012,7 +12019,7 @@ OP_G (int bytemode, int sizeflag)
+       break;
+     case mask_bd_mode:
+     case mask_mode:
+-      if (add || (vex.evex && !vex.r))
++      if (add)
+ 	{
+ 	  oappend ("(bad)");
+ 	  return;
+-- 
+2.33.0
+

_service:tar_scm:0005-x86-64-properly-bounds-check-bnd-N-in-OP_G.patch Added

@@ -0,0 +1,61 @@
+From bac11f2cfe7913ef4c37af608454451e27f78eff Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:03:16 +0200
+Subject: PATCH x86-64: properly bounds-check %bnd<N> in OP_G()
+
+The restriction to %bnd0-%bnd3 requires to also check REX.R is clear,
+just like OP_E_Register() also includes REX.B in its check.
+
+diff --git a/gas/testsuite/gas/i386/x86-64-mpx.d b/gas/testsuite/gas/i386/x86-64-mpx.d
+index f3217e07016..2f45af0d6e4 100644
+--- a/gas/testsuite/gas/i386/x86-64-mpx.d
++++ b/gas/testsuite/gas/i386/x86-64-mpx.d
+@@ -191,5 +191,7 @@ Disassembly of section .text:
+ a-f0-9+ <bad>:
+  	*a-f0-9+:	0f 1a 30             	bndldx $%rax$,$bad$
+  	*a-f0-9+:	66 0f 1a c4          	bndmov $bad$,%bnd0
++ 	*a-f0-9+:	66 41 0f 1a c0       	bndmov $bad$,%bnd0
++ 	*a-f0-9+:	66 44 0f 1a c0       	bndmov %bnd0,$bad$
+  	*a-f0-9+:	f3 0f 1b 05 90 90 90 90 	bndmk  $bad$,%bnd0
+ #pass
+diff --git a/gas/testsuite/gas/i386/x86-64-mpx.s b/gas/testsuite/gas/i386/x86-64-mpx.s
+index b113590cf76..3594d8e9c88 100644
+--- a/gas/testsuite/gas/i386/x86-64-mpx.s
++++ b/gas/testsuite/gas/i386/x86-64-mpx.s
+@@ -227,6 +227,20 @@ bad:
+ 	.byte 0x1a
+ 	.byte 0xc4
+ 
++	# bndmov with REX.B set
++	.byte 0x66
++	.byte 0x41
++	.byte 0x0f
++	.byte 0x1a
++	.byte 0xc0
++
++	# bndmov with REX.R set
++	.byte 0x66
++	.byte 0x44
++	.byte 0x0f
++	.byte 0x1a
++	.byte 0xc0
++
+ 	# bndmk (bad),%bnd0
+ 	.byte 0xf3
+ 	.byte 0x0f
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index e95d2ef9d64..203dcefa360 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -11966,7 +11966,7 @@ OP_G (int bytemode, int sizeflag)
+       oappend (names64modrm.reg + add);
+       break;
+     case bnd_mode:
+-      if (modrm.reg > 0x3)
++      if (modrm.reg + add > 0x3)
+ 	{
+ 	  oappend ("(bad)");
+ 	  return;
+-- 
+2.33.0
+

_service:tar_scm:0006-x86-fold-duplicate-register-printing-code.patch Added

@@ -0,0 +1,183 @@
+From 5f6b8397a40ca30460464e115c6aed8b7b6679f8 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:03:37 +0200
+Subject: PATCH x86: fold duplicate register printing code
+
+What so far was OP_E_register() can be easily reused also for OP_G().
+Add suitable parameters to the function and move the invocation of
+swap_operand() to OP_E(). Adjust MOVSXD's first operand: There never was
+a need to use movsxd_mode there, and its use gets in the way of the code
+folding.
+
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 203dcefa360..725b38b1dda 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -50,7 +50,6 @@ static void oappend (const char *);
+ static void append_seg (void);
+ static void OP_indirE (int, int);
+ static void print_operand_value (char *, int, bfd_vma);
+-static void OP_E_register (int, int);
+ static void OP_E_memory (int, int);
+ static void print_displacement (char *, bfd_vma);
+ static void OP_E (int, int);
+@@ -4180,7 +4179,7 @@ static const struct dis386 x86_64_table2 = {
+   /* X86_64_63 */
+   {
+     { "arpl", { Ew, Gw }, 0 },
+-    { "movs", { { OP_G, movsxd_mode }, { MOVSXD_Fixup, movsxd_mode } }, 0 },
++    { "movs", { Gv, { MOVSXD_Fixup, movsxd_mode } }, 0 },
+   },
+ 
+   /* X86_64_6D */
+@@ -11290,21 +11289,14 @@ intel_operand_size (int bytemode, int sizeflag)
+ }
+ 
+ static void
+-OP_E_register (int bytemode, int sizeflag)
++print_register (unsigned int reg, unsigned int rexmask, int bytemode, int sizeflag)
+ {
+-  int reg = modrm.rm;
+   const char **names;
+ 
+-  USED_REX (REX_B);
+-  if ((rex & REX_B))
++  USED_REX (rexmask);
++  if (rex & rexmask)
+     reg += 8;
+ 
+-  if ((sizeflag & SUFFIX_ALWAYS)
+-      && (bytemode == b_swap_mode
+-	  || bytemode == bnd_swap_mode
+-	  || bytemode == v_swap_mode))
+-    swap_operand ();
+-
+   switch (bytemode)
+     {
+     case b_mode:
+@@ -11924,7 +11916,15 @@ OP_E (int bytemode, int sizeflag)
+   codep++;
+ 
+   if (modrm.mod == 3)
+-    OP_E_register (bytemode, sizeflag);
++    {
++      if ((sizeflag & SUFFIX_ALWAYS)
++	  && (bytemode == b_swap_mode
++	      || bytemode == bnd_swap_mode
++	      || bytemode == v_swap_mode))
++	swap_operand ();
++
++      print_register (modrm.rm, REX_B, bytemode, sizeflag);
++    }
+   else
+     OP_E_memory (bytemode, sizeflag);
+ }
+@@ -11932,104 +11932,13 @@ OP_E (int bytemode, int sizeflag)
+ static void
+ OP_G (int bytemode, int sizeflag)
+ {
+-  int add = 0;
+-  const char **names;
+-
+   if (vex.evex && !vex.r && address_mode == mode_64bit)
+     {
+       oappend ("(bad)");
+       return;
+     }
+ 
+-  USED_REX (REX_R);
+-  if (rex & REX_R)
+-    add += 8;
+-  switch (bytemode)
+-    {
+-    case b_mode:
+-      if (modrm.reg & 4)
+-	USED_REX (0);
+-      if (rex)
+-	oappend (names8rexmodrm.reg + add);
+-      else
+-	oappend (names8modrm.reg + add);
+-      break;
+-    case w_mode:
+-      oappend (names16modrm.reg + add);
+-      break;
+-    case d_mode:
+-    case db_mode:
+-    case dw_mode:
+-      oappend (names32modrm.reg + add);
+-      break;
+-    case q_mode:
+-      oappend (names64modrm.reg + add);
+-      break;
+-    case bnd_mode:
+-      if (modrm.reg + add > 0x3)
+-	{
+-	  oappend ("(bad)");
+-	  return;
+-	}
+-      oappend (names_bndmodrm.reg);
+-      break;
+-    case v_mode:
+-    case dq_mode:
+-    case dqb_mode:
+-    case dqd_mode:
+-    case dqw_mode:
+-    case movsxd_mode:
+-      USED_REX (REX_W);
+-      if (rex & REX_W)
+-	oappend (names64modrm.reg + add);
+-      else if (bytemode != v_mode && bytemode != movsxd_mode)
+-	oappend (names32modrm.reg + add);
+-      else
+-	{
+-	  if (sizeflag & DFLAG)
+-	    oappend (names32modrm.reg + add);
+-	  else
+-	    oappend (names16modrm.reg + add);
+-	  used_prefixes |= (prefixes & PREFIX_DATA);
+-	}
+-      break;
+-    case va_mode:
+-      names = (address_mode == mode_64bit
+-	       ? names64 : names32);
+-      if (!(prefixes & PREFIX_ADDR))
+-	{
+-	  if (address_mode == mode_16bit)
+-	    names = names16;
+-	}
+-      else
+-	{
+-	  /* Remove "addr16/addr32".  */
+-	  all_prefixeslast_addr_prefix = 0;
+-	  names = (address_mode != mode_32bit
+-		       ? names32 : names16);
+-	  used_prefixes |= PREFIX_ADDR;
+-	}
+-      oappend (namesmodrm.reg + add);
+-      break;
+-    case m_mode:
+-      if (address_mode == mode_64bit)
+-	oappend (names64modrm.reg + add);
+-      else
+-	oappend (names32modrm.reg + add);
+-      break;
+-    case mask_bd_mode:
+-    case mask_mode:
+-      if (add)
+-	{
+-	  oappend ("(bad)");
+-	  return;
+-	}
+-      oappend (names_maskmodrm.reg);
+-      break;
+-    default:
+-      oappend (INTERNAL_DISASSEMBLER_ERROR);
+-      break;
+-    }
++  print_register (modrm.reg, REX_R, bytemode, sizeflag);
+ }
+ 
+ static bfd_vma
+-- 
+2.33.0
+

_service:tar_scm:0007-x86-fold-duplicate-code-in-MOVSXD_Fixup.patch Added

@@ -0,0 +1,56 @@
+From 4454883ff0ee338b1f6aab7f65ab1081af307e7c Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:03:53 +0200
+Subject: PATCH x86: fold duplicate code in MOVSXD_Fixup()
+
+There's no need to have two paths printing the "xd" mnemonic suffix.
+
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 725b38b1dda..ddb659fb041 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -13601,31 +13601,25 @@ MOVSXD_Fixup (int bytemode, int sizeflag)
+   switch (bytemode)
+     {
+     case movsxd_mode:
+-      if (intel_syntax)
++      if (!intel_syntax)
+ 	{
+-	  *p++ = 'x';
+-	  *p++ = 'd';
+-	  goto skip;
++	  USED_REX (REX_W);
++	  if (rex & REX_W)
++	    {
++	      *p++ = 'l';
++	      *p++ = 'q';
++	      break;
++	    }
+ 	}
+ 
+-      USED_REX (REX_W);
+-      if (rex & REX_W)
+-	{
+-	  *p++ = 'l';
+-	  *p++ = 'q';
+-	}
+-      else
+-	{
+-	  *p++ = 'x';
+-	  *p++ = 'd';
+-	}
++      *p++ = 'x';
++      *p++ = 'd';
+       break;
+     default:
+       oappend (INTERNAL_DISASSEMBLER_ERROR);
+       break;
+     }
+ 
+- skip:
+   mnemonicendp = p;
+   *p = '\0';
+   OP_E (bytemode, sizeflag);
+-- 
+2.33.0
+

_service:tar_scm:0008-x86-correct-EVEX.V-handling-outside-of-64-bit-mode.patch Added

@@ -0,0 +1,79 @@
+From 54ca11a48eba11788445247b16bc77637e3aa84a Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:07:27 +0200
+Subject: PATCH x86: correct EVEX.V' handling outside of 64-bit mode
+
+Unlike the high bit of VEX.vvvv / EVEX.vvvv, EVEX.V' is not ignored
+outside of 64-bit mode. Oddly enough there already are tests for these
+cases, but their expectations were wrong. (This may have been based on
+an old SDM version, where the restriction wasn't properly spelled out.)
+
+diff --git a/gas/testsuite/gas/i386/noextreg.d b/gas/testsuite/gas/i386/noextreg.d
+index 08bad494a80..ba175fc001e 100644
+--- a/gas/testsuite/gas/i386/noextreg.d
++++ b/gas/testsuite/gas/i386/noextreg.d
+@@ -13,14 +13,14 @@ Disassembly of section .text:
+  	*a-f0-9+:	62 f1 7d 08 db c0    	vpandd %xmm0,%xmm0,%xmm0
+  	*a-f0-9+:	62 d1 7d 08 db c0    	vpandd %xmm0,%xmm0,%xmm0
+  	*a-f0-9+:	62 f1 3d 08 db c0    	vpandd %xmm0,%xmm0,%xmm0
+- 	*a-f0-9+:	62 f1 7d 00 db c0    	vpandd %xmm0,%xmm0,%xmm0
++ 	*a-f0-9+:	62 f1 7d 00 db c0    	vpandd %xmm0,$bad$,%xmm0
+  	*a-f0-9+:	c4 e3 79 4c c0 00    	vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
+  	*a-f0-9+:	c4 c3 79 4c c0 00    	vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
+  	*a-f0-9+:	c4 e3 39 4c c0 00    	vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
+  	*a-f0-9+:	c4 e3 79 4c c0 80    	vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
+  	*a-f0-9+:	62 f2 7d 0f 90 0c 00 	vpgatherdd $%eax,%xmm0,1$,%xmm1\{%k7\}
+  	*a-f0-9+:	62 d2 7d 0f 90 0c 00 	vpgatherdd $%eax,%xmm0,1$,%xmm1\{%k7\}
+- 	*a-f0-9+:	62 f2 7d 07 90 0c 00 	vpgatherdd $%eax,%xmm0,1$,%xmm1\{%k7\}
++ 	*a-f0-9+:	62 f2 7d 07 90 0c 00 	vpgatherdd $%eax,\(bad$,1\),%xmm1\{%k7\}
+  	*a-f0-9+:	c4 e2 78 f2 00       	andn   $%eax$,%eax,%eax
+  	*a-f0-9+:	c4 e2 38 f2 00       	andn   $%eax$,%eax,%eax
+  	*a-f0-9+:	c4 c2 78 f2 00       	andn   $%eax$,%eax,%eax
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index ddb659fb041..267d58d535e 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -9316,7 +9316,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
+ 	  /* In 16/32-bit mode silently ignore following bits.  */
+ 	  rex &= ~REX_B;
+ 	  vex.r = 1;
+-	  vex.v = 1;
+ 	}
+ 
+       need_vex = 1;
+@@ -11718,8 +11717,13 @@ OP_E_memory (int bytemode, int sizeflag)
+ 		      *obufp = '\0';
+ 		    }
+ 		  if (haveindex)
+-		    oappend (address_mode == mode_64bit && !addr32flag
+-			     ? indexes64vindex : indexes32vindex);
++		    {
++		      if (address_mode == mode_64bit || vindex < 16)
++			oappend (address_mode == mode_64bit && !addr32flag
++				 ? indexes64vindex : indexes32vindex);
++		      else
++			oappend ("(bad)");
++		    }
+ 		  else
+ 		    oappend (address_mode == mode_64bit && !addr32flag
+ 			     ? index64 : index32);
+@@ -13256,7 +13260,15 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+   reg = vex.register_specifier;
+   vex.register_specifier = 0;
+   if (address_mode != mode_64bit)
+-    reg &= 7;
++    {
++      if (vex.evex && !vex.v)
++	{
++	  oappend ("(bad)");
++	  return;
++	}
++
++      reg &= 7;
++    }
+   else if (vex.evex && !vex.v)
+     reg += 16;
+ 
+-- 
+2.33.0
+

_service:tar_scm:0009-x86-drop-vex_mode-and-vex_scalar_mode.patch Added

@@ -0,0 +1,74 @@
+From 605228fcaf91a86b5ae898415374a9382c85f76f Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:07:42 +0200
+Subject: PATCH x86: drop vex_mode and vex_scalar_mode
+
+These are fully redundant with, respectively, x_mode and scalar_mode.
+
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 267d58d535e..20bf9b282c9 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -384,10 +384,10 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
+ #define XMM0 { XMM_Fixup, 0 }
+ #define FXSAVE { FXSAVE_Fixup, 0 }
+ 
+-#define Vex { OP_VEX, vex_mode }
+-#define VexW { OP_VexW, vex_mode }
+-#define VexScalar { OP_VEX, vex_scalar_mode }
+-#define VexScalarR { OP_VexR, vex_scalar_mode }
++#define Vex { OP_VEX, x_mode }
++#define VexW { OP_VexW, x_mode }
++#define VexScalar { OP_VEX, scalar_mode }
++#define VexScalarR { OP_VexR, scalar_mode }
+ #define VexGatherD { OP_VEX, vex_vsib_d_w_dq_mode }
+ #define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
+ #define VexGdq { OP_VEX, dq_mode }
+@@ -546,8 +546,6 @@ enum
+   dw_mode,
+   /* registers like dq_mode, memory like d_mode.  */
+   dqd_mode,
+-  /* normal vex mode */
+-  vex_mode,
+ 
+   /* Operand size depends on the VEX.W bit, with VSIB dword indices.  */
+   vex_vsib_d_w_dq_mode,
+@@ -558,8 +556,6 @@ enum
+ 
+   /* scalar, ignore vector length.  */
+   scalar_mode,
+-  /* like vex_mode, ignore vector length.  */
+-  vex_scalar_mode,
+   /* Operand size depends on the VEX.W bit, ignore vector length.  */
+   vex_scalar_w_dq_mode,
+ 
+@@ -13274,7 +13270,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+ 
+   switch (bytemode)
+     {
+-    case vex_scalar_mode:
++    case scalar_mode:
+       oappend (names_xmmreg);
+       return;
+ 
+@@ -13343,7 +13339,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+     case 128:
+       switch (bytemode)
+ 	{
+-	case vex_mode:
++	case x_mode:
+ 	  names = names_xmm;
+ 	  break;
+ 	case dq_mode:
+@@ -13369,7 +13365,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+     case 256:
+       switch (bytemode)
+ 	{
+-	case vex_mode:
++	case x_mode:
+ 	  names = names_ymm;
+ 	  break;
+ 	case mask_bd_mode:
+-- 
+2.33.0
+

_service:tar_scm:0010-x86-fold-duplicate-vector-register-printing-code.patch Added

@@ -0,0 +1,168 @@
+From b0556968af05310748d7a1286b8d7639de67831e Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:08:05 +0200
+Subject: PATCH x86: fold duplicate vector register printing code
+
+The bulk of OP_XMM() can be easily reused also for OP_EX(). Break the
+shared logic out of the function, and invoke the new helper from both
+places.
+
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 20bf9b282c9..e750c94704a 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -12530,20 +12530,10 @@ OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+ }
+ 
+ static void
+-OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
++print_vector_reg (unsigned int reg, int bytemode)
+ {
+-  int reg = modrm.reg;
+   const char **names;
+ 
+-  USED_REX (REX_R);
+-  if (rex & REX_R)
+-    reg += 8;
+-  if (vex.evex)
+-    {
+-      if (!vex.r)
+-	reg += 16;
+-    }
+-
+   if (bytemode == xmmq_mode
+       || bytemode == evex_half_bcst_xmmq_mode)
+     {
+@@ -12564,7 +12554,6 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+     names = names_ymm;
+   else if (bytemode == tmm_mode)
+     {
+-      modrm.reg = reg;
+       if (reg >= 8)
+ 	{
+ 	  oappend ("(bad)");
+@@ -12574,7 +12563,14 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+     }
+   else if (need_vex
+ 	   && bytemode != xmm_mode
+-	   && bytemode != scalar_mode)
++	   && bytemode != scalar_mode
++	   && bytemode != xmmdw_mode
++	   && bytemode != xmmqd_mode
++	   && bytemode != xmm_mb_mode
++	   && bytemode != xmm_mw_mode
++	   && bytemode != xmm_md_mode
++	   && bytemode != xmm_mq_mode
++	   && bytemode != vex_scalar_w_dq_mode)
+     {
+       switch (vex.length)
+ 	{
+@@ -12604,6 +12600,26 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+   oappend (namesreg);
+ }
+ 
++static void
++OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
++{
++  unsigned int reg = modrm.reg;
++
++  USED_REX (REX_R);
++  if (rex & REX_R)
++    reg += 8;
++  if (vex.evex)
++    {
++      if (!vex.r)
++	reg += 16;
++    }
++
++  if (bytemode == tmm_mode)
++    modrm.reg = reg;
++
++  print_vector_reg (reg, bytemode);
++}
++
+ static void
+ OP_EM (int bytemode, int sizeflag)
+ {
+@@ -12679,7 +12695,6 @@ static void
+ OP_EX (int bytemode, int sizeflag)
+ {
+   int reg;
+-  const char **names;
+ 
+   /* Skip mod/rm byte.  */
+   MODRM_CHECK;
+@@ -12708,66 +12723,10 @@ OP_EX (int bytemode, int sizeflag)
+ 	  || bytemode == q_swap_mode))
+     swap_operand ();
+ 
+-  if (need_vex
+-      && bytemode != xmm_mode
+-      && bytemode != xmmdw_mode
+-      && bytemode != xmmqd_mode
+-      && bytemode != xmm_mb_mode
+-      && bytemode != xmm_mw_mode
+-      && bytemode != xmm_md_mode
+-      && bytemode != xmm_mq_mode
+-      && bytemode != xmmq_mode
+-      && bytemode != evex_half_bcst_xmmq_mode
+-      && bytemode != ymm_mode
+-      && bytemode != tmm_mode
+-      && bytemode != vex_scalar_w_dq_mode)
+-    {
+-      switch (vex.length)
+-	{
+-	case 128:
+-	  names = names_xmm;
+-	  break;
+-	case 256:
+-	  names = names_ymm;
+-	  break;
+-	case 512:
+-	  names = names_zmm;
+-	  break;
+-	default:
+-	  abort ();
+-	}
+-    }
+-  else if (bytemode == xmmq_mode
+-	   || bytemode == evex_half_bcst_xmmq_mode)
+-    {
+-      switch (vex.length)
+-	{
+-	case 128:
+-	case 256:
+-	  names = names_xmm;
+-	  break;
+-	case 512:
+-	  names = names_ymm;
+-	  break;
+-	default:
+-	  abort ();
+-	}
+-    }
+-  else if (bytemode == tmm_mode)
+-    {
+-      modrm.rm = reg;
+-      if (reg >= 8)
+-	{
+-	  oappend ("(bad)");
+-	  return;
+-	}
+-      names = names_tmm;
+-    }
+-  else if (bytemode == ymm_mode)
+-    names = names_ymm;
+-  else
+-    names = names_xmm;
+-  oappend (namesreg);
++  if (bytemode == tmm_mode)
++    modrm.rm = reg;
++
++  print_vector_reg (reg, bytemode);
+ }
+ 
+ static void
+-- 
+2.33.0
+

_service:tar_scm:0011-x86-drop-xmm_m-b-w-d-q-_mode.patch Added

@@ -0,0 +1,664 @@
+From c1d66d5f24eb54a6453b3a813cbc7a7e0b5d15fe Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:08:39 +0200
+Subject: PATCH x86: drop xmm_m{b,w,d,q}_mode
+
+They're effectively redundant with {b,w,d,q}_mode.
+
+diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
+index a1cd69a1c9e..7a372ce8c0b 100644
+--- a/opcodes/i386-dis-evex-mod.h
++++ b/opcodes/i386-dis-evex-mod.h
+@@ -1,28 +1,28 @@
+   {
+     /* MOD_EVEX_0F12_PREFIX_0 */
+-    { "vmovlpX",	{ XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
++    { "vmovlpX",	{ XMM, Vex, EXq }, PREFIX_OPCODE },
+     { VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) },
+   },
+   {
+     /* MOD_EVEX_0F12_PREFIX_2 */
+-    { "vmovlpX",	{ XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
++    { "vmovlpX",	{ XMM, Vex, EXq }, PREFIX_OPCODE },
+   },
+   {
+     /* MOD_EVEX_0F13 */
+-    { "vmovlpX",	{ EXxmm_mq, XMM }, PREFIX_OPCODE },
++    { "vmovlpX",	{ EXq, XMM }, PREFIX_OPCODE },
+   },
+   {
+     /* MOD_EVEX_0F16_PREFIX_0 */
+-    { "vmovhpX",	{ XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
++    { "vmovhpX",	{ XMM, Vex, EXq }, PREFIX_OPCODE },
+     { VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) },
+   },
+   {
+     /* MOD_EVEX_0F16_PREFIX_2 */
+-    { "vmovhpX",	{ XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
++    { "vmovhpX",	{ XMM, Vex, EXq }, PREFIX_OPCODE },
+   },
+   {
+     /* MOD_EVEX_0F17 */
+-    { "vmovhpX",	{ EXxmm_mq, XMM }, PREFIX_OPCODE },
++    { "vmovhpX",	{ EXq, XMM }, PREFIX_OPCODE },
+   },
+   {
+     /* MOD_EVEX_0F2B */
+diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
+index 9ad9372a221..417eb1bfbff 100644
+--- a/opcodes/i386-dis-evex-prefix.h
++++ b/opcodes/i386-dis-evex-prefix.h
+@@ -111,16 +111,16 @@
+   /* PREFIX_EVEX_0F78 */
+   {
+     { VEX_W_TABLE (EVEX_W_0F78_P_0) },
+-    { "vcvttss2usi",	{ Gdq, EXxmm_md, EXxEVexS }, 0 },
++    { "vcvttss2usi",	{ Gdq, EXd, EXxEVexS }, 0 },
+     { VEX_W_TABLE (EVEX_W_0F78_P_2) },
+-    { "vcvttsd2usi",	{ Gdq, EXxmm_mq, EXxEVexS }, 0 },
++    { "vcvttsd2usi",	{ Gdq, EXq, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_0F79 */
+   {
+     { VEX_W_TABLE (EVEX_W_0F79_P_0) },
+-    { "vcvtss2usi",	{ Gdq, EXxmm_md, EXxEVexR }, 0 },
++    { "vcvtss2usi",	{ Gdq, EXd, EXxEVexR }, 0 },
+     { VEX_W_TABLE (EVEX_W_0F79_P_2) },
+-    { "vcvtsd2usi",	{ Gdq, EXxmm_mq, EXxEVexR }, 0 },
++    { "vcvtsd2usi",	{ Gdq, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F7A */
+   {
+diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
+index 8af4695a004..cb27d96d30d 100644
+--- a/opcodes/i386-dis-evex-w.h
++++ b/opcodes/i386-dis-evex-w.h
+@@ -1,11 +1,11 @@
+   /* EVEX_W_0F10_P_1 */
+   {
+-    { "vmovss",	{ XMScalar, VexScalarR, EXxmm_md }, 0 },
++    { "vmovss",	{ XMScalar, VexScalarR, EXd }, 0 },
+   },
+   /* EVEX_W_0F10_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vmovsd",	{ XMScalar, VexScalarR, EXxmm_mq }, 0 },
++    { "vmovsd",	{ XMScalar, VexScalarR, EXq }, 0 },
+   },
+   /* EVEX_W_0F11_P_1 */
+   {
+@@ -18,7 +18,7 @@
+   },
+   /* EVEX_W_0F12_P_0_M_1 */
+   {
+-    { "vmovhlps",	{ XMM, Vex, EXxmm_mq }, 0 },
++    { "vmovhlps",	{ XMM, Vex, EXq }, 0 },
+   },
+   /* EVEX_W_0F12_P_1 */
+   {
+@@ -39,30 +39,30 @@
+   },
+   /* EVEX_W_0F51_P_1 */
+   {
+-    { "vsqrtss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
++    { "vsqrtss",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F51_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vsqrtsd",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
++    { "vsqrtsd",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F58_P_1 */
+   {
+-    { "vaddss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
++    { "vaddss",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F58_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vaddsd",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
++    { "vaddsd",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F59_P_1 */
+   {
+-    { "vmulss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
++    { "vmulss",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F59_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vmulsd",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
++    { "vmulsd",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F5A_P_0 */
+   {
+@@ -70,7 +70,7 @@
+   },
+   /* EVEX_W_0F5A_P_1 */
+   {
+-    { "vcvtss2sd",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
++    { "vcvtss2sd",	{ XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+   },
+   /* EVEX_W_0F5A_P_2 */
+   {
+@@ -80,7 +80,7 @@
+   /* EVEX_W_0F5A_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vcvtsd2ss",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
++    { "vcvtsd2ss",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F5B_P_0 */
+   {
+@@ -97,39 +97,39 @@
+   },
+   /* EVEX_W_0F5C_P_1 */
+   {
+-    { "vsubss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
++    { "vsubss",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F5C_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vsubsd",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
++    { "vsubsd",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F5D_P_1 */
+   {
+-    { "vminss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
++    { "vminss",	{ XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+   },
+   /* EVEX_W_0F5D_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vminsd",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 },
++    { "vminsd",	{ XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
+   },
+   /* EVEX_W_0F5E_P_1 */
+   {
+-    { "vdivss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
++    { "vdivss",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F5E_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vdivsd",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
++    { "vdivsd",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* EVEX_W_0F5F_P_1 */
+   {
+-    { "vmaxss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
++    { "vmaxss",	{ XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+   },
+   /* EVEX_W_0F5F_P_3 */
+   {
+     { Bad_Opcode },
+-    { "vmaxsd",	{ XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 },
++    { "vmaxsd",	{ XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
+   },

_service:tar_scm:0012-x86-drop-vex_scalar_w_dq_mode.patch Added

@@ -0,0 +1,302 @@
+From eb34d29be8766b7466becebdd94e8121e88a44d4 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:09:03 +0200
+Subject: PATCH x86: drop vex_scalar_w_dq_mode
+
+It has only a single use and can easily be represented by dq_mode
+instead. Plus its handling in intel_operand_size() was duplicating
+that of vex_vsib_{d,q}_w_dq_mode anyway.
+
+diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
+index 417eb1bfbff..5c24618bec4 100644
+--- a/opcodes/i386-dis-evex-prefix.h
++++ b/opcodes/i386-dis-evex-prefix.h
+@@ -358,7 +358,7 @@
+   {
+     { Bad_Opcode },
+     { Bad_Opcode },
+-    { "vfmsub132s%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
++    { "vfmsub132s%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
+     { "v4fmaddss",	{ XMScalar, VexScalar, Mxmm }, 0 },
+   },
+   /* PREFIX_EVEX_0F38AA */
+@@ -372,6 +372,6 @@
+   {
+     { Bad_Opcode },
+     { Bad_Opcode },
+-    { "vfmsub213s%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
++    { "vfmsub213s%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
+     { "v4fnmaddss",	{ XMScalar, VexScalar, Mxmm }, 0 },
+   },
+diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
+index 5f1ebaded85..287c7a84635 100644
+--- a/opcodes/i386-dis-evex.h
++++ b/opcodes/i386-dis-evex.h
+@@ -343,7 +343,7 @@ static const struct dis386 evex_table256 = {
+     { PREFIX_TABLE (PREFIX_EVEX_0F382A) },
+     { VEX_W_TABLE (EVEX_W_0F382B) },
+     { "vscalefp%XW",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vscalefs%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vscalefs%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { Bad_Opcode },
+     { Bad_Opcode },
+     /* 30 */
+@@ -368,7 +368,7 @@ static const struct dis386 evex_table256 = {
+     { "vpmull%DQ",	{ XM, Vex, EXx }, PREFIX_DATA },
+     { Bad_Opcode },
+     { "vgetexpp%XW",	{ XM, EXx, EXxEVexS }, PREFIX_DATA },
+-    { "vgetexps%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
++    { "vgetexps%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
+     { "vplzcnt%DQ",	{ XM, EXx }, PREFIX_DATA },
+     { "vpsrlv%DQ",	{ XM, Vex, EXx }, PREFIX_DATA },
+     { "vpsrav%DQ",	{ XM, Vex, EXx }, PREFIX_DATA },
+@@ -379,9 +379,9 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { "vrcp14p%XW",	{ XM, EXx }, PREFIX_DATA },
+-    { "vrcp14s%XW",	{ XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
++    { "vrcp14s%XW",	{ XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+     { "vrsqrt14p%XW",	{ XM, EXx }, 0 },
+-    { "vrsqrt14s%XW",	{ XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
++    { "vrsqrt14s%XW",	{ XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+     /* 50 */
+     { "vpdpbusd",	{ XM, Vex, EXx }, PREFIX_DATA },
+     { "vpdpbusds",	{ XM, Vex, EXx }, PREFIX_DATA },
+@@ -465,13 +465,13 @@ static const struct dis386 evex_table256 = {
+     { "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+     /* 98 */
+     { "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfmadd132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { PREFIX_TABLE (PREFIX_EVEX_0F389A) },
+     { PREFIX_TABLE (PREFIX_EVEX_0F389B) },
+     { "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfnmadd132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfnmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     /* A0 */
+     { "vpscatterd%DQ",	{ MVexVSIBDWpX, XM }, PREFIX_DATA },
+     { "vpscatterq%DQ",	{ MVexVSIBQWpX, XMGatherQ }, PREFIX_DATA },
+@@ -483,13 +483,13 @@ static const struct dis386 evex_table256 = {
+     { "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+     /* A8 */
+     { "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfmadd213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { PREFIX_TABLE (PREFIX_EVEX_0F38AA) },
+     { PREFIX_TABLE (PREFIX_EVEX_0F38AB) },
+     { "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfnmadd213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfnmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     /* B0 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -501,13 +501,13 @@ static const struct dis386 evex_table256 = {
+     { "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+     /* B8 */
+     { "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfmadd231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfmsub231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfnmadd231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     { "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
++    { "vfnmsub231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
+     /* C0 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -521,9 +521,9 @@ static const struct dis386 evex_table256 = {
+     { "vexp2p%XW",        { XM, EXx, EXxEVexS }, PREFIX_DATA },
+     { Bad_Opcode },
+     { "vrcp28p%XW",       { XM, EXx, EXxEVexS }, PREFIX_DATA },
+-    { "vrcp28s%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
++    { "vrcp28s%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
+     { "vrsqrt28p%XW",     { XM, EXx, EXxEVexS }, PREFIX_DATA },
+-    { "vrsqrt28s%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
++    { "vrsqrt28s%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
+     { Bad_Opcode },
+     { VEX_W_TABLE (VEX_W_0F38CF) },
+     /* D0 */
+@@ -627,7 +627,7 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { "vpternlog%DQ",	{ XM, Vex, EXx, Ib }, PREFIX_DATA },
+     { "vgetmantp%XW",	{ XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+-    { "vgetmants%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
++    { "vgetmants%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
+     /* 28 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -675,13 +675,13 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     /* 50 */
+     { "vrangep%XW",	{ XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+-    { "vranges%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
++    { "vranges%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { "vfixupimmp%XW",	{ XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+-    { "vfixupimms%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
++    { "vfixupimms%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
+     { "vreducep%XW",	{ XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+-    { "vreduces%XW",	{ XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
++    { "vreduces%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
+     /* 58 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -699,7 +699,7 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { "vfpclassp%XW%XZ",	{ MaskG, EXx, Ib }, PREFIX_DATA },
+-    { "vfpclasss%XW",	{ MaskG, EXVexWdqScalar, Ib }, PREFIX_DATA },
++    { "vfpclasss%XW",	{ MaskG, EXdq, Ib }, PREFIX_DATA },
+     /* 68 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 27b6b8e8f44..6efc15b851b 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -358,6 +358,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
+ #define EXdS { OP_EX, d_swap_mode }
+ #define EXq { OP_EX, q_mode }
+ #define EXqS { OP_EX, q_swap_mode }
++#define EXdq { OP_EX, dq_mode }
+ #define EXx { OP_EX, x_mode }
+ #define EXxS { OP_EX, x_swap_mode }
+ #define EXxmm { OP_EX, xmm_mode }
+@@ -368,7 +369,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
+ #define EXxmmdw { OP_EX, xmmdw_mode }
+ #define EXxmmqd { OP_EX, xmmqd_mode }
+ #define EXymmq { OP_EX, ymmq_mode }
+-#define EXVexWdqScalar { OP_EX, vex_scalar_w_dq_mode }
+ #define EXEvexXGscat { OP_EX, evex_x_gscat_mode }
+ #define EXEvexXNoBcst { OP_EX, evex_x_nobcst_mode }
+ #define MS { OP_MS, v_mode }
+@@ -507,7 +507,7 @@ enum
+   v_bnd_mode,
+   /* like v_bnd_mode in 32bit, no RIP-rel in 64bit mode.  */
+   v_bndmk_mode,
+-  /* operand size depends on REX prefixes.  */
++  /* operand size depends on REX.W / VEX.W.  */
+   dq_mode,
+   /* registers like dq_mode, memory like w_mode, displacements like
+      v_mode without considering Intel64 ISA.  */
+@@ -545,8 +545,6 @@ enum
+ 
+   /* scalar, ignore vector length.  */
+   scalar_mode,
+-  /* Operand size depends on the VEX.W bit, ignore vector length.  */
+-  vex_scalar_w_dq_mode,
+

_service:tar_scm:0013-x86-drop-dq-b-d-_mode.patch Added

@@ -0,0 +1,528 @@
+From 5fbe0f28ae6dec9736e504cf79cdb76a9fa09dc9 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 22 Jul 2021 13:09:21 +0200
+Subject: PATCH x86: drop dq{b,d}_mode
+
+Their sole use is for {,V}EXTRACTPS / {,V}P{EXT,INS}RB respectively; for
+consistency also limit use of dqw_mode to Jdqw. 64-bit disassembly
+reflecting REX.W / VEX.W is not in line with the assembler's opcode
+table having NoRex64 / VexWIG in all respective templates, i.e. assembly
+input isn't being honored there either. Obviously the 0FC5 encodings of
+{,V}PEXTRW then also need adjustment for consistency reasons.
+
+diff --git a/gas/testsuite/gas/i386/x86-64-avx-wig.d b/gas/testsuite/gas/i386/x86-64-avx-wig.d
+index 14edfb3de7d..2144746bdf0 100644
+--- a/gas/testsuite/gas/i386/x86-64-avx-wig.d
++++ b/gas/testsuite/gas/i386/x86-64-avx-wig.d
+@@ -58,7 +58,7 @@ Disassembly of section .text:
+  +a-f0-9+:	c4 e1 ca 5e d4       	vdivss %xmm4,%xmm6,%xmm2
+  +a-f0-9+:	c4 e3 c9 41 d4 07    	vdppd  \$0x7,%xmm4,%xmm6,%xmm2
+  +a-f0-9+:	c4 e3 cd 40 d4 07    	vdpps  \$0x7,%ymm4,%ymm6,%ymm2
+- +a-f0-9+:	c4 e3 f9 17 e1 07    	vextractps \$0x7,%xmm4,%rcx
++ +a-f0-9+:	c4 e3 f9 17 e1 07    	vextractps \$0x7,%xmm4,%ecx
+  +a-f0-9+:	c4 e1 cd 7c d4       	vhaddpd %ymm4,%ymm6,%ymm2
+  +a-f0-9+:	c4 e1 cf 7c d4       	vhaddps %ymm4,%ymm6,%ymm2
+  +a-f0-9+:	c4 e1 cd 7d d4       	vhsubpd %ymm4,%ymm6,%ymm2
+@@ -157,10 +157,10 @@ Disassembly of section .text:
+  +a-f0-9+:	c4 e1 c9 65 d4       	vpcmpgtw %xmm4,%xmm6,%xmm2
+  +a-f0-9+:	c4 e3 f9 63 f4 07    	vpcmpistri \$0x7,%xmm4,%xmm6
+  +a-f0-9+:	c4 e3 f9 62 f4 07    	vpcmpistrm \$0x7,%xmm4,%xmm6
+- +a-f0-9+:	c4 e3 f9 14 c0 00    	vpextrb \$0x0,%xmm0,%rax
++ +a-f0-9+:	c4 e3 f9 14 c0 00    	vpextrb \$0x0,%xmm0,%eax
+  +a-f0-9+:	c4 e3 f9 14 00 00    	vpextrb \$0x0,%xmm0,$%rax$
+- +a-f0-9+:	c4 e1 f9 c5 c0 00    	vpextrw \$0x0,%xmm0,%rax
+- +a-f0-9+:	c4 e3 f9 15 c0 00    	vpextrw \$0x0,%xmm0,%rax
++ +a-f0-9+:	c4 e1 f9 c5 c0 00    	vpextrw \$0x0,%xmm0,%eax
++ +a-f0-9+:	c4 e3 f9 15 c0 00    	vpextrw \$0x0,%xmm0,%eax
+  +a-f0-9+:	c4 e3 f9 15 00 00    	vpextrw \$0x0,%xmm0,$%rax$
+  +a-f0-9+:	c4 e2 c9 02 d4       	vphaddd %xmm4,%xmm6,%xmm2
+  +a-f0-9+:	c4 e2 c9 03 d4       	vphaddsw %xmm4,%xmm6,%xmm2
+@@ -169,9 +169,9 @@ Disassembly of section .text:
+  +a-f0-9+:	c4 e2 c9 06 d4       	vphsubd %xmm4,%xmm6,%xmm2
+  +a-f0-9+:	c4 e2 c9 07 d4       	vphsubsw %xmm4,%xmm6,%xmm2
+  +a-f0-9+:	c4 e2 c9 05 d4       	vphsubw %xmm4,%xmm6,%xmm2
+- +a-f0-9+:	c4 e3 f9 20 c0 00    	vpinsrb \$0x0,%rax,%xmm0,%xmm0
++ +a-f0-9+:	c4 e3 f9 20 c0 00    	vpinsrb \$0x0,%eax,%xmm0,%xmm0
+  +a-f0-9+:	c4 e3 f9 20 00 00    	vpinsrb \$0x0,$%rax$,%xmm0,%xmm0
+- +a-f0-9+:	c4 e1 f9 c4 c0 00    	vpinsrw \$0x0,%rax,%xmm0,%xmm0
++ +a-f0-9+:	c4 e1 f9 c4 c0 00    	vpinsrw \$0x0,%eax,%xmm0,%xmm0
+  +a-f0-9+:	c4 e1 f9 c4 00 00    	vpinsrw \$0x0,$%rax$,%xmm0,%xmm0
+  +a-f0-9+:	c4 e2 c9 04 d4       	vpmaddubsw %xmm4,%xmm6,%xmm2
+  +a-f0-9+:	c4 e1 c9 f5 d4       	vpmaddwd %xmm4,%xmm6,%xmm2
+diff --git a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d
+index 79b0fdc6a1f..3a1141866aa 100644
+--- a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d
++++ b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d
+@@ -159,9 +159,9 @@ Disassembly of section \.text:
+  	*a-f0-9+: 	*62 f1 8d 40 65 aa 00 20 00 00 	*vpcmpgtw k5,zmm30,ZMMWORD PTR \rdx\+0x2000\
+  	*a-f0-9+: 	*62 f1 8d 40 65 6a 80 	*vpcmpgtw k5,zmm30,ZMMWORD PTR \rdx-0x2000\
+  	*a-f0-9+: 	*62 f1 8d 40 65 aa c0 df ff ff 	*vpcmpgtw k5,zmm30,ZMMWORD PTR \rdx-0x2040\
+- 	*a-f0-9+: 	*62 63 fd 08 14 e8 ab 	*vpextrb rax,xmm29,0xab
+- 	*a-f0-9+: 	*62 63 fd 08 14 e8 7b 	*vpextrb rax,xmm29,0x7b
+- 	*a-f0-9+: 	*62 43 fd 08 14 e8 7b 	*vpextrb r8,xmm29,0x7b
++ 	*a-f0-9+: 	*62 63 fd 08 14 e8 ab 	*vpextrb eax,xmm29,0xab
++ 	*a-f0-9+: 	*62 63 fd 08 14 e8 7b 	*vpextrb eax,xmm29,0x7b
++ 	*a-f0-9+: 	*62 43 fd 08 14 e8 7b 	*vpextrb r8d,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 14 29 7b 	*vpextrb BYTE PTR \rcx\,xmm29,0x7b
+  	*a-f0-9+: 	*62 23 fd 08 14 ac f0 23 01 00 00 7b 	*vpextrb BYTE PTR \rax\+r14\*8\+0x123\,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 14 6a 7f 7b 	*vpextrb BYTE PTR \rdx\+0x7f\,xmm29,0x7b
+@@ -174,23 +174,23 @@ Disassembly of section \.text:
+  	*a-f0-9+: 	*62 63 fd 08 15 aa 00 01 00 00 7b 	*vpextrw WORD PTR \rdx\+0x100\,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 15 6a 80 7b 	*vpextrw WORD PTR \rdx-0x100\,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 15 aa fe fe ff ff 7b 	*vpextrw WORD PTR \rdx-0x102\,xmm29,0x7b
+- 	*a-f0-9+: 	*62 91 fd 08 c5 c6 ab 	*vpextrw rax,xmm30,0xab
+- 	*a-f0-9+: 	*62 91 fd 08 c5 c6 7b 	*vpextrw rax,xmm30,0x7b
+- 	*a-f0-9+: 	*62 11 fd 08 c5 c6 7b 	*vpextrw r8,xmm30,0x7b
+- 	*a-f0-9+: 	*62 63 95 00 20 f0 ab 	*vpinsrb xmm30,xmm29,rax,0xab
+- 	*a-f0-9+: 	*62 63 95 00 20 f0 7b 	*vpinsrb xmm30,xmm29,rax,0x7b
+- 	*a-f0-9+: 	*62 63 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,rbp,0x7b
+- 	*a-f0-9+: 	*62 43 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,r13,0x7b
++ 	*a-f0-9+: 	*62 91 fd 08 c5 c6 ab 	*vpextrw eax,xmm30,0xab
++ 	*a-f0-9+: 	*62 91 fd 08 c5 c6 7b 	*vpextrw eax,xmm30,0x7b
++ 	*a-f0-9+: 	*62 11 fd 08 c5 c6 7b 	*vpextrw r8d,xmm30,0x7b
++ 	*a-f0-9+: 	*62 63 95 00 20 f0 ab 	*vpinsrb xmm30,xmm29,eax,0xab
++ 	*a-f0-9+: 	*62 63 95 00 20 f0 7b 	*vpinsrb xmm30,xmm29,eax,0x7b
++ 	*a-f0-9+: 	*62 63 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,ebp,0x7b
++ 	*a-f0-9+: 	*62 43 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,r13d,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 31 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rcx\,0x7b
+  	*a-f0-9+: 	*62 23 95 00 20 b4 f0 23 01 00 00 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rax\+r14\*8\+0x123\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 72 7f 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx\+0x7f\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 b2 80 00 00 00 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx\+0x80\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 72 80 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx-0x80\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 b2 7f ff ff ff 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx-0x81\,0x7b
+- 	*a-f0-9+: 	*62 61 95 00 c4 f0 ab 	*vpinsrw xmm30,xmm29,rax,0xab
+- 	*a-f0-9+: 	*62 61 95 00 c4 f0 7b 	*vpinsrw xmm30,xmm29,rax,0x7b
+- 	*a-f0-9+: 	*62 61 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,rbp,0x7b
+- 	*a-f0-9+: 	*62 41 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,r13,0x7b
++ 	*a-f0-9+: 	*62 61 95 00 c4 f0 ab 	*vpinsrw xmm30,xmm29,eax,0xab
++ 	*a-f0-9+: 	*62 61 95 00 c4 f0 7b 	*vpinsrw xmm30,xmm29,eax,0x7b
++ 	*a-f0-9+: 	*62 61 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,ebp,0x7b
++ 	*a-f0-9+: 	*62 41 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,r13d,0x7b
+  	*a-f0-9+: 	*62 61 95 00 c4 31 7b 	*vpinsrw xmm30,xmm29,WORD PTR \rcx\,0x7b
+  	*a-f0-9+: 	*62 21 95 00 c4 b4 f0 23 01 00 00 7b 	*vpinsrw xmm30,xmm29,WORD PTR \rax\+r14\*8\+0x123\,0x7b
+  	*a-f0-9+: 	*62 61 95 00 c4 72 7f 7b 	*vpinsrw xmm30,xmm29,WORD PTR \rdx\+0xfe\,0x7b
+@@ -690,9 +690,9 @@ Disassembly of section \.text:
+  	*a-f0-9+: 	*62 f1 8d 40 65 aa 00 20 00 00 	*vpcmpgtw k5,zmm30,ZMMWORD PTR \rdx\+0x2000\
+  	*a-f0-9+: 	*62 f1 8d 40 65 6a 80 	*vpcmpgtw k5,zmm30,ZMMWORD PTR \rdx-0x2000\
+  	*a-f0-9+: 	*62 f1 8d 40 65 aa c0 df ff ff 	*vpcmpgtw k5,zmm30,ZMMWORD PTR \rdx-0x2040\
+- 	*a-f0-9+: 	*62 63 fd 08 14 e8 ab 	*vpextrb rax,xmm29,0xab
+- 	*a-f0-9+: 	*62 63 fd 08 14 e8 7b 	*vpextrb rax,xmm29,0x7b
+- 	*a-f0-9+: 	*62 43 fd 08 14 e8 7b 	*vpextrb r8,xmm29,0x7b
++ 	*a-f0-9+: 	*62 63 fd 08 14 e8 ab 	*vpextrb eax,xmm29,0xab
++ 	*a-f0-9+: 	*62 63 fd 08 14 e8 7b 	*vpextrb eax,xmm29,0x7b
++ 	*a-f0-9+: 	*62 43 fd 08 14 e8 7b 	*vpextrb r8d,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 14 29 7b 	*vpextrb BYTE PTR \rcx\,xmm29,0x7b
+  	*a-f0-9+: 	*62 23 fd 08 14 ac f0 34 12 00 00 7b 	*vpextrb BYTE PTR \rax\+r14\*8\+0x1234\,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 14 6a 7f 7b 	*vpextrb BYTE PTR \rdx\+0x7f\,xmm29,0x7b
+@@ -705,23 +705,23 @@ Disassembly of section \.text:
+  	*a-f0-9+: 	*62 63 fd 08 15 aa 00 01 00 00 7b 	*vpextrw WORD PTR \rdx\+0x100\,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 15 6a 80 7b 	*vpextrw WORD PTR \rdx-0x100\,xmm29,0x7b
+  	*a-f0-9+: 	*62 63 fd 08 15 aa fe fe ff ff 7b 	*vpextrw WORD PTR \rdx-0x102\,xmm29,0x7b
+- 	*a-f0-9+: 	*62 91 fd 08 c5 c6 ab 	*vpextrw rax,xmm30,0xab
+- 	*a-f0-9+: 	*62 91 fd 08 c5 c6 7b 	*vpextrw rax,xmm30,0x7b
+- 	*a-f0-9+: 	*62 11 fd 08 c5 c6 7b 	*vpextrw r8,xmm30,0x7b
+- 	*a-f0-9+: 	*62 63 95 00 20 f0 ab 	*vpinsrb xmm30,xmm29,rax,0xab
+- 	*a-f0-9+: 	*62 63 95 00 20 f0 7b 	*vpinsrb xmm30,xmm29,rax,0x7b
+- 	*a-f0-9+: 	*62 63 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,rbp,0x7b
+- 	*a-f0-9+: 	*62 43 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,r13,0x7b
++ 	*a-f0-9+: 	*62 91 fd 08 c5 c6 ab 	*vpextrw eax,xmm30,0xab
++ 	*a-f0-9+: 	*62 91 fd 08 c5 c6 7b 	*vpextrw eax,xmm30,0x7b
++ 	*a-f0-9+: 	*62 11 fd 08 c5 c6 7b 	*vpextrw r8d,xmm30,0x7b
++ 	*a-f0-9+: 	*62 63 95 00 20 f0 ab 	*vpinsrb xmm30,xmm29,eax,0xab
++ 	*a-f0-9+: 	*62 63 95 00 20 f0 7b 	*vpinsrb xmm30,xmm29,eax,0x7b
++ 	*a-f0-9+: 	*62 63 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,ebp,0x7b
++ 	*a-f0-9+: 	*62 43 95 00 20 f5 7b 	*vpinsrb xmm30,xmm29,r13d,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 31 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rcx\,0x7b
+  	*a-f0-9+: 	*62 23 95 00 20 b4 f0 34 12 00 00 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rax\+r14\*8\+0x1234\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 72 7f 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx\+0x7f\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 b2 80 00 00 00 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx\+0x80\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 72 80 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx-0x80\,0x7b
+  	*a-f0-9+: 	*62 63 95 00 20 b2 7f ff ff ff 7b 	*vpinsrb xmm30,xmm29,BYTE PTR \rdx-0x81\,0x7b
+- 	*a-f0-9+: 	*62 61 95 00 c4 f0 ab 	*vpinsrw xmm30,xmm29,rax,0xab
+- 	*a-f0-9+: 	*62 61 95 00 c4 f0 7b 	*vpinsrw xmm30,xmm29,rax,0x7b
+- 	*a-f0-9+: 	*62 61 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,rbp,0x7b
+- 	*a-f0-9+: 	*62 41 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,r13,0x7b
++ 	*a-f0-9+: 	*62 61 95 00 c4 f0 ab 	*vpinsrw xmm30,xmm29,eax,0xab
++ 	*a-f0-9+: 	*62 61 95 00 c4 f0 7b 	*vpinsrw xmm30,xmm29,eax,0x7b
++ 	*a-f0-9+: 	*62 61 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,ebp,0x7b
++ 	*a-f0-9+: 	*62 41 95 00 c4 f5 7b 	*vpinsrw xmm30,xmm29,r13d,0x7b
+  	*a-f0-9+: 	*62 61 95 00 c4 31 7b 	*vpinsrw xmm30,xmm29,WORD PTR \rcx\,0x7b
+  	*a-f0-9+: 	*62 21 95 00 c4 b4 f0 34 12 00 00 7b 	*vpinsrw xmm30,xmm29,WORD PTR \rax\+r14\*8\+0x1234\,0x7b
+  	*a-f0-9+: 	*62 61 95 00 c4 72 7f 7b 	*vpinsrw xmm30,xmm29,WORD PTR \rdx\+0xfe\,0x7b
+diff --git a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d
+index f48e5e6ff85..d2687009a24 100644
+--- a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d
++++ b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d
+@@ -159,9 +159,9 @@ Disassembly of section \.text:
+  	*a-f0-9+: 	*62 f1 8d 40 65 aa 00 20 00 00 	*vpcmpgtw 0x2000$%rdx$,%zmm30,%k5
+  	*a-f0-9+: 	*62 f1 8d 40 65 6a 80 	*vpcmpgtw -0x2000$%rdx$,%zmm30,%k5
+  	*a-f0-9+: 	*62 f1 8d 40 65 aa c0 df ff ff 	*vpcmpgtw -0x2040$%rdx$,%zmm30,%k5
+- 	*a-f0-9+: 	*62 63 fd 08 14 e8 ab 	*vpextrb \$0xab,%xmm29,%rax
+- 	*a-f0-9+: 	*62 63 fd 08 14 e8 7b 	*vpextrb \$0x7b,%xmm29,%rax
+- 	*a-f0-9+: 	*62 43 fd 08 14 e8 7b 	*vpextrb \$0x7b,%xmm29,%r8
++ 	*a-f0-9+: 	*62 63 fd 08 14 e8 ab 	*vpextrb \$0xab,%xmm29,%eax
++ 	*a-f0-9+: 	*62 63 fd 08 14 e8 7b 	*vpextrb \$0x7b,%xmm29,%eax
++ 	*a-f0-9+: 	*62 43 fd 08 14 e8 7b 	*vpextrb \$0x7b,%xmm29,%r8d
+  	*a-f0-9+: 	*62 63 fd 08 14 29 7b 	*vpextrb \$0x7b,%xmm29,$%rcx$
+  	*a-f0-9+: 	*62 23 fd 08 14 ac f0 23 01 00 00 7b 	*vpextrb \$0x7b,%xmm29,0x123$%rax,%r14,8$
+  	*a-f0-9+: 	*62 63 fd 08 14 6a 7f 7b 	*vpextrb \$0x7b,%xmm29,0x7f$%rdx$
+@@ -174,23 +174,23 @@ Disassembly of section \.text:
+  	*a-f0-9+: 	*62 63 fd 08 15 aa 00 01 00 00 7b 	*vpextrw \$0x7b,%xmm29,0x100$%rdx$
+  	*a-f0-9+: 	*62 63 fd 08 15 6a 80 7b 	*vpextrw \$0x7b,%xmm29,-0x100$%rdx$
+  	*a-f0-9+: 	*62 63 fd 08 15 aa fe fe ff ff 7b 	*vpextrw \$0x7b,%xmm29,-0x102$%rdx$
+- 	*a-f0-9+: 	*62 91 fd 08 c5 c6 ab 	*vpextrw \$0xab,%xmm30,%rax
+- 	*a-f0-9+: 	*62 91 fd 08 c5 c6 7b 	*vpextrw \$0x7b,%xmm30,%rax
+- 	*a-f0-9+: 	*62 11 fd 08 c5 c6 7b 	*vpextrw \$0x7b,%xmm30,%r8
+- 	*a-f0-9+: 	*62 63 95 00 20 f0 ab 	*vpinsrb \$0xab,%rax,%xmm29,%xmm30
+- 	*a-f0-9+: 	*62 63 95 00 20 f0 7b 	*vpinsrb \$0x7b,%rax,%xmm29,%xmm30
+- 	*a-f0-9+: 	*62 63 95 00 20 f5 7b 	*vpinsrb \$0x7b,%rbp,%xmm29,%xmm30
+- 	*a-f0-9+: 	*62 43 95 00 20 f5 7b 	*vpinsrb \$0x7b,%r13,%xmm29,%xmm30
++ 	*a-f0-9+: 	*62 91 fd 08 c5 c6 ab 	*vpextrw \$0xab,%xmm30,%eax
++ 	*a-f0-9+: 	*62 91 fd 08 c5 c6 7b 	*vpextrw \$0x7b,%xmm30,%eax
++ 	*a-f0-9+: 	*62 11 fd 08 c5 c6 7b 	*vpextrw \$0x7b,%xmm30,%r8d
++ 	*a-f0-9+: 	*62 63 95 00 20 f0 ab 	*vpinsrb \$0xab,%eax,%xmm29,%xmm30
++ 	*a-f0-9+: 	*62 63 95 00 20 f0 7b 	*vpinsrb \$0x7b,%eax,%xmm29,%xmm30
++ 	*a-f0-9+: 	*62 63 95 00 20 f5 7b 	*vpinsrb \$0x7b,%ebp,%xmm29,%xmm30
++ 	*a-f0-9+: 	*62 43 95 00 20 f5 7b 	*vpinsrb \$0x7b,%r13d,%xmm29,%xmm30
+  	*a-f0-9+: 	*62 63 95 00 20 31 7b 	*vpinsrb \$0x7b,$%rcx$,%xmm29,%xmm30
+  	*a-f0-9+: 	*62 23 95 00 20 b4 f0 23 01 00 00 7b 	*vpinsrb \$0x7b,0x123$%rax,%r14,8$,%xmm29,%xmm30
+  	*a-f0-9+: 	*62 63 95 00 20 72 7f 7b 	*vpinsrb \$0x7b,0x7f$%rdx$,%xmm29,%xmm30
+  	*a-f0-9+: 	*62 63 95 00 20 b2 80 00 00 00 7b 	*vpinsrb \$0x7b,0x80$%rdx$,%xmm29,%xmm30
+  	*a-f0-9+: 	*62 63 95 00 20 72 80 7b 	*vpinsrb \$0x7b,-0x80$%rdx$,%xmm29,%xmm30
+  	*a-f0-9+: 	*62 63 95 00 20 b2 7f ff ff ff 7b 	*vpinsrb \$0x7b,-0x81$%rdx$,%xmm29,%xmm30
+- 	*a-f0-9+: 	*62 61 95 00 c4 f0 ab 	*vpinsrw \$0xab,%rax,%xmm29,%xmm30
+- 	*a-f0-9+: 	*62 61 95 00 c4 f0 7b 	*vpinsrw \$0x7b,%rax,%xmm29,%xmm30
+- 	*a-f0-9+: 	*62 61 95 00 c4 f5 7b 	*vpinsrw \$0x7b,%rbp,%xmm29,%xmm30
+- 	*a-f0-9+: 	*62 41 95 00 c4 f5 7b 	*vpinsrw \$0x7b,%r13,%xmm29,%xmm30
++ 	*a-f0-9+: 	*62 61 95 00 c4 f0 ab 	*vpinsrw \$0xab,%eax,%xmm29,%xmm30
++ 	*a-f0-9+: 	*62 61 95 00 c4 f0 7b 	*vpinsrw \$0x7b,%eax,%xmm29,%xmm30
++ 	*a-f0-9+: 	*62 61 95 00 c4 f5 7b 	*vpinsrw \$0x7b,%ebp,%xmm29,%xmm30

_service:tar_scm:0014-x86-express-unduly-set-rounding-control-bits-in-disa.patch Added

@@ -0,0 +1,304 @@
+From 0e4cc77316732e67cff33e493eff2aa7feed4587 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Fri, 23 Jul 2021 08:03:21 +0200
+Subject: PATCH x86: express unduly set rounding control bits in disassembly
+
+While EVEX.L'L are indeed ignored when EVEX.b stands for just SAE,
+EVEX.b itself is not ignored when an insn permits neither rounding
+control nor SAE.
+
+While changing this aspect of EVEX.b handling, also alter unduly set
+embedded broadcast: Don't call BadOp(), screwing up subsequent
+disassembly, but emit "{bad}" instead.
+
+diff --git a/gas/testsuite/gas/i386/avx512f-nondef.d b/gas/testsuite/gas/i386/avx512f-nondef.d
+index f19edceb6bb..07ffe60e177 100644
+--- a/gas/testsuite/gas/i386/avx512f-nondef.d
++++ b/gas/testsuite/gas/i386/avx512f-nondef.d
+@@ -10,12 +10,11 @@ Disassembly of section .text:
+ 0+ <.text>:
+  	*a-f0-9+:	62 f3 d5 1f 0b f4 7b 	vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
+  	*a-f0-9+:	62 f3 d5 5f 0b f4 7b 	vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
+- 	*a-f0-9+:	62 f2 55 1f 3b f4    	vpminud %zmm4,%zmm5,%zmm6\{%k7\}
+- 	*a-f0-9+:	62 c2 55 1f 3b f4    	vpminud %zmm4,%zmm5,%zmm6\{%k7\}
++ 	*a-f0-9+:	62 f2 55 4f 3b f4    	vpminud %zmm4,%zmm5,%zmm6\{%k7\}
++ 	*a-f0-9+:	62 c2 55 4f 3b f4    	vpminud %zmm4,%zmm5,%zmm6\{%k7\}
++ 	*a-f0-9+:	62 f2 55 1f 3b f4    	vpminud \{rn-bad\},%zmm4,%zmm5,%zmm6\{%k7\}
+  	*a-f0-9+:	62 f2 7e 48 31 72 7f 	vpmovdb %zmm6,0x7f0$%edx$
+- 	*a-f0-9+:	62                   	vpmovdb %zmm6,$bad$
+- 	*a-f0-9+:	f2 7e 58             	bnd jle (0x7d|7d <.text\+0x7d>)
+- 	*a-f0-9+:	31 72 7f             	xor    %esi,0x7f$%edx$
++ 	*a-f0-9+:	62 f2 7e 58 31 72 7f 	vpmovdb %zmm6,0x7f0$%edx$\{bad\}
+  	*a-f0-9+:	62 f1 7c 88 58       	$bad$
+  	*a-f0-9+:	c3                   	ret *
+  	*a-f0-9+:	62 f2 7d 4f 92 01    	vgatherdps $bad$,%zmm0\{%k7\}
+diff --git a/gas/testsuite/gas/i386/avx512f-nondef.s b/gas/testsuite/gas/i386/avx512f-nondef.s
+index 676c4e0fe4b..96d04666248 100644
+--- a/gas/testsuite/gas/i386/avx512f-nondef.s
++++ b/gas/testsuite/gas/i386/avx512f-nondef.s
+@@ -5,13 +5,15 @@
+ .byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
+ # vrndscalesd	{sae}, $123, %xmm4, %xmm5, %xmm6{%k7}	 # with not-null RC
+ .byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
+-# vpminud	%zmm4, %zmm5, %zmm6{%k7}	 # with 111 REX
++# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with 11 EVEX.{B,R'}
++.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
++# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with not-11 EVEX.{B,R'}
++.byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
++# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with set EVEX.b bit
+ .byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
+-# vpminud	%zmm4, %zmm5, %zmm6{%k7}	 # with not-111 REX
+-.byte 0x62, 0xc2, 0x55, 0x1f, 0x3b, 0xf4
+-# vpmovdb	%zmm6, 2032(%rdx) # with unset EVEX.B bit
++# vpmovdb	%zmm6, 2032(%rdx)		# with unset EVEX.b bit
+ .byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
+-# vpmovdb	%zmm6, 2032(%rdx) # with set EVEX.B bit - we should get (bad) operand
++# vpmovdb	%zmm6, 2032(%rdx)		# with set EVEX.b bit - we should get (bad) operand
+ .byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
+ # vaddps xmm0, xmm0, xmm3 # with EVEX.z set
+ .byte 0x62, 0xf1, 0x7c, 0x88, 0x58, 0xc3
+diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d
+index 367b2eb1321..4afcc6db728 100644
+--- a/gas/testsuite/gas/i386/evex.d
++++ b/gas/testsuite/gas/i386/evex.d
+@@ -8,14 +8,14 @@ Disassembly of section .text:
+ 
+ 0+ <_start>:
+  +a-f0-9+:	62 f1 d6 38 2a f0    	vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+- +a-f0-9+:	62 f1 57 38 2a f0    	vcvtsi2sdl %eax,$bad$,%xmm5,%xmm6
+- +a-f0-9+:	62 f1 d7 38 2a f0    	vcvtsi2sdl %eax,$bad$,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 2a f0    	vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
++ +a-f0-9+:	62 f1 d7 38 2a f0    	vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d6 08 7b f0    	vcvtusi2ssl %eax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 57 08 7b f0    	vcvtusi2sdl %eax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 08 7b f0    	vcvtusi2sdl %eax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d6 38 7b f0    	vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+- +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sdl %eax,$bad$,%xmm5,%xmm6
+- +a-f0-9+:	62 f1 d7 38 7b f0    	vcvtusi2sdl %eax,$bad$,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
++ +a-f0-9+:	62 f1 d7 38 7b f0    	vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+  +a-f0-9+:	62 e1 7e 08 2d c0    	vcvtss2si %xmm0,%eax
+  +a-f0-9+:	62 e1 7c 08 c2 c0 00 	vcmpeqps %xmm0,%xmm0,%k0
+ #pass
+diff --git a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d
+index bce2d80588d..e8ddfd58870 100644
+--- a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d
++++ b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d
+@@ -10,10 +10,9 @@ Disassembly of section .text:
+ 0+ <.text>:
+  	*a-f0-9+:	62 f3 d5 1f 0b f4 7b 	vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
+  	*a-f0-9+:	62 f3 d5 5f 0b f4 7b 	vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
+- 	*a-f0-9+:	62 f2 55 1f 3b f4    	vpminud %zmm4,%zmm5,%zmm6\{%k7\}
+- 	*a-f0-9+:	62 c2 55 1f 3b f4    	vpminud %zmm12,%zmm5,%zmm22\{%k7\}
++ 	*a-f0-9+:	62 f2 55 4f 3b f4    	vpminud %zmm4,%zmm5,%zmm6\{%k7\}
++ 	*a-f0-9+:	62 c2 55 4f 3b f4    	vpminud %zmm12,%zmm5,%zmm22\{%k7\}
++ 	*a-f0-9+:	62 f2 55 1f 3b f4    	vpminud \{rn-bad\},%zmm4,%zmm5,%zmm6\{%k7\}
+  	*a-f0-9+:	62 f2 7e 48 31 72 7f 	vpmovdb %zmm6,0x7f0$%rdx$
+- 	*a-f0-9+:	62                   	vpmovdb %zmm6,$bad$
+- 	*a-f0-9+:	f2 7e 58             	bnd jle (0x7d|7d <.text\+0x7d>)
+- 	*a-f0-9+:	31 72 7f             	xor    %esi,0x7f$%rdx$
++ 	*a-f0-9+:	62 f2 7e 58 31 72 7f 	vpmovdb %zmm6,0x7f0$%rdx$\{bad\}
+ #pass
+diff --git a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
+index 255d2c931f1..952f2db76b3 100644
+--- a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
++++ b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
+@@ -5,11 +5,13 @@
+ .byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
+ # vrndscalesd	{sae}, $123, %xmm4, %xmm5, %xmm6{%k7}	 # with not-null RC
+ .byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
+-# vpminud	%zmm4, %zmm5, %zmm6{%k7}	 # with 111 REX
++# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with 11 EVEX.{B,R'}
++.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
++# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with not-11 EVEX.{B,R'}
++.byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
++# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with set EVEX.b bit
+ .byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
+-# vpminud	%zmm4, %zmm5, %zmm6{%k7}	 # with not-111 REX
+-.byte 0x62, 0xc2, 0x55, 0x1f, 0x3b, 0xf4
+-# vpmovdb	%zmm6, 2032(%rdx) # with unset EVEX.B bit
++# vpmovdb	%zmm6, 2032(%rdx)		# with unset EVEX.b bit
+ .byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
+-# vpmovdb	%zmm6, 2032(%rdx) # with set EVEX.B bit - we should get (bad) operand
++# vpmovdb	%zmm6, 2032(%rdx)		# with set EVEX.b bit - we should get (bad) operand
+ .byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
+diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d
+index 3a7b48e0bf9..041747db892 100644
+--- a/gas/testsuite/gas/i386/x86-64-evex.d
++++ b/gas/testsuite/gas/i386/x86-64-evex.d
+@@ -9,13 +9,13 @@ Disassembly of section .text:
+ 
+ 0+ <_start>:
+  +a-f0-9+:	62 f1 d6 38 2a f0    	vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+- +a-f0-9+:	62 f1 57 38 2a f0    	vcvtsi2sd %eax,$bad$,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 2a f0    	vcvtsi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 38 2a f0    	vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d6 08 7b f0    	vcvtusi2ss %rax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 57 08 7b f0    	vcvtusi2sd %eax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 08 7b f0    	vcvtusi2sd %rax,%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d6 38 7b f0    	vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+- +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sd %eax,$bad$,%xmm5,%xmm6
++ +a-f0-9+:	62 f1 57 38 7b f0    	vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+  +a-f0-9+:	62 f1 d7 38 7b f0    	vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+  +a-f0-9+:	62 e1 7e 08 2d c0    	vcvtss2si %xmm0,$bad$
+  +a-f0-9+:	62 e1 7c 08 c2 c0 00 	vcmpeqps %xmm0,%xmm0,$bad$
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 521d6899338..b25a9f324c0 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -159,6 +159,11 @@ static int rex_used;
+    current instruction.  */
+ static int used_prefixes;
+ 
++/* Flags for EVEX bits which we somehow handled when printing the
++   current instruction.  */
++#define EVEX_b_used 1
++static int evex_used;
++
+ /* Flags stored in PREFIXES.  */
+ #define PREFIX_REPZ 1
+ #define PREFIX_REPNZ 2
+@@ -2524,12 +2529,12 @@ static const char *att_names_mask = {
+   "%k0", "%k1", "%k2", "%k3", "%k4", "%k5", "%k6", "%k7"
+ };
+ 
+-static const char *names_rounding =
++static const char *const names_rounding =
+ {
+-  "{rn-sae}",
+-  "{rd-sae}",
+-  "{ru-sae}",
+-  "{rz-sae}"
++  "{rn-",
++  "{rd-",
++  "{ru-",
++  "{rz-"
+ };
+ 
+ static const struct dis386 reg_table8 = {
+@@ -8578,6 +8583,7 @@ ckprefix (void)
+   prefixes = 0;
+   used_prefixes = 0;
+   rex_used = 0;
++  evex_used = 0;
+   last_lock_prefix = -1;
+   last_repz_prefix = -1;
+   last_repnz_prefix = -1;
+@@ -9661,6 +9667,21 @@ print_insn (bfd_vma pc, disassemble_info *info)
+ 		    oappend ("/(bad)");
+ 		}
+ 	    }
++
++	  /* Check whether rounding control was enabled for an insn not
++	     supporting it.  */
++	  if (modrm.mod == 3 && vex.b && !(evex_used & EVEX_b_used))
++	    {
++	      for (i = 0; i < MAX_OPERANDS; ++i)
++		{
++		  obufp = op_outi;
++		  if (*obufp)

_service:tar_scm:0015-x86-Simplify-check-for-distinct-TMM-register-operand.patch Added

@@ -0,0 +1,52 @@
+From fc141319027485a7cfcbae2451b048ddc6c33b48 Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Wed, 28 Jul 2021 10:42:47 -0700
+Subject: PATCH x86: Simplify check for distinct TMM register operands
+
+If any pair of operands in AMX instructions with 3 TMM register operands
+are the same, the instruction will UD.  Don't call register_number to
+check for distinct TMM register operands since all TMM register operands
+have the same size.
+
+	* config/tc-i386.c (check_VecOperands): Remove register_number
+	call when checking for distinct TMM register operands.
+
+diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
+index d98c6c4e949..1235c3e7733 100644
+--- a/gas/config/tc-i386.c
++++ b/gas/config/tc-i386.c
+@@ -6076,21 +6076,16 @@ check_VecOperands (const insn_template *t)
+ 	}
+     }
+ 
+-  /* For AMX instructions with three tmmword operands, all tmmword operand must be
+-     distinct */
+-  if (t->operand_types0.bitfield.tmmword
+-      && i.reg_operands == 3)
+-    {
+-      if (register_number (i.op0.regs)
+-          == register_number (i.op1.regs)
+-          || register_number (i.op0.regs)
+-             == register_number (i.op2.regs)
+-          || register_number (i.op1.regs)
+-             == register_number (i.op2.regs))
+-	{
+-	  i.error = invalid_tmm_register_set;
+-	  return 1;
+-	}
++  /* For AMX instructions with 3 TMM register operands, all operands
++      must be distinct.  */
++  if (i.reg_operands == 3
++      && t->operand_types0.bitfield.tmmword
++      && (i.op0.regs == i.op1.regs
++          || i.op0.regs == i.op2.regs
++          || i.op1.regs == i.op2.regs))
++    {
++      i.error = invalid_tmm_register_set;
++      return 1;
+     }
+ 
+   /* Check if broadcast is supported by the instruction and is applied
+-- 
+2.33.0
+

_service:tar_scm:0016-PATCH-1-2-Enable-Intel-AVX512_FP16-instructions.patch Added

@@ -0,0 +1,90788 @@
+From 0cc7872125efa71879e34403cc644cd19434eae3 Mon Sep 17 00:00:00 2001
+From: "Cui,Lili" <lili.cui@intel.com>
+Date: Mon, 14 Jun 2021 11:05:05 +0800
+Subject: PATCH PATCH 1/2 Enable Intel AVX512_FP16 instructions
+
+Intel AVX512 FP16 instructions use maps 3, 5 and 6. Maps 5 and 6 use 3 bits
+in the EVEX.mmm field (0b101, 0b110). Map 5 is for instructions that were FP32
+in map 1 (0Fxx). Map 6 is for instructions that were FP32 in map 2 (0F38xx).
+There are some exceptions to this rule. Some things in map 1 (0Fxx) with imm8
+operands predated our current conventions; those instructions moved to map 3.
+FP32 things in map 3 (0F3Axx) found new opcodes in map3 for FP16 because map3
+is very sparsely populated. Most of the FP16 instructions share opcodes and
+prefix (EVEX.pp) bits with the related FP32 operations.
+
+Intel AVX512 FP16 instructions has new displacements scaling rules, please refer
+to the public software developer manual for detail information.
+
+gas/
+
+2021-08-05  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+            H.J. Lu  <hongjiu.lu@intel.com>
+            Wei Xiao <wei3.xiao@intel.com>
+            Lili Cui  <lili.cui@intel.com>
+
+	* config/tc-i386.c (struct Broadcast_Operation): Adjust comment.
+	(cpu_arch): Add .avx512_fp16.
+	(cpu_noarch): Add noavx512_fp16.
+	(pte): Add evexmap5 and evexmap6.
+	(build_evex_prefix): Handle EVEXMAP5 and EVEXMAP6.
+	(check_VecOperations): Handle {1to32}.
+	(check_VecOperands): Handle CheckRegNumb.
+	(check_word_reg): Handle Toqword.
+	(i386_error): Add invalid_dest_and_src_register_set.
+	(match_template): Handle invalid_dest_and_src_register_set.
+	* doc/c-i386.texi: Document avx512_fp16, noavx512_fp16.
+
+opcodes/
+
+2021-08-05  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+            H.J. Lu  <hongjiu.lu@intel.com>
+            Wei Xiao <wei3.xiao@intel.com>
+            Lili Cui  <lili.cui@intel.com>
+
+	* i386-dis.c (EXwScalarS): New.
+	(EXxh): Ditto.
+	(EXxhc): Ditto.
+	(EXxmmqh): Ditto.
+	(EXxmmqdh): Ditto.
+	(EXEvexXwb): Ditto.
+	(DistinctDest_Fixup): Ditto.
+	(enum): Add xh_mode, evex_half_bcst_xmmqh_mode, evex_half_bcst_xmmqdh_mode
+	and w_swap_mode.
+	(enum): Add PREFIX_EVEX_0F3A08_W_0, PREFIX_EVEX_0F3A0A_W_0,
+	PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27, PREFIX_EVEX_0F3A56,
+	PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66, PREFIX_EVEX_0F3A67,
+	PREFIX_EVEX_0F3AC2, PREFIX_EVEX_MAP5_10, PREFIX_EVEX_MAP5_11,
+	PREFIX_EVEX_MAP5_1D, PREFIX_EVEX_MAP5_2A, PREFIX_EVEX_MAP5_2C,
+	PREFIX_EVEX_MAP5_2D, PREFIX_EVEX_MAP5_2E, PREFIX_EVEX_MAP5_2F,
+	PREFIX_EVEX_MAP5_51, PREFIX_EVEX_MAP5_58, PREFIX_EVEX_MAP5_59,
+	PREFIX_EVEX_MAP5_5A_W_0, PREFIX_EVEX_MAP5_5A_W_1,
+	PREFIX_EVEX_MAP5_5B_W_0, PREFIX_EVEX_MAP5_5B_W_1,
+	PREFIX_EVEX_MAP5_5C, PREFIX_EVEX_MAP5_5D, PREFIX_EVEX_MAP5_5E,
+	PREFIX_EVEX_MAP5_5F, PREFIX_EVEX_MAP5_78, PREFIX_EVEX_MAP5_79,
+	PREFIX_EVEX_MAP5_7A, PREFIX_EVEX_MAP5_7B, PREFIX_EVEX_MAP5_7C,
+	PREFIX_EVEX_MAP5_7D_W_0, PREFIX_EVEX_MAP6_13, PREFIX_EVEX_MAP6_56,
+	PREFIX_EVEX_MAP6_57, PREFIX_EVEX_MAP6_D6, PREFIX_EVEX_MAP6_D7
+	(enum): Add EVEX_MAP5 and EVEX_MAP6.
+	(enum): Add EVEX_W_MAP5_5A, EVEX_W_MAP5_5B,
+	EVEX_W_MAP5_78_P_0, EVEX_W_MAP5_78_P_2, EVEX_W_MAP5_79_P_0,
+	EVEX_W_MAP5_79_P_2, EVEX_W_MAP5_7A_P_2, EVEX_W_MAP5_7A_P_3,
+	EVEX_W_MAP5_7B_P_2, EVEX_W_MAP5_7C_P_0, EVEX_W_MAP5_7C_P_2,
+	EVEX_W_MAP5_7D, EVEX_W_MAP6_13_P_0, EVEX_W_MAP6_13_P_2,
+	(get_valid_dis386): Properly handle new instructions.
+	(intel_operand_size): Handle new modes.
+	(OP_E_memory): Ditto.
+	(OP_EX): Ditto.
+	* i386-dis-evex.h: Updated for AVX512_FP16.
+	* i386-dis-evex-mod.h: Updated for AVX512_FP16.
+	* i386-dis-evex-prefix.h: Updated for AVX512_FP16.
+	* i386-dis-evex-reg.h : Updated for AVX512_FP16.
+	* i386-dis-evex-w.h : Updated for AVX512_FP16.
+	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_FP16_FLAGS,
+	and CPU_ANY_AVX512_FP16_FLAGS. Update CPU_ANY_AVX512F_FLAGS
+	and CPU_ANY_AVX512BW_FLAGS.
+	(cpu_flags): Add CpuAVX512_FP16.
+	(opcode_modifiers): Add DistinctDest.
+	* i386-opc.h (enum): (AVX512_FP16): New.
+	(i386_opcode_modifier): Add reqdistinctreg.
+	(i386_cpu_flags): Add cpuavx512_fp16.
+	(EVEXMAP5): Defined as a macro.
+	(EVEXMAP6): Ditto.
+	* i386-opc.tbl: Add Intel AVX512_FP16 instructions.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Ditto.
+
+diff --git a/gas/NEWS b/gas/NEWS
+index 380363251c6..9e24e4ddc17 100644
+--- a/gas/NEWS
++++ b/gas/NEWS
+@@ -1,5 +1,7 @@
+ -*- text -*-
+ 
++* Add support for Intel AVX512_FP16 instructions.
++
+ Changes in 2.37:
+ 
+ * arm-symbianelf support removed.
+diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
+index 1235c3e7733..cdc660f79a4 100644
+--- a/gas/config/tc-i386.c
++++ b/gas/config/tc-i386.c
+@@ -246,6 +246,7 @@ enum i386_error
+     invalid_vsib_address,
+     invalid_vector_register_set,
+     invalid_tmm_register_set,
++    invalid_dest_and_src_register_set,
+     unsupported_vector_index_register,
+     unsupported_broadcast,
+     broadcast_needed,
+@@ -380,7 +381,7 @@ struct _i386_insn
+        expresses the broadcast factor.  */
+     struct Broadcast_Operation
+     {
+-      /* Type of broadcast: {1to2}, {1to4}, {1to8}, or {1to16}.  */
++      /* Type of broadcast: {1to2}, {1to4}, {1to8}, {1to16} or {1to32}.  */
+       unsigned int type;
+ 
+       /* Index of broadcasted operand.  */
+@@ -1237,6 +1238,8 @@ static const arch_entry cpu_arch =
+     CPU_UINTR_FLAGS, 0 },
+   { STRING_COMMA_LEN (".hreset"), PROCESSOR_UNKNOWN,
+     CPU_HRESET_FLAGS, 0 },
++  { STRING_COMMA_LEN (".avx512_fp16"), PROCESSOR_UNKNOWN,
++    CPU_AVX512_FP16_FLAGS, 0 },
+ };
+ 
+ static const noarch_entry cpu_noarch =
+@@ -1292,6 +1295,7 @@ static const noarch_entry cpu_noarch =
+   { STRING_COMMA_LEN ("nowidekl"), CPU_ANY_WIDEKL_FLAGS },
+   { STRING_COMMA_LEN ("nouintr"), CPU_ANY_UINTR_FLAGS },
+   { STRING_COMMA_LEN ("nohreset"), CPU_ANY_HRESET_FLAGS },
++  { STRING_COMMA_LEN ("noavx512_fp16"), CPU_ANY_AVX512_FP16_FLAGS },
+ };
+ 
+ #ifdef I386COFF
+@@ -3270,7 +3274,7 @@ pte (insn_template *t)
+ {
+   static const unsigned char opc_pfx = { 0, 0x66, 0xf3, 0xf2 };
+   static const char *const opc_spc = {
+-    NULL, "0f", "0f38", "0f3a", NULL, NULL, NULL, NULL,
++    NULL, "0f", "0f38", "0f3a", NULL, "evexmap5", "evexmap6", NULL,
+     "XOP08", "XOP09", "XOP0A",
+   };
+   unsigned int j;
+@@ -3865,7 +3869,7 @@ build_evex_prefix (void)
+   /* The high 3 bits of the second EVEX byte are 1's compliment of RXB
+      bits from REX.  */
+   gas_assert (i.tm.opcode_modifier.opcodespace >= SPACE_0F);
+-  gas_assert (i.tm.opcode_modifier.opcodespace <= SPACE_0F3A);
++  gas_assert (i.tm.opcode_modifier.opcodespace <= SPACE_EVEXMAP6);
+   i.vex.bytes1 = (~i.rex & 0x7) << 5 | i.tm.opcode_modifier.opcodespace;
+ 
+   /* The fifth bit of the second EVEX byte is 1's compliment of the
+@@ -6088,6 +6092,24 @@ check_VecOperands (const insn_template *t)
+       return 1;
+     }
+ 
++  /* For some special instructions require that destination must be distinct
++     from source registers.  */
++  if (t->opcode_modifier.distinctdest)
++    {
++      unsigned int dest_reg = i.operands - 1;
++
++      know (i.operands >= 3);
++
++      /* #UD if dest_reg == src1_reg or dest_reg == src2_reg.  */
++      if (i.opdest_reg - 1.regs == i.opdest_reg.regs
++	  || (i.reg_operands > 2
++	      && i.opdest_reg - 2.regs == i.opdest_reg.regs))
++	{
++	  i.error = invalid_dest_and_src_register_set;
++	  return 1;
++	}
++    }
++
+   /* Check if broadcast is supported by the instruction and is applied
+      to the memory operand.  */
+   if (i.broadcast.type)
+@@ -6848,6 +6870,9 @@ match_template (char mnem_suffix)
+ 	case invalid_tmm_register_set:
+ 	  err_msg = _("all tmm registers must be distinct");
+ 	  break;
++	case invalid_dest_and_src_register_set:
++	  err_msg = _("destination and source registers must be distinct");
++	  break;
+ 	case unsupported_vector_index_register:
+ 	  err_msg = _("unsupported vector index register");
+ 	  break;
+@@ -7628,6 +7653,14 @@ check_word_reg (void)

_service:tar_scm:0017-PATCH-2-2-Add-tests-for-Intel-AVX512_FP16-instructio.patch Added

@@ -0,0 +1,26295 @@
+From 17a089ffda6045908a30c86066748d239a5616d0 Mon Sep 17 00:00:00 2001
+From: "Cui,Lili" <lili.cui@intel.com>
+Date: Mon, 14 Jun 2021 11:15:51 +0800
+Subject: PATCH PATCH 2/2 Add tests for Intel AVX512_FP16 instructions
+
+Intel AVX512 FP16 instructions use maps 3, 5 and 6. Maps 5 and 6 use 3 bits
+in the EVEX.mmm field (0b101, 0b110). Map 5 is for instructions that were FP32
+in map 1 (0Fxx). Map 6 is for instructions that were FP32 in map 2 (0F38xx).
+There are some exceptions to this rule. Some things in map 1 (0Fxx) with imm8
+operands predated our current conventions; those instructions moved to map 3.
+FP32 things in map 3 (0F3Axx) found new opcodes in map3 for FP16 because map3
+is very sparsely populated. Most of the FP16 instructions share opcodes and
+prefix (EVEX.pp) bits with the related FP32 operations.
+
+Intel AVX512 FP16 instructions has new displacements scaling rules, please refer
+to the public software developer manual for detail information.
+
+gas/
+
+2021-08-05  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+            H.J. Lu  <hongjiu.lu@intel.com>
+            Wei Xiao <wei3.xiao@intel.com>
+            Lili Cui  <lili.cui@intel.com>
+
+	* testsuite/gas/i386/i386.exp: Run FP16 tests.
+	* testsuite/gas/i386/avx512_fp16-intel.d: New test.
+	* testsuite/gas/i386/avx512_fp16-inval-bcast.l: Ditto.
+	* testsuite/gas/i386/avx512_fp16-inval-bcast.s: Ditto.
+	* testsuite/gas/i386/avx512_fp16.d: Ditto.
+	* testsuite/gas/i386/avx512_fp16.s: Ditto.
+	* testsuite/gas/i386/avx512_fp16_pseudo_ops.d: Ditto.
+	* testsuite/gas/i386/avx512_fp16_pseudo_ops.s: Ditto.
+	* testsuite/gas/i386/avx512_fp16_vl-intel.d: Ditto.
+	* testsuite/gas/i386/avx512_fp16_vl.d: Ditto.
+	* testsuite/gas/i386/avx512_fp16_vl.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16-intel.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.l: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16_vl-intel.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16_vl.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16_vl.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16-inval-register.l: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16-inval-register.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16-bad.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_fp16-bad.s: Ditto.
+	* testsuite/gas/i386/x86-64-default-suffix-avx.d: Add new testcase.
+	* testsuite/gas/i386/x86-64-default-suffix.d: Ditto.
+	* testsuite/gas/i386/x86-64-default-suffix.s: Ditto.
+	* testsuite/gas/i386/xmmword.l: Ditto.
+	* testsuite/gas/i386/xmmword.s: Ditto.
+
+diff --git a/gas/testsuite/gas/i386/avx512_fp16-intel.d b/gas/testsuite/gas/i386/avx512_fp16-intel.d
+new file mode 100644
+index 00000000000..b3d7b609e39
+--- /dev/null
++++ b/gas/testsuite/gas/i386/avx512_fp16-intel.d
+@@ -0,0 +1,1479 @@
++#as:
++#objdump: -dw -Mintel
++#name: i386 AVX512-FP16 insns (Intel disassembly)
++#source: avx512_fp16.s
++
++.*: +file format .*
++
++Disassembly of section \.text:
++
++0+ <_start>:
++ 	*a-f0-9+: 	*62 f5 54 48 58 f4 	 *vaddph zmm6,zmm5,zmm4
++ 	*a-f0-9+: 	*62 f5 54 18 58 f4 	 *vaddph zmm6,zmm5,zmm4,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 54 9f 58 f4 	 *vaddph zmm6\{k7\}\{z\},zmm5,zmm4,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 54 4f 58 b4 f4 00 00 00 10 	 *vaddph zmm6\{k7\},zmm5,ZMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 54 58 58 31 	 *vaddph zmm6,zmm5,WORD PTR \ecx\\{1to32\}
++ 	*a-f0-9+: 	*62 f5 54 48 58 71 7f 	 *vaddph zmm6,zmm5,ZMMWORD PTR \ecx\+0x1fc0\
++ 	*a-f0-9+: 	*62 f5 54 df 58 72 80 	 *vaddph zmm6\{k7\}\{z\},zmm5,WORD PTR \edx-0x100\\{1to32\}
++ 	*a-f0-9+: 	*62 f5 56 08 58 f4 	 *vaddsh xmm6,xmm5,xmm4
++ 	*a-f0-9+: 	*62 f5 56 18 58 f4 	 *vaddsh xmm6,xmm5,xmm4,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 56 9f 58 f4 	 *vaddsh xmm6\{k7\}\{z\},xmm5,xmm4,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 56 0f 58 b4 f4 00 00 00 10 	 *vaddsh xmm6\{k7\},xmm5,WORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 56 08 58 31 	 *vaddsh xmm6,xmm5,WORD PTR \ecx\
++ 	*a-f0-9+: 	*62 f5 56 08 58 71 7f 	 *vaddsh xmm6,xmm5,WORD PTR \ecx\+0xfe\
++ 	*a-f0-9+: 	*62 f5 56 8f 58 72 80 	 *vaddsh xmm6\{k7\}\{z\},xmm5,WORD PTR \edx-0x100\
++ 	*a-f0-9+: 	*62 f3 54 48 c2 ec 7b 	 *vcmpph k5,zmm5,zmm4,0x7b
++ 	*a-f0-9+: 	*62 f3 54 18 c2 ec 7b 	 *vcmpph k5,zmm5,zmm4,\{sae\},0x7b
++ 	*a-f0-9+: 	*62 f3 54 1f c2 ec 7b 	 *vcmpph k5\{k7\},zmm5,zmm4,\{sae\},0x7b
++ 	*a-f0-9+: 	*62 f3 54 4f c2 ac f4 00 00 00 10 7b 	 *vcmpph k5\{k7\},zmm5,ZMMWORD PTR \esp\+esi\*8\+0x10000000\,0x7b
++ 	*a-f0-9+: 	*62 f3 54 58 c2 29 7b 	 *vcmpph k5,zmm5,WORD PTR \ecx\\{1to32\},0x7b
++ 	*a-f0-9+: 	*62 f3 54 48 c2 69 7f 7b 	 *vcmpph k5,zmm5,ZMMWORD PTR \ecx\+0x1fc0\,0x7b
++ 	*a-f0-9+: 	*62 f3 54 5f c2 6a 80 7b 	 *vcmpph k5\{k7\},zmm5,WORD PTR \edx-0x100\\{1to32\},0x7b
++ 	*a-f0-9+: 	*62 f3 56 08 c2 ec 7b 	 *vcmpsh k5,xmm5,xmm4,0x7b
++ 	*a-f0-9+: 	*62 f3 56 18 c2 ec 7b 	 *vcmpsh k5,xmm5,xmm4,\{sae\},0x7b
++ 	*a-f0-9+: 	*62 f3 56 1f c2 ec 7b 	 *vcmpsh k5\{k7\},xmm5,xmm4,\{sae\},0x7b
++ 	*a-f0-9+: 	*62 f3 56 0f c2 ac f4 00 00 00 10 7b 	 *vcmpsh k5\{k7\},xmm5,WORD PTR \esp\+esi\*8\+0x10000000\,0x7b
++ 	*a-f0-9+: 	*62 f3 56 08 c2 29 7b 	 *vcmpsh k5,xmm5,WORD PTR \ecx\,0x7b
++ 	*a-f0-9+: 	*62 f3 56 08 c2 69 7f 7b 	 *vcmpsh k5,xmm5,WORD PTR \ecx\+0xfe\,0x7b
++ 	*a-f0-9+: 	*62 f3 56 0f c2 6a 80 7b 	 *vcmpsh k5\{k7\},xmm5,WORD PTR \edx-0x100\,0x7b
++ 	*a-f0-9+: 	*62 f5 7c 08 2f f5 	 *vcomish xmm6,xmm5
++ 	*a-f0-9+: 	*62 f5 7c 18 2f f5 	 *vcomish xmm6,xmm5,\{sae\}
++ 	*a-f0-9+: 	*62 f5 7c 08 2f b4 f4 00 00 00 10 	 *vcomish xmm6,WORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7c 08 2f 31 	 *vcomish xmm6,WORD PTR \ecx\
++ 	*a-f0-9+: 	*62 f5 7c 08 2f 71 7f 	 *vcomish xmm6,WORD PTR \ecx\+0xfe\
++ 	*a-f0-9+: 	*62 f5 7c 08 2f 72 80 	 *vcomish xmm6,WORD PTR \edx-0x100\
++ 	*a-f0-9+: 	*62 f5 7c 48 5b f5 	 *vcvtdq2ph ymm6,zmm5
++ 	*a-f0-9+: 	*62 f5 7c 18 5b f5 	 *vcvtdq2ph ymm6,zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7c 9f 5b f5 	 *vcvtdq2ph ymm6\{k7\}\{z\},zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7c 4f 5b b4 f4 00 00 00 10 	 *vcvtdq2ph ymm6\{k7\},ZMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7c 58 5b 31 	 *vcvtdq2ph ymm6,DWORD PTR \ecx\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 7c 48 5b 71 7f 	 *vcvtdq2ph ymm6,ZMMWORD PTR \ecx\+0x1fc0\
++ 	*a-f0-9+: 	*62 f5 7c df 5b 72 80 	 *vcvtdq2ph ymm6\{k7\}\{z\},DWORD PTR \edx-0x200\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 fd 48 5a f5 	 *vcvtpd2ph xmm6,zmm5
++ 	*a-f0-9+: 	*62 f5 fd 18 5a f5 	 *vcvtpd2ph xmm6,zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 fd 9f 5a f5 	 *vcvtpd2ph xmm6\{k7\}\{z\},zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 fd 4f 5a b4 f4 00 00 00 10 	 *vcvtpd2ph xmm6\{k7\},ZMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 fd 58 5a 31 	 *vcvtpd2ph xmm6,QWORD PTR \ecx\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 fd 48 5a 71 7f 	 *vcvtpd2ph xmm6,ZMMWORD PTR \ecx\+0x1fc0\
++ 	*a-f0-9+: 	*62 f5 fd df 5a 72 80 	 *vcvtpd2ph xmm6\{k7\}\{z\},QWORD PTR \edx-0x400\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 7d 48 5b f5 	 *vcvtph2dq zmm6,ymm5
++ 	*a-f0-9+: 	*62 f5 7d 18 5b f5 	 *vcvtph2dq zmm6,ymm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 9f 5b f5 	 *vcvtph2dq zmm6\{k7\}\{z\},ymm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 4f 5b b4 f4 00 00 00 10 	 *vcvtph2dq zmm6\{k7\},YMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7d 58 5b 31 	 *vcvtph2dq zmm6,WORD PTR \ecx\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 7d 48 5b 71 7f 	 *vcvtph2dq zmm6,YMMWORD PTR \ecx\+0xfe0\
++ 	*a-f0-9+: 	*62 f5 7d df 5b 72 80 	 *vcvtph2dq zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 7c 48 5a f5 	 *vcvtph2pd zmm6,xmm5
++ 	*a-f0-9+: 	*62 f5 7c 18 5a f5 	 *vcvtph2pd zmm6,xmm5,\{sae\}
++ 	*a-f0-9+: 	*62 f5 7c 9f 5a f5 	 *vcvtph2pd zmm6\{k7\}\{z\},xmm5,\{sae\}
++ 	*a-f0-9+: 	*62 f5 7c 4f 5a b4 f4 00 00 00 10 	 *vcvtph2pd zmm6\{k7\},XMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7c 58 5a 31 	 *vcvtph2pd zmm6,WORD PTR \ecx\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 7c 48 5a 71 7f 	 *vcvtph2pd zmm6,XMMWORD PTR \ecx\+0x7f0\
++ 	*a-f0-9+: 	*62 f5 7c df 5a 72 80 	 *vcvtph2pd zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to8\}
++ 	*a-f0-9+: 	*62 f6 7d 48 13 f5 	 *vcvtph2psx zmm6,ymm5
++ 	*a-f0-9+: 	*62 f6 7d 18 13 f5 	 *vcvtph2psx zmm6,ymm5,\{sae\}
++ 	*a-f0-9+: 	*62 f6 7d 9f 13 f5 	 *vcvtph2psx zmm6\{k7\}\{z\},ymm5,\{sae\}
++ 	*a-f0-9+: 	*62 f6 7d 4f 13 b4 f4 00 00 00 10 	 *vcvtph2psx zmm6\{k7\},YMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f6 7d 58 13 31 	 *vcvtph2psx zmm6,WORD PTR \ecx\\{1to16\}
++ 	*a-f0-9+: 	*62 f6 7d 48 13 71 7f 	 *vcvtph2psx zmm6,YMMWORD PTR \ecx\+0xfe0\
++ 	*a-f0-9+: 	*62 f6 7d df 13 72 80 	 *vcvtph2psx zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 7d 48 7b f5 	 *vcvtph2qq zmm6,xmm5
++ 	*a-f0-9+: 	*62 f5 7d 18 7b f5 	 *vcvtph2qq zmm6,xmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 9f 7b f5 	 *vcvtph2qq zmm6\{k7\}\{z\},xmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 4f 7b b4 f4 00 00 00 10 	 *vcvtph2qq zmm6\{k7\},XMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7d 58 7b 31 	 *vcvtph2qq zmm6,WORD PTR \ecx\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 7d 48 7b 71 7f 	 *vcvtph2qq zmm6,XMMWORD PTR \ecx\+0x7f0\
++ 	*a-f0-9+: 	*62 f5 7d df 7b 72 80 	 *vcvtph2qq zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 7c 48 79 f5 	 *vcvtph2udq zmm6,ymm5
++ 	*a-f0-9+: 	*62 f5 7c 18 79 f5 	 *vcvtph2udq zmm6,ymm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7c 9f 79 f5 	 *vcvtph2udq zmm6\{k7\}\{z\},ymm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7c 4f 79 b4 f4 00 00 00 10 	 *vcvtph2udq zmm6\{k7\},YMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7c 58 79 31 	 *vcvtph2udq zmm6,WORD PTR \ecx\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 7c 48 79 71 7f 	 *vcvtph2udq zmm6,YMMWORD PTR \ecx\+0xfe0\
++ 	*a-f0-9+: 	*62 f5 7c df 79 72 80 	 *vcvtph2udq zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 7d 48 79 f5 	 *vcvtph2uqq zmm6,xmm5
++ 	*a-f0-9+: 	*62 f5 7d 18 79 f5 	 *vcvtph2uqq zmm6,xmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 9f 79 f5 	 *vcvtph2uqq zmm6\{k7\}\{z\},xmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 4f 79 b4 f4 00 00 00 10 	 *vcvtph2uqq zmm6\{k7\},XMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7d 58 79 31 	 *vcvtph2uqq zmm6,WORD PTR \ecx\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 7d 48 79 71 7f 	 *vcvtph2uqq zmm6,XMMWORD PTR \ecx\+0x7f0\
++ 	*a-f0-9+: 	*62 f5 7d df 79 72 80 	 *vcvtph2uqq zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 7c 48 7d f5 	 *vcvtph2uw zmm6,zmm5
++ 	*a-f0-9+: 	*62 f5 7c 18 7d f5 	 *vcvtph2uw zmm6,zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7c 9f 7d f5 	 *vcvtph2uw zmm6\{k7\}\{z\},zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7c 4f 7d b4 f4 00 00 00 10 	 *vcvtph2uw zmm6\{k7\},ZMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7c 58 7d 31 	 *vcvtph2uw zmm6,WORD PTR \ecx\\{1to32\}
++ 	*a-f0-9+: 	*62 f5 7c 48 7d 71 7f 	 *vcvtph2uw zmm6,ZMMWORD PTR \ecx\+0x1fc0\
++ 	*a-f0-9+: 	*62 f5 7c df 7d 72 80 	 *vcvtph2uw zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to32\}
++ 	*a-f0-9+: 	*62 f5 7d 48 7d f5 	 *vcvtph2w zmm6,zmm5
++ 	*a-f0-9+: 	*62 f5 7d 18 7d f5 	 *vcvtph2w zmm6,zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 9f 7d f5 	 *vcvtph2w zmm6\{k7\}\{z\},zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 4f 7d b4 f4 00 00 00 10 	 *vcvtph2w zmm6\{k7\},ZMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7d 58 7d 31 	 *vcvtph2w zmm6,WORD PTR \ecx\\{1to32\}
++ 	*a-f0-9+: 	*62 f5 7d 48 7d 71 7f 	 *vcvtph2w zmm6,ZMMWORD PTR \ecx\+0x1fc0\
++ 	*a-f0-9+: 	*62 f5 7d df 7d 72 80 	 *vcvtph2w zmm6\{k7\}\{z\},WORD PTR \edx-0x100\\{1to32\}
++ 	*a-f0-9+: 	*62 f5 7d 48 1d f5 	 *vcvtps2phx ymm6,zmm5
++ 	*a-f0-9+: 	*62 f5 7d 18 1d f5 	 *vcvtps2phx ymm6,zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 9f 1d f5 	 *vcvtps2phx ymm6\{k7\}\{z\},zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 7d 4f 1d b4 f4 00 00 00 10 	 *vcvtps2phx ymm6\{k7\},ZMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 7d 58 1d 31 	 *vcvtps2phx ymm6,DWORD PTR \ecx\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 7d 48 1d 71 7f 	 *vcvtps2phx ymm6,ZMMWORD PTR \ecx\+0x1fc0\
++ 	*a-f0-9+: 	*62 f5 7d df 1d 72 80 	 *vcvtps2phx ymm6\{k7\}\{z\},DWORD PTR \edx-0x200\\{1to16\}
++ 	*a-f0-9+: 	*62 f5 fc 48 5b f5 	 *vcvtqq2ph xmm6,zmm5
++ 	*a-f0-9+: 	*62 f5 fc 18 5b f5 	 *vcvtqq2ph xmm6,zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 fc 9f 5b f5 	 *vcvtqq2ph xmm6\{k7\}\{z\},zmm5,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 fc 4f 5b b4 f4 00 00 00 10 	 *vcvtqq2ph xmm6\{k7\},ZMMWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 fc 58 5b 31 	 *vcvtqq2ph xmm6,QWORD PTR \ecx\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 fc 48 5b 71 7f 	 *vcvtqq2ph xmm6,ZMMWORD PTR \ecx\+0x1fc0\
++ 	*a-f0-9+: 	*62 f5 fc df 5b 72 80 	 *vcvtqq2ph xmm6\{k7\}\{z\},QWORD PTR \edx-0x400\\{1to8\}
++ 	*a-f0-9+: 	*62 f5 d7 08 5a f4 	 *vcvtsd2sh xmm6,xmm5,xmm4
++ 	*a-f0-9+: 	*62 f5 d7 18 5a f4 	 *vcvtsd2sh xmm6,xmm5,xmm4,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 d7 9f 5a f4 	 *vcvtsd2sh xmm6\{k7\}\{z\},xmm5,xmm4,\{rn-sae\}
++ 	*a-f0-9+: 	*62 f5 d7 0f 5a b4 f4 00 00 00 10 	 *vcvtsd2sh xmm6\{k7\},xmm5,QWORD PTR \esp\+esi\*8\+0x10000000\
++ 	*a-f0-9+: 	*62 f5 d7 08 5a 31 	 *vcvtsd2sh xmm6,xmm5,QWORD PTR \ecx\
++ 	*a-f0-9+: 	*62 f5 d7 08 5a 71 7f 	 *vcvtsd2sh xmm6,xmm5,QWORD PTR \ecx\+0x3f8\
++ 	*a-f0-9+: 	*62 f5 d7 8f 5a 72 80 	 *vcvtsd2sh xmm6\{k7\}\{z\},xmm5,QWORD PTR \edx-0x400\
++ 	*a-f0-9+: 	*62 f5 56 08 5a f4 	 *vcvtsh2sd xmm6,xmm5,xmm4
++ 	*a-f0-9+: 	*62 f5 56 18 5a f4 	 *vcvtsh2sd xmm6,xmm5,xmm4,\{sae\}
++ 	*a-f0-9+: 	*62 f5 56 9f 5a f4 	 *vcvtsh2sd xmm6\{k7\}\{z\},xmm5,xmm4,\{sae\}

_service:tar_scm:0018-x86-ELF-fix-.tfloat-output.patch Added

@@ -0,0 +1,204 @@
+From e2295dade838ad296e1e1cd1096177058139b6b3 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Wed, 11 Aug 2021 08:30:26 +0200
+Subject: PATCH x86/ELF: fix .tfloat output
+
+The ELF psABI-s are quite clear here: On 32-bit the data type is 12
+bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16
+bytes long (with 6 bytes of padding). Make ieee_md_atof() capable of
+handling such padding, and specify the needed padding for x86 (leaving
+non-ELF targets alone for now). Split the existing x86 testcase.
+
+diff --git a/gas/config/atof-ieee.c b/gas/config/atof-ieee.c
+index fa988aa36ee..e6e8879b51b 100644
+--- a/gas/config/atof-ieee.c
++++ b/gas/config/atof-ieee.c
+@@ -30,7 +30,13 @@ extern FLONUM_TYPE generic_floating_point_number;
+ #define F_PRECISION    2
+ #define D_PRECISION    4
+ #define X_PRECISION    5
++#ifndef X_PRECISION_PAD
++#define X_PRECISION_PAD 0
++#endif
+ #define P_PRECISION    5
++#ifndef P_PRECISION_PAD
++#define P_PRECISION_PAD X_PRECISION_PAD
++#endif
+ 
+ /* Length in LittleNums of guard bits.  */
+ #define GUARD          2
+@@ -760,7 +766,7 @@ ieee_md_atof (int type,
+   LITTLENUM_TYPE wordsMAX_LITTLENUMS;
+   LITTLENUM_TYPE *wordP;
+   char *t;
+-  int prec = 0;
++  int prec = 0, pad = 0;
+ 
+   if (strchr (FLT_CHARS, type) != NULL)
+     {
+@@ -788,6 +794,7 @@ ieee_md_atof (int type,
+ 	case 't':
+ 	case 'T':
+ 	  prec = X_PRECISION;
++	  pad = X_PRECISION_PAD;
+ 	  type = 'x';		/* This is what atof_ieee() understands.  */
+ 	  break;
+ 
+@@ -803,6 +810,7 @@ ieee_md_atof (int type,
+ #else
+ 	  prec = P_PRECISION;
+ #endif
++	  pad = P_PRECISION_PAD;
+ 	  break;
+ 
+ 	default:
+@@ -835,7 +843,7 @@ ieee_md_atof (int type,
+   if (t)
+     input_line_pointer = t;
+ 
+-  *sizeP = prec * sizeof (LITTLENUM_TYPE);
++  *sizeP = (prec + pad) * sizeof (LITTLENUM_TYPE);
+ 
+   if (big_wordian)
+     {
+@@ -854,5 +862,8 @@ ieee_md_atof (int type,
+ 	}
+     }
+ 
++  memset (litP, 0, pad * sizeof (LITTLENUM_TYPE));
++  litP += pad * sizeof (LITTLENUM_TYPE);
++
+   return NULL;
+ }
+diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
+index cdc660f79a4..0fa8b0d5a04 100644
+--- a/gas/config/tc-i386.c
++++ b/gas/config/tc-i386.c
+@@ -10229,6 +10229,19 @@ x86_cons_fix_new (fragS *frag, unsigned int off, unsigned int len,
+   fix_new_exp (frag, off, len, exp, 0, r);
+ }
+ 
++/* Return the number of padding LITTLENUMs following a tbyte floating
++   point value.  */
++
++int
++x86_tfloat_pad (void)
++{
++#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
++   if (IS_ELF)
++     return object_64bit ? 3 : 1;
++#endif
++   return 0;
++}
++
+ /* Export the ABI address size for use by TC_ADDRESS_BYTES for the
+    purpose of the `.dc.a' internal pseudo-op.  */
+ 
+diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
+index 90d23da7d91..f94226edf78 100644
+--- a/gas/config/tc-i386.h
++++ b/gas/config/tc-i386.h
+@@ -134,6 +134,9 @@ extern bfd_reloc_code_real_type x86_cons (expressionS *, int);
+ extern void x86_cons_fix_new
+ (fragS *, unsigned int, unsigned int, expressionS *, bfd_reloc_code_real_type);
+ 
++#define X_PRECISION_PAD x86_tfloat_pad ()
++extern int x86_tfloat_pad (void);
++
+ #define TC_ADDRESS_BYTES x86_address_bytes
+ extern int x86_address_bytes (void);
+ 
+diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
+new file mode 100644
+index 00000000000..6ef9c83ac54
+--- /dev/null
++++ b/gas/testsuite/gas/i386/fp-elf32.d
+@@ -0,0 +1,12 @@
++#objdump: -s -j .data
++#name: i386 fp (ELF)
++#source: fp.s
++
++.*:     file format .*
++
++Contents of section .data:
++ 0000 00881bcd 4b789ad4 00400000 71a37909  .*
++ 0010 4f930a40 789a5440 789a5440 00000000  .*
++ 0020 e65e1710 20395e3b e65e1710 20395e3b  .*
++ 0030 00000000 0000a044 01000000 0000a044  .*
++ 0040 00000000 0000f03f .*
+diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
+new file mode 100644
+index 00000000000..2e68ac8ebca
+--- /dev/null
++++ b/gas/testsuite/gas/i386/fp-elf64.d
+@@ -0,0 +1,12 @@
++#objdump: -s -j .data
++#name: x86-64 fp (ELF)
++#source: fp.s
++
++.*:     file format .*
++
++Contents of section .data:
++ 0000 00881bcd 4b789ad4 00400000 00000000  .*
++ 0010 71a37909 4f930a40 789a5440 789a5440  .*
++ 0020 e65e1710 20395e3b e65e1710 20395e3b  .*
++ 0030 00000000 0000a044 01000000 0000a044  .*
++ 0040 00000000 0000f03f .*
+diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
+index 11a50cf2683..fca56f29ac1 100644
+--- a/gas/testsuite/gas/i386/fp.s
++++ b/gas/testsuite/gas/i386/fp.s
+@@ -7,10 +7,10 @@
+ #	.byte 0x71, 0xa3, 0x79, 0x09, 0x4f, 0x93, 0x0a, 0x40
+ # The next two are 32-bit floating point format.
+ 	.float 3.32192809488736218171e0
+-#	.byte 0x78, 0x9a, 0x54, 0x40, 0, 0, 0, 0
++#	.byte 0x78, 0x9a, 0x54, 0x40
+ 	.single 3.32192809488736218171e0
+-#	.byte 0x78, 0x9a, 0x54, 0x40, 0, 0, 0, 0
+-	.byte 0, 0, 0, 0, 0, 0
++#	.byte 0x78, 0x9a, 0x54, 0x40
++	.p2align 4,0
+ 
+ # The assembler used to treat the next value as zero instead of 1e-22.
+         .double .0000000000000000000001
+diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
+index 3464bc2702b..122da6a2315 100644
+--- a/gas/testsuite/gas/i386/i386.exp
++++ b/gas/testsuite/gas/i386/i386.exp
+@@ -118,7 +118,6 @@ if gas_32_check then {
+     run_list_test "lockbad-1" "-al"
+     run_dump_test "long-1"
+     run_dump_test "long-1-intel"
+-    run_dump_test "fp"
+     run_dump_test "nops"
+     run_dump_test "nops16-1"
+     run_dump_test "nops-1"
+@@ -624,6 +623,7 @@ if gas_32_check then {
+ 	run_dump_test "intel-movs16"
+ 	run_dump_test "intel-cmps32"
+ 	run_dump_test "intel-cmps16"
++	run_dump_test "fp-elf32"
+ 	run_list_test "inval-equ-1" "-al"
+ 	run_list_test "inval-equ-2" "-al"
+ 	run_dump_test "ifunc"
+@@ -697,6 +697,8 @@ if gas_32_check then {
+ 	    run_dump_test "iamcu-5"
+ 	    run_list_test "iamcu-inval-1" "-march=iamcu -al"
+ 	}
++    } else {
++	run_dump_test "fp"
+     }
+ 
+     # This is a PE specific test.
+@@ -1274,6 +1276,7 @@ if gas_64_check then {
+ 	run_list_test "reloc64" "--defsym _bad_=1"
+ 	run_dump_test "mixed-mode-reloc64"
+ 	run_dump_test "rela"
++	run_dump_test "fp-elf64"
+ 	run_dump_test "x86-64-ifunc"

_service:tar_scm:0019-x86-ELF-fix-.ds.x-output.patch Added

@@ -0,0 +1,155 @@
+From e74e2b4c336fad993b0dd31b859af919ad52ec9e Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Wed, 11 Aug 2021 08:31:03 +0200
+Subject: PATCH x86/ELF: fix .ds.x output
+
+The ELF psABI-s are quite clear here: On 32-bit the underlying data type
+is 12 bytes long (with 2 bytes of trailing padding), while on 64-bit it
+is 16 bytes long (with 6 bytes of padding). Make s_space() capable of
+handling 'x' (and 'p') type floating point being other than 12 bytes
+wide (also adjusting documentation). This requires duplicating the
+definition of X_PRECISION in the target speciifc header; the compiler
+would complain if this was out of sync with config/atof-ieee.c.
+
+Note that for now padding space doesn't get separated from actual
+storage, which means that things will work correctly only for little-
+endian cases, and which also means that by specifying large enough
+numbers padding space can be set to non-zero. Since the logic is needed
+for a single little-endian architecture only for now, I'm hoping that
+this might be acceptable for the time being; otherwise the change will
+become more intrusive.
+
+Note also that this brings the emitted data size of .ds.x vs .tfloat in
+line for non-ELF targets as well; the issue will be even more obvious
+when further taking into account a subsequent patch fixing .dc.x/.dcb.x
+(where output sizes currently differ depending on input format).
+
+Extend existing x86 testcases.
+
+diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
+index f94226edf78..2dc6312f28e 100644
+--- a/gas/config/tc-i386.h
++++ b/gas/config/tc-i386.h
+@@ -134,6 +134,7 @@ extern bfd_reloc_code_real_type x86_cons (expressionS *, int);
+ extern void x86_cons_fix_new
+ (fragS *, unsigned int, unsigned int, expressionS *, bfd_reloc_code_real_type);
+ 
++#define X_PRECISION     5
+ #define X_PRECISION_PAD x86_tfloat_pad ()
+ extern int x86_tfloat_pad (void);
+ 
+diff --git a/gas/doc/as.texi b/gas/doc/as.texi
+index 292c4af2bb6..b8d5b9be15e 100644
+--- a/gas/doc/as.texi
++++ b/gas/doc/as.texi
+@@ -5125,13 +5125,13 @@ Emits 8-byte values.
+ @item @samp{.l}
+ Emits 4-byte values.
+ @item @samp{.p}
+-Emits 12-byte values.
++Emits values with size matching packed-decimal floating-point ones.
+ @item @samp{.s}
+ Emits 4-byte values.
+ @item @samp{.w}
+ Emits 2-byte values.
+ @item @samp{.x}
+-Emits 12-byte values.
++Emits values with size matching long double precision floating-point ones.
+ @end table
+ 
+ Note - unlike the @code{.dcb} directive the @samp{.d}, @samp{.s} and @samp{.x}
+diff --git a/gas/read.c b/gas/read.c
+index ea9261e639b..6bba696cebc 100644
+--- a/gas/read.c
++++ b/gas/read.c
+@@ -382,10 +382,10 @@ static const pseudo_typeS potable = {
+   {"ds.b", s_space, 1},
+   {"ds.d", s_space, 8},
+   {"ds.l", s_space, 4},
+-  {"ds.p", s_space, 12},
++  {"ds.p", s_space, 'p'},
+   {"ds.s", s_space, 4},
+   {"ds.w", s_space, 2},
+-  {"ds.x", s_space, 12},
++  {"ds.x", s_space, 'x'},
+   {"debug", s_ignore, 0},
+ #ifdef S_SET_DESC
+   {"desc", s_desc, 0},
+@@ -3327,6 +3327,29 @@ s_space (int mult)
+   md_flush_pending_output ();
+ #endif
+ 
++  switch (mult)
++    {
++    case 'x':
++#ifdef X_PRECISION
++# ifndef P_PRECISION
++#  define P_PRECISION     X_PRECISION
++#  define P_PRECISION_PAD X_PRECISION_PAD
++# endif
++      mult = (X_PRECISION + X_PRECISION_PAD) * sizeof (LITTLENUM_TYPE);
++      if (!mult)
++#endif
++	mult = 12;
++      break;
++
++    case 'p':
++#ifdef P_PRECISION
++      mult = (P_PRECISION + P_PRECISION_PAD) * sizeof (LITTLENUM_TYPE);
++      if (!mult)
++#endif
++	mult = 12;
++      break;
++    }
++
+ #ifdef md_cons_align
+   md_cons_align (1);
+ #endif
+diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
+index 6ef9c83ac54..9e1254615ec 100644
+--- a/gas/testsuite/gas/i386/fp-elf32.d
++++ b/gas/testsuite/gas/i386/fp-elf32.d
+@@ -9,4 +9,5 @@ Contents of section .data:
+  0010 4f930a40 789a5440 789a5440 00000000  .*
+  0020 e65e1710 20395e3b e65e1710 20395e3b  .*
+  0030 00000000 0000a044 01000000 0000a044  .*
+- 0040 00000000 0000f03f .*
++ 0040 00000000 0000f03f 00000000 00000000  .*
++ 0050 ffffffff ffffffff ffffffff cccccccc  .*
+diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
+index 2e68ac8ebca..0314929cf9c 100644
+--- a/gas/testsuite/gas/i386/fp-elf64.d
++++ b/gas/testsuite/gas/i386/fp-elf64.d
+@@ -9,4 +9,5 @@ Contents of section .data:
+  0010 71a37909 4f930a40 789a5440 789a5440  .*
+  0020 e65e1710 20395e3b e65e1710 20395e3b  .*
+  0030 00000000 0000a044 01000000 0000a044  .*
+- 0040 00000000 0000f03f .*
++ 0040 00000000 0000f03f 00000000 00000000  .*
++ 0050 ffffffff ffffffff ffffffff ffffffff  .*
+diff --git a/gas/testsuite/gas/i386/fp.d b/gas/testsuite/gas/i386/fp.d
+index edf79ff9996..dd7e028b44b 100644
+--- a/gas/testsuite/gas/i386/fp.d
++++ b/gas/testsuite/gas/i386/fp.d
+@@ -8,4 +8,5 @@ Contents of section .data:
+  0010 0a40789a 5440789a 54400000 00000000  .*
+  0020 e65e1710 20395e3b e65e1710 20395e3b  .*
+  0030 00000000 0000a044 01000000 0000a044  .*
+- 0040 00000000 0000f03f .*
++ 0040 00000000 0000f03f 00000000 00000000  .*
++ 0050 ffffffff ffffffff ffffcccc cccccccc  .*
+diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
+index fca56f29ac1..601709c2196 100644
+--- a/gas/testsuite/gas/i386/fp.s
++++ b/gas/testsuite/gas/i386/fp.s
+@@ -20,3 +20,7 @@
+ 	.double 37778931862957165903873.0
+ # Ensure we handle a crazy number of digits
+ 	.double 1.000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
++	.p2align 4,0
++
++	.ds.x 1, -1
++	.p2align 4,0xcc
+-- 
+2.33.0
+

_service:tar_scm:0020-x86-ELF-fix-.tfloat-output-with-hex-input.patch Added

@@ -0,0 +1,113 @@
+From 8f2200fe8e7f17295ed6d9bbc908da533c95e089 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Wed, 11 Aug 2021 08:31:41 +0200
+Subject: PATCH x86/ELF: fix .tfloat output with hex input
+
+The ELF psABI-s are quite clear here: On 32-bit the data type is 12
+bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16
+bytes long (with 6 bytes of padding). Make hex_float() capable of
+handling such padding.
+
+Note that this brings the emitted data size of .dc.x / .dcb.x in line
+also for non-ELF targets; so far they were different depending on input
+format (dec vs hex).
+
+Extend the existing x86 testcases.
+
+diff --git a/gas/read.c b/gas/read.c
+index 6bba696cebc..b8e845dd569 100644
+--- a/gas/read.c
++++ b/gas/read.c
+@@ -4847,7 +4847,7 @@ parse_repeat_cons (expressionS *exp, unsigned int nbytes)
+ static int
+ hex_float (int float_type, char *bytes)
+ {
+-  int length;
++  int length, pad = 0;
+   int i;
+ 
+   switch (float_type)
+@@ -4868,12 +4868,22 @@ hex_float (int float_type, char *bytes)
+ 
+     case 'x':
+     case 'X':
+-      length = 12;
++#ifdef X_PRECISION
++      length = X_PRECISION * sizeof (LITTLENUM_TYPE);
++      pad = X_PRECISION_PAD * sizeof (LITTLENUM_TYPE);
++      if (!length)
++#endif
++	length = 12;
+       break;
+ 
+     case 'p':
+     case 'P':
+-      length = 12;
++#ifdef P_PRECISION
++      length = P_PRECISION * sizeof (LITTLENUM_TYPE);
++      pad = P_PRECISION_PAD * sizeof (LITTLENUM_TYPE);
++      if (!length)
++#endif
++	length = 12;
+       break;
+ 
+     default:
+@@ -4926,7 +4936,9 @@ hex_float (int float_type, char *bytes)
+ 	memset (bytes, 0, length - i);
+     }
+ 
+-  return length;
++  memset (bytes + length, 0, pad);
++
++  return length + pad;
+ }
+ 
+ /*			float_cons()
+diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
+index 9e1254615ec..eefe84db310 100644
+--- a/gas/testsuite/gas/i386/fp-elf32.d
++++ b/gas/testsuite/gas/i386/fp-elf32.d
+@@ -11,3 +11,6 @@ Contents of section .data:
+  0030 00000000 0000a044 01000000 0000a044  .*
+  0040 00000000 0000f03f 00000000 00000000  .*
+  0050 ffffffff ffffffff ffffffff cccccccc  .*
++ 0060 00000000 00000080 fe3f0000 00000000  .*
++ 0070 00000080 fdbf0000 00000000 00000080  .*
++ 0080 ff030000 aaaaaaaa aaaaaaaa aaaaaaaa  .*
+diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
+index 0314929cf9c..0756aa1e36a 100644
+--- a/gas/testsuite/gas/i386/fp-elf64.d
++++ b/gas/testsuite/gas/i386/fp-elf64.d
+@@ -11,3 +11,6 @@ Contents of section .data:
+  0030 00000000 0000a044 01000000 0000a044  .*
+  0040 00000000 0000f03f 00000000 00000000  .*
+  0050 ffffffff ffffffff ffffffff ffffffff  .*
++ 0060 00000000 00000080 fe3f0000 00000000  .*
++ 0070 00000000 00000080 fdbf0000 00000000  .*
++ 0080 00000000 00000080 ff030000 00000000  .*
+diff --git a/gas/testsuite/gas/i386/fp.d b/gas/testsuite/gas/i386/fp.d
+index dd7e028b44b..b93595ac8c3 100644
+--- a/gas/testsuite/gas/i386/fp.d
++++ b/gas/testsuite/gas/i386/fp.d
+@@ -10,3 +10,5 @@ Contents of section .data:
+  0030 00000000 0000a044 01000000 0000a044  .*
+  0040 00000000 0000f03f 00000000 00000000  .*
+  0050 ffffffff ffffffff ffffcccc cccccccc  .*
++ 0060 00000000 00000080 fe3f0000 00000000  .*
++ 0070 0080fdbf 00000000 00000080 ff03aaaa  .*
+diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
+index 601709c2196..7fe642e5180 100644
+--- a/gas/testsuite/gas/i386/fp.s
++++ b/gas/testsuite/gas/i386/fp.s
+@@ -24,3 +24,8 @@
+ 
+ 	.ds.x 1, -1
+ 	.p2align 4,0xcc
++
++	.tfloat 0x:3ffe80
++	.dc.x 0x:bffd80
++	.dcb.x 1, 0x:03ff80
++	.p2align 4,0xaa
+-- 
+2.33.0
+

_service:tar_scm:0021-x86-introduce-.hfloat-directive.patch Added

@@ -0,0 +1,121 @@
+From 7d19d096292acac01d0fde4d99c3e49d69688e03 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Wed, 11 Aug 2021 08:32:54 +0200
+Subject: PATCH x86: introduce .hfloat directive
+
+This is to be able to generate data passed to {,V}CVTPH2PS and acted
+upon by AVX512-FP16 insns. To be able to also use the hex forms
+supported for other floating point formats, a small addition to the
+generic hex_float() is needed.
+
+Extend existing x86 testcases.
+
+diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
+index 0fa8b0d5a04..a9e36213390 100644
+--- a/gas/config/tc-i386.c
++++ b/gas/config/tc-i386.c
+@@ -512,7 +512,7 @@ const char EXP_CHARS = "eE";
+ /* Chars that mean this number is a floating point constant
+    As in 0f12.456
+    or    0d1.2345e12.  */
+-const char FLT_CHARS = "fFdDxX";
++const char FLT_CHARS = "fFdDxXhH";
+ 
+ /* Tables for lexical analysis.  */
+ static char mnemonic_chars256;
+@@ -1356,6 +1356,7 @@ const pseudo_typeS md_pseudo_table =
+   {"ffloat", float_cons, 'f'},
+   {"dfloat", float_cons, 'd'},
+   {"tfloat", float_cons, 'x'},
++  {"hfloat", float_cons, 'h'},
+   {"value", cons, 2},
+   {"slong", signed_cons, 4},
+   {"noopt", s_ignore, 0},
+diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
+index 9058ad444b0..664237c75c9 100644
+--- a/gas/doc/c-i386.texi
++++ b/gas/doc/c-i386.texi
+@@ -1313,18 +1313,21 @@ data type.  Constructors build these data types into memory.
+ @cindex @code{single} directive, i386
+ @cindex @code{double} directive, i386
+ @cindex @code{tfloat} directive, i386
++@cindex @code{hfloat} directive, i386
+ @cindex @code{float} directive, x86-64
+ @cindex @code{single} directive, x86-64
+ @cindex @code{double} directive, x86-64
+ @cindex @code{tfloat} directive, x86-64
++@cindex @code{hfloat} directive, x86-64
+ @itemize @bullet
+ @item
+ Floating point constructors are @samp{.float} or @samp{.single},
+-@samp{.double}, and @samp{.tfloat} for 32-, 64-, and 80-bit formats.
+-These correspond to instruction mnemonic suffixes @samp{s}, @samp{l},
+-and @samp{t}. @samp{t} stands for 80-bit (ten byte) real.  The 80387
+-only supports this format via the @samp{fldt} (load 80-bit real to stack
+-top) and @samp{fstpt} (store 80-bit real and pop stack) instructions.
++@samp{.double}, @samp{.tfloat}, and @samp{.hfloat} for 32-, 64-, 80-, and
++16-bit formats respectively. The former three correspond to instruction
++mnemonic suffixes @samp{s}, @samp{l}, and @samp{t}. @samp{t} stands for
++80-bit (ten byte) real.  The 80387 only supports this format via the
++@samp{fldt} (load 80-bit real to stack top) and @samp{fstpt} (store 80-bit
++real and pop stack) instructions.
+ 
+ @cindex @code{word} directive, i386
+ @cindex @code{long} directive, i386
+diff --git a/gas/read.c b/gas/read.c
+index b8e845dd569..4170a254030 100644
+--- a/gas/read.c
++++ b/gas/read.c
+@@ -4852,6 +4852,11 @@ hex_float (int float_type, char *bytes)
+ 
+   switch (float_type)
+     {
++    case 'h':
++    case 'H':
++      length = 2;
++      break;
++
+     case 'f':
+     case 'F':
+     case 's':
+diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
+index eefe84db310..d25eed8b8ef 100644
+--- a/gas/testsuite/gas/i386/fp-elf32.d
++++ b/gas/testsuite/gas/i386/fp-elf32.d
+@@ -14,3 +14,4 @@ Contents of section .data:
+  0060 00000000 00000080 fe3f0000 00000000  .*
+  0070 00000080 fdbf0000 00000000 00000080  .*
+  0080 ff030000 aaaaaaaa aaaaaaaa aaaaaaaa  .*
++ 0090 003c00c0 003c5555 55555555 55555555  .*
+diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
+index 0756aa1e36a..bdc8f86662e 100644
+--- a/gas/testsuite/gas/i386/fp-elf64.d
++++ b/gas/testsuite/gas/i386/fp-elf64.d
+@@ -14,3 +14,4 @@ Contents of section .data:
+  0060 00000000 00000080 fe3f0000 00000000  .*
+  0070 00000000 00000080 fdbf0000 00000000  .*
+  0080 00000000 00000080 ff030000 00000000  .*
++ 0090 003c00c0 003c5555 55555555 55555555  .*
+diff --git a/gas/testsuite/gas/i386/fp.d b/gas/testsuite/gas/i386/fp.d
+index b93595ac8c3..65a5fccd6ee 100644
+--- a/gas/testsuite/gas/i386/fp.d
++++ b/gas/testsuite/gas/i386/fp.d
+@@ -12,3 +12,4 @@ Contents of section .data:
+  0050 ffffffff ffffffff ffffcccc cccccccc  .*
+  0060 00000000 00000080 fe3f0000 00000000  .*
+  0070 0080fdbf 00000000 00000080 ff03aaaa  .*
++ 0080 003c00c0 003c5555 55555555 55555555  .*
+diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
+index 7fe642e5180..8976dd82f60 100644
+--- a/gas/testsuite/gas/i386/fp.s
++++ b/gas/testsuite/gas/i386/fp.s
+@@ -29,3 +29,6 @@
+ 	.dc.x 0x:bffd80
+ 	.dcb.x 1, 0x:03ff80
+ 	.p2align 4,0xaa
++
++	.hfloat 1, -2, 0x:3c00
++	.p2align 4,0x55
+-- 
+2.33.0
+

_service:tar_scm:0022-x86-Avoid-abort-on-invalid-broadcast.patch Added

@@ -0,0 +1,103 @@
+From 7e40d574be8b8bc01d3726b90556cff0081e9dd9 Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Thu, 19 Aug 2021 06:38:21 -0700
+Subject: PATCH x86: Avoid abort on invalid broadcast
+
+Print "{bad}" on invalid broadcast instead of abort.
+
+gas/
+
+	PR binutils/28247
+	* testsuite/gas/i386/bad-bcast.d: New file.
+	* testsuite/gas/i386/bad-bcast.s: Likewise.
+	* testsuite/gas/i386/i386.exp: Run bad-bcast.
+
+opcodes/
+
+	PR binutils/28247
+	* i386-dis.c (OP_E_memory): Print "{bad}" on invalid broadcast
+	instead of abort.
+
+diff --git a/gas/testsuite/gas/i386/bad-bcast.d b/gas/testsuite/gas/i386/bad-bcast.d
+new file mode 100644
+index 00000000000..9fc474a42ff
+--- /dev/null
++++ b/gas/testsuite/gas/i386/bad-bcast.d
+@@ -0,0 +1,14 @@
++#objdump: -dw
++#name: Disassemble bad broadcast
++
++.*: +file format .*
++
++
++Disassembly of section .text:
++
++0+ <.text>:
++ +a-f0-9+:	62                   	.byte 0x62
++ +a-f0-9+:	c3                   	ret    
++ +a-f0-9+:	8c 1d 66 90 66 90    	mov    %ds,0x90669066
++ +a-f0-9+:	66 90                	xchg   %ax,%ax
++#pass
+diff --git a/gas/testsuite/gas/i386/bad-bcast.s b/gas/testsuite/gas/i386/bad-bcast.s
+new file mode 100644
+index 00000000000..e09c3aae5de
+--- /dev/null
++++ b/gas/testsuite/gas/i386/bad-bcast.s
+@@ -0,0 +1,2 @@
++	.text
++	.byte 0x62, 0xc3, 0x8c, 0x1d, 0x66, 0x90, 0x66, 0x90, 0x66, 0x90
+diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
+index f5eda2cf331..80959726d0e 100644
+--- a/gas/testsuite/gas/i386/i386.exp
++++ b/gas/testsuite/gas/i386/i386.exp
+@@ -646,6 +646,7 @@ if gas_32_check then {
+ 	run_dump_test "dw2-compress-2"
+ 	run_dump_test "dw2-compressed-2"
+ 
++	run_dump_test "bad-bcast"
+ 	run_dump_test "bad-size"
+ 
+ 	run_dump_test "size-1"
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 2c7027ca6f1..acb5a0faa88 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -11912,7 +11912,7 @@ OP_E_memory (int bytemode, int sizeflag)
+         {
+           if (vex.w)
+             {
+-              abort ();
++	      oappend ("{bad}");
+             }
+           else
+             {
+@@ -11928,7 +11928,7 @@ OP_E_memory (int bytemode, int sizeflag)
+                   oappend ("{1to32}");
+                   break;
+                 default:
+-                  abort ();
++		  oappend ("{bad}");
+                 }
+             }
+         }
+@@ -11948,7 +11948,7 @@ OP_E_memory (int bytemode, int sizeflag)
+ 	      oappend ("{1to8}");
+ 	      break;
+ 	    default:
+-	      abort ();
++	      oappend ("{bad}");
+ 	    }
+ 	}
+       else if (bytemode == x_mode
+@@ -11966,7 +11966,7 @@ OP_E_memory (int bytemode, int sizeflag)
+ 	      oappend ("{1to16}");
+ 	      break;
+ 	    default:
+-	      abort ();
++	      oappend ("{bad}");
+ 	    }
+ 	}
+       else
+-- 
+2.33.0
+

_service:tar_scm:0023-x86-Put-back-3-aborts-in-OP_E_memory.patch Added

@@ -0,0 +1,59 @@
+From ca22cf5ed52c1b4c40dbadf893f558ef09d0c66b Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Thu, 19 Aug 2021 07:39:10 -0700
+Subject: PATCH x86: Put back 3 aborts in OP_E_memory
+
+Put back 3 aborts where invalid lengths should have been filtered out.
+
+gas/
+
+	PR binutils/28247
+	* testsuite/gas/i386/bad-bcast.s: Add a comment.
+
+opcodes/
+
+	PR binutils/28247
+	* * i386-dis.c (OP_E_memory): Put back 3 aborts.
+
+diff --git a/gas/testsuite/gas/i386/bad-bcast.s b/gas/testsuite/gas/i386/bad-bcast.s
+index e09c3aae5de..3e49b2238ed 100644
+--- a/gas/testsuite/gas/i386/bad-bcast.s
++++ b/gas/testsuite/gas/i386/bad-bcast.s
+@@ -1,2 +1,3 @@
+ 	.text
++# Invalid 16-bit broadcast with EVEX.W == 1.
+ 	.byte 0x62, 0xc3, 0x8c, 0x1d, 0x66, 0x90, 0x66, 0x90, 0x66, 0x90
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index acb5a0faa88..aa292233d4d 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -11928,7 +11928,7 @@ OP_E_memory (int bytemode, int sizeflag)
+                   oappend ("{1to32}");
+                   break;
+                 default:
+-		  oappend ("{bad}");
++		  abort ();
+                 }
+             }
+         }
+@@ -11948,7 +11948,7 @@ OP_E_memory (int bytemode, int sizeflag)
+ 	      oappend ("{1to8}");
+ 	      break;
+ 	    default:
+-	      oappend ("{bad}");
++	      abort ();
+ 	    }
+ 	}
+       else if (bytemode == x_mode
+@@ -11966,7 +11966,7 @@ OP_E_memory (int bytemode, int sizeflag)
+ 	      oappend ("{1to16}");
+ 	      break;
+ 	    default:
+-	      oappend ("{bad}");
++	      abort ();
+ 	    }
+ 	}
+       else
+-- 
+2.33.0
+

_service:tar_scm:0024-x86-Print-bad-on-invalid-broadcast-in-OP_E_memory.patch Added

@@ -0,0 +1,279 @@
+From 2c02075a8ec5223bc4cbcc9561eb91e28d46a9e5 Mon Sep 17 00:00:00 2001
+From: "Cui,Lili" <lili.cui@intel.com>
+Date: Tue, 28 Sep 2021 11:13:33 +0800
+Subject: PATCH x86: Print {bad} on invalid broadcast in OP_E_memory
+
+Don't print broadcast for scalar_mode, and print {bad} for invalid broadcast.
+
+gas/
+
+	PR binutils/28381
+	* testsuite/gas/i386/bad-bcast.s: Add a new testcase.
+	* testsuite/gas/i386/bad-bcast.d: Likewise.
+	* testsuite/gas/i386/bad-bcast-intel.d: New.
+
+opcodes/
+
+	PR binutils/28381
+	* i386-dis.c (static struct): Add no_broadcast.
+	(OP_E_memory): Mark invalid broadcast with no_broadcast=1 and Print "{bad}"for it.
+	(intel_operand_size): mark invalid broadcast with no_broadcast=1.
+	(OP_XMM): Mark scalar_mode with no_broadcast=1.
+
+diff --git a/gas/testsuite/gas/i386/bad-bcast-intel.d b/gas/testsuite/gas/i386/bad-bcast-intel.d
+new file mode 100644
+index 00000000000..29de3de299c
+--- /dev/null
++++ b/gas/testsuite/gas/i386/bad-bcast-intel.d
+@@ -0,0 +1,15 @@
++#source: bad-bcast.s
++#objdump: -dw -Mintel
++#name: Disassemble bad broadcast (Intel mode)
++
++.*: +file format .*
++
++Disassembly of section .text:
++
++0+ <.text>:
++ 	*a-f0-9+: 	*62 c3 8c 1d 66\s*$bad$
++ 	*a-f0-9+: 	*90\s*nop
++ 	*a-f0-9+: 	*66 90\s*xchg   ax,ax
++ 	*a-f0-9+: 	*66 90\s*xchg   ax,ax
++ 	*a-f0-9+: 	*62 c1 ff 38 2a 20\s*vcvtsi2sd xmm4,xmm0,\eax\{bad}
++#pass
+diff --git a/gas/testsuite/gas/i386/bad-bcast.d b/gas/testsuite/gas/i386/bad-bcast.d
+index 9fc474a42ff..4f829259994 100644
+--- a/gas/testsuite/gas/i386/bad-bcast.d
++++ b/gas/testsuite/gas/i386/bad-bcast.d
+@@ -7,8 +7,8 @@
+ Disassembly of section .text:
+ 
+ 0+ <.text>:
+- +a-f0-9+:	62                   	.byte 0x62
+- +a-f0-9+:	c3                   	ret    
+- +a-f0-9+:	8c 1d 66 90 66 90    	mov    %ds,0x90669066
+- +a-f0-9+:	66 90                	xchg   %ax,%ax
+-#pass
++ +a-f0-9+:	62 c3 8c 1d 66\s+$bad$
++ +a-f0-9+:	90\s+nop
++ +a-f0-9+:	66 90\s+xchg   %ax,%ax
++ +a-f0-9+:	66 90\s+xchg   %ax,%ax
++ +a-f0-9+:	62 c1 ff 38 2a 20\s+vcvtsi2sd $%eax${bad},%xmm0,%xmm4
+diff --git a/gas/testsuite/gas/i386/bad-bcast.s b/gas/testsuite/gas/i386/bad-bcast.s
+index 3e49b2238ed..6c55dcbbbd8 100644
+--- a/gas/testsuite/gas/i386/bad-bcast.s
++++ b/gas/testsuite/gas/i386/bad-bcast.s
+@@ -1,3 +1,5 @@
+ 	.text
+ # Invalid 16-bit broadcast with EVEX.W == 1.
+ 	.byte 0x62, 0xc3, 0x8c, 0x1d, 0x66, 0x90, 0x66, 0x90, 0x66, 0x90
++# Invalid vcvtsi2sd with EVEX.b == 1.
++	.byte 0x62,0xc1,0xff,0x38,0x2a,0x20
+diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
+index 80959726d0e..680259b1c4e 100644
+--- a/gas/testsuite/gas/i386/i386.exp
++++ b/gas/testsuite/gas/i386/i386.exp
+@@ -646,6 +646,7 @@ if gas_32_check then {
+ 	run_dump_test "dw2-compress-2"
+ 	run_dump_test "dw2-compressed-2"
+ 
++	run_dump_test "bad-bcast-intel"
+ 	run_dump_test "bad-bcast"
+ 	run_dump_test "bad-size"
+ 
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index aa292233d4d..926f776de88 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -2422,6 +2422,7 @@ static struct
+     int zeroing;
+     int ll;
+     int b;
++    int no_broadcast;
+   }
+ vex;
+ static unsigned char need_vex;
+@@ -11059,23 +11060,25 @@ intel_operand_size (int bytemode, int sizeflag)
+ {
+   if (vex.b)
+     {
+-      switch (bytemode)
+-	{
+-	case x_mode:
+-	case evex_half_bcst_xmmq_mode:
+-	  if (vex.w)
+-	    oappend ("QWORD PTR ");
+-	  else
+-	    oappend ("DWORD PTR ");
+-	  break;
+-	case xh_mode:
+-	case evex_half_bcst_xmmqh_mode:
+-	case evex_half_bcst_xmmqdh_mode:
+-	  oappend ("WORD PTR ");
+-	  break;
+-	default:
+-	  abort ();
+-	}
++      if (!vex.no_broadcast)
++	switch (bytemode)
++	  {
++	  case x_mode:
++	  case evex_half_bcst_xmmq_mode:
++	    if (vex.w)
++	      oappend ("QWORD PTR ");
++	    else
++	      oappend ("DWORD PTR ");
++	    break;
++	  case xh_mode:
++	  case evex_half_bcst_xmmqh_mode:
++	  case evex_half_bcst_xmmqdh_mode:
++	    oappend ("WORD PTR ");
++	    break;
++	  default:
++	    vex.no_broadcast = 1;
++	    break;
++	  }
+       return;
+     }
+   switch (bytemode)
+@@ -11908,69 +11911,71 @@ OP_E_memory (int bytemode, int sizeflag)
+   if (vex.b)
+     {
+       evex_used |= EVEX_b_used;
+-      if (bytemode == xh_mode)
+-        {
+-          if (vex.w)
+-            {
+-	      oappend ("{bad}");
+-            }
+-          else
+-            {
+-              switch (vex.length)
+-                {
+-                case 128:
+-                  oappend ("{1to8}");
+-                  break;
+-                case 256:
+-                  oappend ("{1to16}");
+-                  break;
+-                case 512:
+-                  oappend ("{1to32}");
+-                  break;
+-                default:
+-		  abort ();
+-                }
+-            }
+-        }
+-      else if (vex.w
+-	  || bytemode == evex_half_bcst_xmmqdh_mode
+-	  || bytemode == evex_half_bcst_xmmq_mode)
++      if (!vex.no_broadcast)
+ 	{
+-	  switch (vex.length)
++	  if (bytemode == xh_mode)
+ 	    {
+-	    case 128:
+-	      oappend ("{1to2}");
+-	      break;
+-	    case 256:
+-	      oappend ("{1to4}");
+-	      break;
+-	    case 512:
+-	      oappend ("{1to8}");
+-	      break;
+-	    default:
+-	      abort ();
++	      if (vex.w)
++		oappend ("{bad}");
++	      else
++		{
++		  switch (vex.length)
++		    {
++		    case 128:
++		      oappend ("{1to8}");
++		      break;
++		    case 256:
++		      oappend ("{1to16}");
++		      break;
++		    case 512:
++		      oappend ("{1to32}");

_service:tar_scm:0025-x86-Terminate-mnemonicendp-in-swap_operand.patch Added

@@ -0,0 +1,1427 @@
+From 9833dd97678ef5e369ff6a5eb7b508179bc038f7 Mon Sep 17 00:00:00 2001
+From: Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+Date: Fri, 17 Dec 2021 15:26:54 -0800
+Subject: PATCH x86: Terminate mnemonicendp in swap_operand()
+
+Tested on x86_64-pc-linux-gnu.
+
+opcodes/ChangeLog:
+2021-12-17 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+
+	* i386-dis.c (swap_operand): Terminate mnemonicendp.
+
+gas/ChangeLog:
+2021-12-17 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+
+	* testsuite/gas/i386/opts-intel.d: Updated expected disassembly.
+	* testsuite/gas/i386/opts.d: Likewise.
+	* testsuite/gas/i386/sse2avx-opts-intel.d: Likewise.
+	* testsuite/gas/i386/sse2avx-opts.d: Likewise.
+	* testsuite/gas/i386/x86-64-opts-intel.d: Likewise.
+	* testsuite/gas/i386/x86-64-opts.d: Likewise.
+	* testsuite/gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
+	* testsuite/gas/i386/x86-64-sse2avx-opts.d: Likewise.
+
+diff --git a/gas/testsuite/gas/i386/opts-intel.d b/gas/testsuite/gas/i386/opts-intel.d
+index 4c546eeda31..4172e93c39e 100644
+--- a/gas/testsuite/gas/i386/opts-intel.d
++++ b/gas/testsuite/gas/i386/opts-intel.d
+@@ -9,113 +9,113 @@ Disassembly of section .text:
+ 
+ 0+ <_start>:
+  	*a-f0-9+:	00 d1                	add    cl,dl
+- 	*a-f0-9+:	02 ca                	add.s cl,dl
++ 	*a-f0-9+:	02 ca                	add.s  cl,dl
+  	*a-f0-9+:	66 01 d1             	add    cx,dx
+- 	*a-f0-9+:	66 03 ca             	add.s cx,dx
++ 	*a-f0-9+:	66 03 ca             	add.s  cx,dx
+  	*a-f0-9+:	01 d1                	add    ecx,edx
+- 	*a-f0-9+:	03 ca                	add.s ecx,edx
++ 	*a-f0-9+:	03 ca                	add.s  ecx,edx
+  	*a-f0-9+:	00 d1                	add    cl,dl
+- 	*a-f0-9+:	02 ca                	add.s cl,dl
++ 	*a-f0-9+:	02 ca                	add.s  cl,dl
+  	*a-f0-9+:	66 01 d1             	add    cx,dx
+- 	*a-f0-9+:	66 03 ca             	add.s cx,dx
++ 	*a-f0-9+:	66 03 ca             	add.s  cx,dx
+  	*a-f0-9+:	01 d1                	add    ecx,edx
+- 	*a-f0-9+:	03 ca                	add.s ecx,edx
++ 	*a-f0-9+:	03 ca                	add.s  ecx,edx
+  	*a-f0-9+:	10 d1                	adc    cl,dl
+- 	*a-f0-9+:	12 ca                	adc.s cl,dl
++ 	*a-f0-9+:	12 ca                	adc.s  cl,dl
+  	*a-f0-9+:	66 11 d1             	adc    cx,dx
+- 	*a-f0-9+:	66 13 ca             	adc.s cx,dx
++ 	*a-f0-9+:	66 13 ca             	adc.s  cx,dx
+  	*a-f0-9+:	11 d1                	adc    ecx,edx
+- 	*a-f0-9+:	13 ca                	adc.s ecx,edx
++ 	*a-f0-9+:	13 ca                	adc.s  ecx,edx
+  	*a-f0-9+:	10 d1                	adc    cl,dl
+- 	*a-f0-9+:	12 ca                	adc.s cl,dl
++ 	*a-f0-9+:	12 ca                	adc.s  cl,dl
+  	*a-f0-9+:	66 11 d1             	adc    cx,dx
+- 	*a-f0-9+:	66 13 ca             	adc.s cx,dx
++ 	*a-f0-9+:	66 13 ca             	adc.s  cx,dx
+  	*a-f0-9+:	11 d1                	adc    ecx,edx
+- 	*a-f0-9+:	13 ca                	adc.s ecx,edx
++ 	*a-f0-9+:	13 ca                	adc.s  ecx,edx
+  	*a-f0-9+:	20 d1                	and    cl,dl
+- 	*a-f0-9+:	22 ca                	and.s cl,dl
++ 	*a-f0-9+:	22 ca                	and.s  cl,dl
+  	*a-f0-9+:	66 21 d1             	and    cx,dx
+- 	*a-f0-9+:	66 23 ca             	and.s cx,dx
++ 	*a-f0-9+:	66 23 ca             	and.s  cx,dx
+  	*a-f0-9+:	21 d1                	and    ecx,edx
+- 	*a-f0-9+:	23 ca                	and.s ecx,edx
++ 	*a-f0-9+:	23 ca                	and.s  ecx,edx
+  	*a-f0-9+:	20 d1                	and    cl,dl
+- 	*a-f0-9+:	22 ca                	and.s cl,dl
++ 	*a-f0-9+:	22 ca                	and.s  cl,dl
+  	*a-f0-9+:	66 21 d1             	and    cx,dx
+- 	*a-f0-9+:	66 23 ca             	and.s cx,dx
++ 	*a-f0-9+:	66 23 ca             	and.s  cx,dx
+  	*a-f0-9+:	21 d1                	and    ecx,edx
+- 	*a-f0-9+:	23 ca                	and.s ecx,edx
++ 	*a-f0-9+:	23 ca                	and.s  ecx,edx
+  	*a-f0-9+:	38 d1                	cmp    cl,dl
+- 	*a-f0-9+:	3a ca                	cmp.s cl,dl
++ 	*a-f0-9+:	3a ca                	cmp.s  cl,dl
+  	*a-f0-9+:	66 39 d1             	cmp    cx,dx
+- 	*a-f0-9+:	66 3b ca             	cmp.s cx,dx
++ 	*a-f0-9+:	66 3b ca             	cmp.s  cx,dx
+  	*a-f0-9+:	39 d1                	cmp    ecx,edx
+- 	*a-f0-9+:	3b ca                	cmp.s ecx,edx
++ 	*a-f0-9+:	3b ca                	cmp.s  ecx,edx
+  	*a-f0-9+:	38 d1                	cmp    cl,dl
+- 	*a-f0-9+:	3a ca                	cmp.s cl,dl
++ 	*a-f0-9+:	3a ca                	cmp.s  cl,dl
+  	*a-f0-9+:	66 39 d1             	cmp    cx,dx
+- 	*a-f0-9+:	66 3b ca             	cmp.s cx,dx
++ 	*a-f0-9+:	66 3b ca             	cmp.s  cx,dx
+  	*a-f0-9+:	39 d1                	cmp    ecx,edx
+- 	*a-f0-9+:	3b ca                	cmp.s ecx,edx
++ 	*a-f0-9+:	3b ca                	cmp.s  ecx,edx
+  	*a-f0-9+:	88 d1                	mov    cl,dl
+- 	*a-f0-9+:	8a ca                	mov.s cl,dl
++ 	*a-f0-9+:	8a ca                	mov.s  cl,dl
+  	*a-f0-9+:	66 89 d1             	mov    cx,dx
+- 	*a-f0-9+:	66 8b ca             	mov.s cx,dx
++ 	*a-f0-9+:	66 8b ca             	mov.s  cx,dx
+  	*a-f0-9+:	89 d1                	mov    ecx,edx
+- 	*a-f0-9+:	8b ca                	mov.s ecx,edx
++ 	*a-f0-9+:	8b ca                	mov.s  ecx,edx
+  	*a-f0-9+:	88 d1                	mov    cl,dl
+- 	*a-f0-9+:	8a ca                	mov.s cl,dl
++ 	*a-f0-9+:	8a ca                	mov.s  cl,dl
+  	*a-f0-9+:	66 89 d1             	mov    cx,dx
+- 	*a-f0-9+:	66 8b ca             	mov.s cx,dx
++ 	*a-f0-9+:	66 8b ca             	mov.s  cx,dx
+  	*a-f0-9+:	89 d1                	mov    ecx,edx
+- 	*a-f0-9+:	8b ca                	mov.s ecx,edx
++ 	*a-f0-9+:	8b ca                	mov.s  ecx,edx
+  	*a-f0-9+:	08 d1                	or     cl,dl
+- 	*a-f0-9+:	0a ca                	or.s cl,dl
++ 	*a-f0-9+:	0a ca                	or.s   cl,dl
+  	*a-f0-9+:	66 09 d1             	or     cx,dx
+- 	*a-f0-9+:	66 0b ca             	or.s cx,dx
++ 	*a-f0-9+:	66 0b ca             	or.s   cx,dx
+  	*a-f0-9+:	09 d1                	or     ecx,edx
+- 	*a-f0-9+:	0b ca                	or.s ecx,edx
++ 	*a-f0-9+:	0b ca                	or.s   ecx,edx
+  	*a-f0-9+:	08 d1                	or     cl,dl
+- 	*a-f0-9+:	0a ca                	or.s cl,dl
++ 	*a-f0-9+:	0a ca                	or.s   cl,dl
+  	*a-f0-9+:	66 09 d1             	or     cx,dx
+- 	*a-f0-9+:	66 0b ca             	or.s cx,dx
++ 	*a-f0-9+:	66 0b ca             	or.s   cx,dx
+  	*a-f0-9+:	09 d1                	or     ecx,edx
+- 	*a-f0-9+:	0b ca                	or.s ecx,edx
++ 	*a-f0-9+:	0b ca                	or.s   ecx,edx
+  	*a-f0-9+:	18 d1                	sbb    cl,dl
+- 	*a-f0-9+:	1a ca                	sbb.s cl,dl
++ 	*a-f0-9+:	1a ca                	sbb.s  cl,dl
+  	*a-f0-9+:	66 19 d1             	sbb    cx,dx
+- 	*a-f0-9+:	66 1b ca             	sbb.s cx,dx
++ 	*a-f0-9+:	66 1b ca             	sbb.s  cx,dx
+  	*a-f0-9+:	19 d1                	sbb    ecx,edx
+- 	*a-f0-9+:	1b ca                	sbb.s ecx,edx
++ 	*a-f0-9+:	1b ca                	sbb.s  ecx,edx
+  	*a-f0-9+:	18 d1                	sbb    cl,dl
+- 	*a-f0-9+:	1a ca                	sbb.s cl,dl
++ 	*a-f0-9+:	1a ca                	sbb.s  cl,dl
+  	*a-f0-9+:	66 19 d1             	sbb    cx,dx
+- 	*a-f0-9+:	66 1b ca             	sbb.s cx,dx
++ 	*a-f0-9+:	66 1b ca             	sbb.s  cx,dx
+  	*a-f0-9+:	19 d1                	sbb    ecx,edx
+- 	*a-f0-9+:	1b ca                	sbb.s ecx,edx
++ 	*a-f0-9+:	1b ca                	sbb.s  ecx,edx
+  	*a-f0-9+:	28 d1                	sub    cl,dl
+- 	*a-f0-9+:	2a ca                	sub.s cl,dl
++ 	*a-f0-9+:	2a ca                	sub.s  cl,dl
+  	*a-f0-9+:	66 29 d1             	sub    cx,dx
+- 	*a-f0-9+:	66 2b ca             	sub.s cx,dx
++ 	*a-f0-9+:	66 2b ca             	sub.s  cx,dx
+  	*a-f0-9+:	29 d1                	sub    ecx,edx
+- 	*a-f0-9+:	2b ca                	sub.s ecx,edx
++ 	*a-f0-9+:	2b ca                	sub.s  ecx,edx
+  	*a-f0-9+:	28 d1                	sub    cl,dl
+- 	*a-f0-9+:	2a ca                	sub.s cl,dl
++ 	*a-f0-9+:	2a ca                	sub.s  cl,dl
+  	*a-f0-9+:	66 29 d1             	sub    cx,dx
+- 	*a-f0-9+:	66 2b ca             	sub.s cx,dx
++ 	*a-f0-9+:	66 2b ca             	sub.s  cx,dx
+  	*a-f0-9+:	29 d1                	sub    ecx,edx
+- 	*a-f0-9+:	2b ca                	sub.s ecx,edx
++ 	*a-f0-9+:	2b ca                	sub.s  ecx,edx
+  	*a-f0-9+:	30 d1                	xor    cl,dl
+- 	*a-f0-9+:	32 ca                	xor.s cl,dl
++ 	*a-f0-9+:	32 ca                	xor.s  cl,dl
+  	*a-f0-9+:	66 31 d1             	xor    cx,dx
+- 	*a-f0-9+:	66 33 ca             	xor.s cx,dx
++ 	*a-f0-9+:	66 33 ca             	xor.s  cx,dx
+  	*a-f0-9+:	31 d1                	xor    ecx,edx
+- 	*a-f0-9+:	33 ca                	xor.s ecx,edx
++ 	*a-f0-9+:	33 ca                	xor.s  ecx,edx
+  	*a-f0-9+:	30 d1                	xor    cl,dl
+- 	*a-f0-9+:	32 ca                	xor.s cl,dl
++ 	*a-f0-9+:	32 ca                	xor.s  cl,dl
+  	*a-f0-9+:	66 31 d1             	xor    cx,dx
+- 	*a-f0-9+:	66 33 ca             	xor.s cx,dx
++ 	*a-f0-9+:	66 33 ca             	xor.s  cx,dx
+  	*a-f0-9+:	31 d1                	xor    ecx,edx
+- 	*a-f0-9+:	33 ca                	xor.s ecx,edx
++ 	*a-f0-9+:	33 ca                	xor.s  ecx,edx
+  	*a-f0-9+:	c5 fd 28 f4          	vmovapd ymm6,ymm4
+  	*a-f0-9+:	c5 fd 29 e6          	vmovapd.s ymm6,ymm4
+  	*a-f0-9+:	c5 fc 28 f4          	vmovaps ymm6,ymm4
+@@ -169,59 +169,59 @@ Disassembly of section .text:
+  	*a-f0-9+:	66 0f 1a d1          	bndmov bnd2,bnd1
+  	*a-f0-9+:	66 0f 1b ca          	bndmov.s bnd2,bnd1

_service:tar_scm:0026-opcodes-Make-i386-dis.c-thread-safe.patch Added

@@ -0,0 +1,6257 @@
+From 39fb369834a39e80d9bee9c55f029c543a7d797c Mon Sep 17 00:00:00 2001
+From: Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
+Date: Tue, 4 Jan 2022 23:07:26 -0800
+Subject: PATCH opcodes: Make i386-dis.c thread-safe
+
+Improve thread safety in print_insn_i386_att, print_insn_i386_intel and
+print_insn_i386 by removing the use of static variables.
+
+Tested on x86_64-pc-linux-gnu.
+
+2022-01-04 Vladimir Mezentsev  <vladimir.mezentsev@oracle.com>
+
+	* i386-dis.c: Make print_insn_i386_att, print_insn_i386_intel
+	and print_insn_i386 thread-safe
+
+diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
+index 08eb810d5df..4e0e1559339 100644
+--- a/opcodes/i386-dis.c
++++ b/opcodes/i386-dis.c
+@@ -40,81 +40,82 @@
+ #include "safe-ctype.h"
+ 
+ #include <setjmp.h>
+-
+-static int print_insn (bfd_vma, disassemble_info *);
+-static void dofloat (int);
+-static void OP_ST (int, int);
+-static void OP_STi (int, int);
+-static int putop (const char *, int);
+-static void oappend (const char *);
+-static void append_seg (void);
+-static void OP_indirE (int, int);
+-static void print_operand_value (char *, int, bfd_vma);
+-static void OP_E_memory (int, int);
+-static void print_displacement (char *, bfd_vma);
+-static void OP_E (int, int);
+-static void OP_G (int, int);
+-static bfd_vma get64 (void);
+-static bfd_signed_vma get32 (void);
+-static bfd_signed_vma get32s (void);
+-static int get16 (void);
+-static void set_op (bfd_vma, int);
+-static void OP_Skip_MODRM (int, int);
+-static void OP_REG (int, int);
+-static void OP_IMREG (int, int);
+-static void OP_I (int, int);
+-static void OP_I64 (int, int);
+-static void OP_sI (int, int);
+-static void OP_J (int, int);
+-static void OP_SEG (int, int);
+-static void OP_DIR (int, int);
+-static void OP_OFF (int, int);
+-static void OP_OFF64 (int, int);
+-static void ptr_reg (int, int);
+-static void OP_ESreg (int, int);
+-static void OP_DSreg (int, int);
+-static void OP_C (int, int);
+-static void OP_D (int, int);
+-static void OP_T (int, int);
+-static void OP_MMX (int, int);
+-static void OP_XMM (int, int);
+-static void OP_EM (int, int);
+-static void OP_EX (int, int);
+-static void OP_EMC (int,int);
+-static void OP_MXC (int,int);
+-static void OP_MS (int, int);
+-static void OP_XS (int, int);
+-static void OP_M (int, int);
+-static void OP_VEX (int, int);
+-static void OP_VexR (int, int);
+-static void OP_VexW (int, int);
+-static void OP_Rounding (int, int);
+-static void OP_REG_VexI4 (int, int);
+-static void OP_VexI4 (int, int);
+-static void PCLMUL_Fixup (int, int);
+-static void VPCMP_Fixup (int, int);
+-static void VPCOM_Fixup (int, int);
+-static void OP_0f07 (int, int);
+-static void OP_Monitor (int, int);
+-static void OP_Mwait (int, int);
+-static void NOP_Fixup1 (int, int);
+-static void NOP_Fixup2 (int, int);
+-static void OP_3DNowSuffix (int, int);
+-static void CMP_Fixup (int, int);
+-static void BadOp (void);
+-static void REP_Fixup (int, int);
+-static void SEP_Fixup (int, int);
+-static void BND_Fixup (int, int);
+-static void NOTRACK_Fixup (int, int);
+-static void HLE_Fixup1 (int, int);
+-static void HLE_Fixup2 (int, int);
+-static void HLE_Fixup3 (int, int);
+-static void CMPXCHG8B_Fixup (int, int);
+-static void XMM_Fixup (int, int);
+-static void FXSAVE_Fixup (int, int);
+-
+-static void MOVSXD_Fixup (int, int);
+-static void DistinctDest_Fixup (int, int);
++typedef struct instr_info instr_info;
++
++static int print_insn (bfd_vma, instr_info *);
++static void dofloat (instr_info *, int);
++static void OP_ST (instr_info *, int, int);
++static void OP_STi (instr_info *, int, int);
++static int putop (instr_info *, const char *, int);
++static void oappend (instr_info *, const char *);
++static void append_seg (instr_info *);
++static void OP_indirE (instr_info *, int, int);
++static void print_operand_value (instr_info *, char *, int, bfd_vma);
++static void OP_E_memory (instr_info *, int, int);
++static void print_displacement (instr_info *, char *, bfd_vma);
++static void OP_E (instr_info *, int, int);
++static void OP_G (instr_info *, int, int);
++static bfd_vma get64 (instr_info *);
++static bfd_signed_vma get32 (instr_info *);
++static bfd_signed_vma get32s (instr_info *);
++static int get16 (instr_info *);
++static void set_op (instr_info *, bfd_vma, int);
++static void OP_Skip_MODRM (instr_info *, int, int);
++static void OP_REG (instr_info *, int, int);
++static void OP_IMREG (instr_info *, int, int);
++static void OP_I (instr_info *, int, int);
++static void OP_I64 (instr_info *, int, int);
++static void OP_sI (instr_info *, int, int);
++static void OP_J (instr_info *, int, int);
++static void OP_SEG (instr_info *, int, int);
++static void OP_DIR (instr_info *, int, int);
++static void OP_OFF (instr_info *, int, int);
++static void OP_OFF64 (instr_info *, int, int);
++static void ptr_reg (instr_info *, int, int);
++static void OP_ESreg (instr_info *, int, int);
++static void OP_DSreg (instr_info *, int, int);
++static void OP_C (instr_info *, int, int);
++static void OP_D (instr_info *, int, int);
++static void OP_T (instr_info *, int, int);
++static void OP_MMX (instr_info *, int, int);
++static void OP_XMM (instr_info *, int, int);
++static void OP_EM (instr_info *, int, int);
++static void OP_EX (instr_info *, int, int);
++static void OP_EMC (instr_info *, int,int);
++static void OP_MXC (instr_info *, int,int);
++static void OP_MS (instr_info *, int, int);
++static void OP_XS (instr_info *, int, int);
++static void OP_M (instr_info *, int, int);
++static void OP_VEX (instr_info *, int, int);
++static void OP_VexR (instr_info *, int, int);
++static void OP_VexW (instr_info *, int, int);
++static void OP_Rounding (instr_info *, int, int);
++static void OP_REG_VexI4 (instr_info *, int, int);
++static void OP_VexI4 (instr_info *, int, int);
++static void PCLMUL_Fixup (instr_info *, int, int);
++static void VPCMP_Fixup (instr_info *, int, int);
++static void VPCOM_Fixup (instr_info *, int, int);
++static void OP_0f07 (instr_info *, int, int);
++static void OP_Monitor (instr_info *, int, int);
++static void OP_Mwait (instr_info *, int, int);
++static void NOP_Fixup1 (instr_info *, int, int);
++static void NOP_Fixup2 (instr_info *, int, int);
++static void OP_3DNowSuffix (instr_info *, int, int);
++static void CMP_Fixup (instr_info *, int, int);
++static void BadOp (instr_info *);
++static void REP_Fixup (instr_info *, int, int);
++static void SEP_Fixup (instr_info *, int, int);
++static void BND_Fixup (instr_info *, int, int);
++static void NOTRACK_Fixup (instr_info *, int, int);
++static void HLE_Fixup1 (instr_info *, int, int);
++static void HLE_Fixup2 (instr_info *, int, int);
++static void HLE_Fixup3 (instr_info *, int, int);
++static void CMPXCHG8B_Fixup (instr_info *, int, int);
++static void XMM_Fixup (instr_info *, int, int);
++static void FXSAVE_Fixup (instr_info *, int, int);
++
++static void MOVSXD_Fixup (instr_info *, int, int);
++static void DistinctDest_Fixup (instr_info *, int, int);
+ 
+ struct dis_private {
+   /* Points to first byte not fetched.  */
+@@ -132,15 +133,137 @@ enum address_mode
+   mode_64bit
+ };
+ 
+-enum address_mode address_mode;
++enum x86_64_isa
++{
++  amd64 = 1,
++  intel64
++};
++
++struct instr_info
++{
++  enum address_mode address_mode;
++
++  /* Flags for the prefixes for the current instruction.  See below.  */
++  int prefixes;
++
++  /* REX prefix the current instruction.  See below.  */
++  int rex;
++  /* Bits of REX we've already used.  */
++  int rex_used;

_service:tar_scm:0027-x86-reduce-AVX512-FP16-set-of-insns-decoded-through-.patch Added

@@ -0,0 +1,423 @@
+From 2235ecb8afebeb56baf29eb98de34cfa1b95f697 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Fri, 14 Jan 2022 10:54:21 +0100
+Subject: PATCH x86: reduce AVX512-FP16 set of insns decoded through
+ vex_w_table
+
+Like already indicated during review of the original submission, there's
+really only very few insns where going through this table is easier /
+cheaper than using suitable macros. Utilize %XH more and introduce
+similar %XS and %XD (which subsequently can be used for further table
+size reduction).
+
+While there also switch to using oappend() in 'XH' macro processing.
+
+diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
+index 9c8156ac11e..64a43ce02a1 100644
+--- a/opcodes/i386-dis-evex-prefix.h
++++ b/opcodes/i386-dis-evex-prefix.h
+@@ -375,17 +375,17 @@
+     { "vfmsub213s%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
+     { "v4fnmaddss",	{ XMScalar, VexScalar, Mxmm }, 0 },
+   },
+-  /* PREFIX_EVEX_0F3A08_W_0 */
++  /* PREFIX_EVEX_0F3A08 */
+   {
+-    { "vrndscaleph",    { XM, EXxh, EXxEVexS, Ib }, 0 },
++    { "vrndscalep%XH",  { XM, EXxh, EXxEVexS, Ib }, 0 },
+     { Bad_Opcode },
+-    { "vrndscaleps",    { XM, EXx, EXxEVexS, Ib }, 0 },
++    { "vrndscalep%XS",  { XM, EXx, EXxEVexS, Ib }, 0 },
+   },
+-  /* PREFIX_EVEX_0F3A0A_W_0 */
++  /* PREFIX_EVEX_0F3A0A */
+   {
+-    { "vrndscalesh",    { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
++    { "vrndscales%XH",  { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
+     { Bad_Opcode },
+-    { "vrndscaless",    { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 },
++    { "vrndscales%XS",  { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 },
+   },
+   /* PREFIX_EVEX_0F3A26 */
+   {
+@@ -482,27 +482,18 @@
+     { "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
+     { "vmuls%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+   },
+-  /* PREFIX_EVEX_MAP5_5A_W_0 */
++  /* PREFIX_EVEX_MAP5_5A */
+   {
+-    { "vcvtph2pd",      { XM, EXxmmqdh, EXxEVexS }, 0 },
+-    { "vcvtsh2sd",      { XMM, VexScalar, EXw, EXxEVexS }, 0 },
++    { "vcvtp%XH2pd",    { XM, EXxmmqdh, EXxEVexS }, 0 },
++    { "vcvts%XH2sd",    { XMM, VexScalar, EXw, EXxEVexS }, 0 },
++    { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
++    { "vcvts%XD2sh",    { XMM, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+-  /* PREFIX_EVEX_MAP5_5A_W_1 */
++  /* PREFIX_EVEX_MAP5_5B */
+   {
+-    { Bad_Opcode },
+-    { Bad_Opcode },
+-    { "vcvtpd2ph%XZ",   { XMM, EXx, EXxEVexR }, 0 },
+-    { "vcvtsd2sh",      { XMM, VexScalar, EXq, EXxEVexR }, 0 },
+-  },
+-  /* PREFIX_EVEX_MAP5_5B_W_0 */
+-  {
+-    { "vcvtdq2ph%XY",   { XMxmmq, EXx, EXxEVexR }, 0 },
+-    { "vcvttph2dq",     { XM, EXxmmqh, EXxEVexS }, 0 },
+-    { "vcvtph2dq",      { XM, EXxmmqh, EXxEVexR }, 0 },
+-  },
+-  /* PREFIX_EVEX_MAP5_5B_W_1 */
+-  {
+-    { "vcvtqq2ph%XZ",   { XMM, EXx, EXxEVexR }, 0 },
++    { VEX_W_TABLE (EVEX_W_MAP5_5B_P_0) },
++    { "vcvttp%XH2dq",   { XM, EXxmmqh, EXxEVexS }, 0 },
++    { "vcvtp%XH2dq",    { XM, EXxmmqh, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_5C */
+   {
+@@ -526,47 +517,47 @@
+   },
+   /* PREFIX_EVEX_MAP5_78 */
+   {
+-    { VEX_W_TABLE (EVEX_W_MAP5_78_P_0) },
++    { "vcvttp%XH2udq",  { XM, EXxmmqh, EXxEVexS }, 0 },
+     { "vcvttsh2usi",    { Gdq, EXw, EXxEVexS }, 0 },
+-    { VEX_W_TABLE (EVEX_W_MAP5_78_P_2) },
++    { "vcvttp%XH2uqq",  { XM, EXxmmqdh, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_79 */
+   {
+-    { VEX_W_TABLE (EVEX_W_MAP5_79_P_0) },
++    { "vcvtp%XH2udq",   { XM, EXxmmqh, EXxEVexR }, 0 },
+     { "vcvtsh2usi",     { Gdq, EXw, EXxEVexR }, 0 },
+-    { VEX_W_TABLE (EVEX_W_MAP5_79_P_2) },
++    { "vcvtp%XH2uqq",   { XM, EXxmmqdh, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_7A */
+   {
+     { Bad_Opcode },
+     { Bad_Opcode },
+-    { VEX_W_TABLE (EVEX_W_MAP5_7A_P_2) },
++    { "vcvttp%XH2qq",   { XM, EXxmmqdh, EXxEVexS }, 0 },
+     { VEX_W_TABLE (EVEX_W_MAP5_7A_P_3) },
+   },
+   /* PREFIX_EVEX_MAP5_7B */
+   {
+     { Bad_Opcode },
+     { "vcvtusi2sh{%LQ|}",       { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
+-    { VEX_W_TABLE (EVEX_W_MAP5_7B_P_2) },
++    { "vcvtp%XH2qq",    { XM, EXxmmqdh, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_7C */
+   {
+-    { VEX_W_TABLE (EVEX_W_MAP5_7C_P_0) },
++    { "vcvttp%XH2uw",   { XM, EXxh, EXxEVexS }, 0 },
+     { Bad_Opcode },
+-    { VEX_W_TABLE (EVEX_W_MAP5_7C_P_2) },
++    { "vcvttp%XH2w",    { XM, EXxh, EXxEVexS }, 0 },
+   },
+-  /* PREFIX_EVEX_MAP5_7D_W_0 */
++  /* PREFIX_EVEX_MAP5_7D */
+   {
+-    { "vcvtph2uw",      { XM, EXxh, EXxEVexR }, 0 },
+-    { "vcvtw2ph",       { XM, EXxh, EXxEVexR }, 0 },
+-    { "vcvtph2w",       { XM, EXxh, EXxEVexR }, 0 },
+-    { "vcvtuw2ph",      { XM, EXxh, EXxEVexR }, 0 },
++    { "vcvtp%XH2uw",    { XM, EXxh, EXxEVexR }, 0 },
++    { "vcvtw2p%XH",     { XM, EXxh, EXxEVexR }, 0 },
++    { "vcvtp%XH2w",     { XM, EXxh, EXxEVexR }, 0 },
++    { "vcvtuw2p%XH",    { XM, EXxh, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP6_13 */
+   {
+-    { VEX_W_TABLE (EVEX_W_MAP6_13_P_0) },
++    { "vcvts%XH2ss",	{ XMM, VexScalar, EXw, EXxEVexS }, 0 },
+     { Bad_Opcode },
+-    { VEX_W_TABLE (EVEX_W_MAP6_13_P_2) },
++    { "vcvtp%XH2psx",	{ XM, EXxmmqh, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_MAP6_56 */
+   {
+diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
+index 62c3d3b9afb..fc0a0791d1d 100644
+--- a/opcodes/i386-dis-evex-w.h
++++ b/opcodes/i386-dis-evex-w.h
+@@ -550,19 +550,11 @@
+     { Bad_Opcode },
+     { "vpermilpd",	{ XM, EXx, Ib }, PREFIX_DATA },
+   },
+-  /* EVEX_W_0F3A08 */
+-  {
+-    { PREFIX_TABLE (PREFIX_EVEX_0F3A08_W_0) },
+-  },
+   /* EVEX_W_0F3A09 */
+   {
+     { Bad_Opcode },
+     { "vrndscalepd",	{ XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+   },
+-  /* EVEX_W_0F3A0A */
+-  {
+-    { PREFIX_TABLE (PREFIX_EVEX_0F3A0A_W_0) },
+-  },
+   /* EVEX_W_0F3A0B */
+   {
+     { Bad_Opcode },
+@@ -636,62 +628,13 @@
+     { Bad_Opcode },
+     { "vpshrdw",   { XM, Vex, EXx, Ib }, 0 },
+   },
+-  /* EVEX_W_MAP5_5A */
+-  {
+-    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5A_W_0) },
+-    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5A_W_1) },
+-  },
+-  /* EVEX_W_MAP5_5B */
+-  {
+-    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5B_W_0) },
+-    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5B_W_1) },
+-  },
+-  /* EVEX_W_MAP5_78_P_0 */
+-  {
+-    { "vcvttph2udq",	{ XM, EXxmmqh, EXxEVexS }, 0 },
+-  },
+-  /* EVEX_W_MAP5_78_P_2 */
+-  {
+-    { "vcvttph2uqq",	{ XM, EXxmmqdh, EXxEVexS }, 0 },
+-  },
+-  /* EVEX_W_MAP5_79_P_0 */
+-  {
+-    { "vcvtph2udq",	{ XM, EXxmmqh, EXxEVexR }, 0 },
+-  },
+-  /* EVEX_W_MAP5_79_P_2 */
++  /* EVEX_W_MAP5_5B_P_0 */
+   {
+-    { "vcvtph2uqq",	{ XM, EXxmmqdh, EXxEVexR }, 0 },
+-  },
+-  /* EVEX_W_MAP5_7A_P_2 */
+-  {

_service:tar_scm:0028-x86-reduce-AVX512-FP-set-of-insns-decoded-through-ve.patch Added

@@ -0,0 +1,600 @@
+From 740a1e791175987e28cc39dbd11e3fc152ffc40b Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Fri, 14 Jan 2022 10:54:55 +0100
+Subject: PATCH x86: reduce AVX512 FP set of insns decoded through
+ vex_w_table
+
+Like for AVX512-FP16, there's not that many FP insns where going through
+this table is easier / cheaper than using suitable macros. Utilize %XS
+and %XD more to eliminate a fair number of table entries.
+
+While doing this I noticed a few anomalies. Where lines get touched /
+moved anyway, these are being addressed right here:
+- vmovshdup used EXx for its 2nd operand, thus displaying seemingly
+  valid broadcast when EVEX.b is set with a memory operand; use
+  EXEvexXNoBcst instead just like vmovsldup already does
+- vmovlhps used EXx for its 3rd operand, when all sibling entries use
+  EXq; switch to EXq there for consistency (the two differ only for
+  memory operands)
+
+diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
+index 7a372ce8c0b..2d35bf2a589 100644
+--- a/opcodes/i386-dis-evex-mod.h
++++ b/opcodes/i386-dis-evex-mod.h
+@@ -1,7 +1,7 @@
+   {
+     /* MOD_EVEX_0F12_PREFIX_0 */
+     { "vmovlpX",	{ XMM, Vex, EXq }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) },
++    { "vmovhlp%XS",	{ XMM, Vex, EXq }, 0 },
+   },
+   {
+     /* MOD_EVEX_0F12_PREFIX_2 */
+@@ -14,7 +14,7 @@
+   {
+     /* MOD_EVEX_0F16_PREFIX_0 */
+     { "vmovhpX",	{ XMM, Vex, EXq }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) },
++    { "vmovlhp%XS",	{ XMM, Vex, EXq }, 0 },
+   },
+   {
+     /* MOD_EVEX_0F16_PREFIX_2 */
+diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
+index 64a43ce02a1..fc5439a1fec 100644
+--- a/opcodes/i386-dis-evex-prefix.h
++++ b/opcodes/i386-dis-evex-prefix.h
+@@ -1,28 +1,28 @@
+   /* PREFIX_EVEX_0F10 */
+   {
+     { "vmovupX",	{ XM, EXEvexXNoBcst }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F10_P_1) },
++    { "vmovs%XS",	{ XMScalar, VexScalarR, EXd }, 0 },
+     { "vmovupX",	{ XM, EXEvexXNoBcst }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F10_P_3) },
++    { "vmovs%XD",	{ XMScalar, VexScalarR, EXq }, 0 },
+   },
+   /* PREFIX_EVEX_0F11 */
+   {
+     { "vmovupX",	{ EXxS, XM }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F11_P_1) },
++    { "vmovs%XS",	{ EXdS, VexScalarR, XMScalar }, 0 },
+     { "vmovupX",	{ EXxS, XM }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F11_P_3) },
++    { "vmovs%XD",	{ EXqS, VexScalarR, XMScalar }, 0 },
+   },
+   /* PREFIX_EVEX_0F12 */
+   {
+     { MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) },
+-    { VEX_W_TABLE (EVEX_W_0F12_P_1) },
++    { "vmov%XSldup", { XM, EXEvexXNoBcst }, 0 },
+     { MOD_TABLE (MOD_EVEX_0F12_PREFIX_2) },
+-    { VEX_W_TABLE (EVEX_W_0F12_P_3) },
++    { "vmov%XDdup",	{ XM, EXymmq }, 0 },
+   },
+   /* PREFIX_EVEX_0F16 */
+   {
+     { MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) },
+-    { VEX_W_TABLE (EVEX_W_0F16_P_1) },
++    { "vmov%XShdup", { XM, EXEvexXNoBcst }, 0 },
+     { MOD_TABLE (MOD_EVEX_0F16_PREFIX_2) },
+   },
+   /* PREFIX_EVEX_0F2A */
+@@ -35,64 +35,64 @@
+   /* PREFIX_EVEX_0F51 */
+   {
+     { "vsqrtpX",	{ XM, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F51_P_1) },
++    { "vsqrts%XS",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+     { "vsqrtpX",	{ XM, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F51_P_3) },
++    { "vsqrts%XD",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F58 */
+   {
+     { "vaddpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F58_P_1) },
++    { "vadds%XS",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+     { "vaddpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F58_P_3) },
++    { "vadds%XD",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F59 */
+   {
+     { "vmulpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F59_P_1) },
++    { "vmuls%XS",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+     { "vmulpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F59_P_3) },
++    { "vmuls%XD",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F5A */
+   {
+-    { VEX_W_TABLE (EVEX_W_0F5A_P_0) },
+-    { VEX_W_TABLE (EVEX_W_0F5A_P_1) },
+-    { VEX_W_TABLE (EVEX_W_0F5A_P_2) },
+-    { VEX_W_TABLE (EVEX_W_0F5A_P_3) },
++    { "vcvtp%XS2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
++    { "vcvts%XS2sd", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
++    { "vcvtp%XD2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
++    { "vcvts%XD2ss", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F5B */
+   {
+     { VEX_W_TABLE (EVEX_W_0F5B_P_0) },
+-    { VEX_W_TABLE (EVEX_W_0F5B_P_1) },
+-    { VEX_W_TABLE (EVEX_W_0F5B_P_2) },
++    { "vcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 },
++    { "vcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F5C */
+   {
+     { "vsubpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5C_P_1) },
++    { "vsubs%XS",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+     { "vsubpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5C_P_3) },
++    { "vsubs%XD",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F5D */
+   {
+     { "vminpX",	{ XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5D_P_1) },
++    { "vmins%XS",	{ XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+     { "vminpX",	{ XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5D_P_3) },
++    { "vmins%XD",	{ XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_0F5E */
+   {
+     { "vdivpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5E_P_1) },
++    { "vdivs%XS",	{ XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+     { "vdivpX",	{ XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5E_P_3) },
++    { "vdivs%XD",	{ XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F5F */
+   {
+     { "vmaxpX",	{ XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5F_P_1) },
++    { "vmaxs%XS",	{ XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+     { "vmaxpX",	{ XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0F5F_P_3) },
++    { "vmaxs%XD",	{ XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_0F6F */
+   {
+@@ -152,16 +152,16 @@
+   /* PREFIX_EVEX_0FC2 */
+   {
+     { "vcmppX",	{ MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0FC2_P_1) },
++    { "vcmps%XS",	{ MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
+     { "vcmppX",	{ MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+-    { VEX_W_TABLE (EVEX_W_0FC2_P_3) },
++    { "vcmps%XD",	{ MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
+   },
+   /* PREFIX_EVEX_0FE6 */
+   {
+     { Bad_Opcode },
+     { VEX_W_TABLE (EVEX_W_0FE6_P_1) },
+-    { VEX_W_TABLE (EVEX_W_0FE6_P_2) },
+-    { VEX_W_TABLE (EVEX_W_0FE6_P_3) },
++    { "vcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
++    { "vcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_0F3810 */
+   {
+@@ -185,7 +185,7 @@
+   {
+     { Bad_Opcode },
+     { VEX_W_TABLE (EVEX_W_0F3813_P_1) },
+-    { VEX_W_TABLE (EVEX_W_0F3813_P_2) },
++    { "vcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_0F3814 */
+   {
+@@ -322,7 +322,7 @@
+   /* PREFIX_EVEX_0F3852 */
+   {

_service:tar_scm:0029-x86-consistently-use-scalar_mode-for-AVX512-FP16-sca.patch Added

@@ -0,0 +1,204 @@
+From 928c8d70c82feea45683b43e324cd2079d4ee31d Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Fri, 14 Jan 2022 10:55:42 +0100
+Subject: PATCH x86: consistently use scalar_mode for AVX512-FP16 scalar
+ insns
+
+For some reason the original AVFX512F insns were not taken as a basis
+here, causing unnecessary divergence. While not an active issue, it is
+still relevant to note that OP_XMM() has special treatment of e.g.
+scalar_mode (marking broadcast as invalid). Such would better be
+consistent for all sufficiently similar insns.
+
+diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
+index fc5439a1fec..140c4e850b4 100644
+--- a/opcodes/i386-dis-evex-prefix.h
++++ b/opcodes/i386-dis-evex-prefix.h
+@@ -440,7 +440,7 @@
+   },
+   /* PREFIX_EVEX_MAP5_1D */
+   {
+-    { "vcvtss2s%XH",      { XMM, VexScalar, EXd, EXxEVexR }, 0 },
++    { "vcvtss2s%XH",      { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+     { Bad_Opcode },
+     { "vcvtps2p%XHx%XY",  { XMxmmq, EXx, EXxEVexR }, 0 },
+   },
+@@ -470,24 +470,24 @@
+   /* PREFIX_EVEX_MAP5_51 */
+   {
+     { "vsqrtp%XH",        { XM, EXxh, EXxEVexR }, 0 },
+-    { "vsqrts%XH",        { XMM, VexScalar, EXw, EXxEVexR }, 0 },
++    { "vsqrts%XH",        { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_58 */
+   {
+     { "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
+-    { "vadds%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
++    { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_59 */
+   {
+     { "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
+-    { "vmuls%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
++    { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_5A */
+   {
+     { "vcvtp%XH2pd",    { XM, EXxmmqdh, EXxEVexS }, 0 },
+-    { "vcvts%XH2sd",    { XMM, VexScalar, EXw, EXxEVexS }, 0 },
++    { "vcvts%XH2sd",    { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
+     { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
+-    { "vcvts%XD2sh",    { XMM, VexScalar, EXq, EXxEVexR }, 0 },
++    { "vcvts%XD2sh",    { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_5B */
+   {
+@@ -498,22 +498,22 @@
+   /* PREFIX_EVEX_MAP5_5C */
+   {
+     { "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
+-    { "vsubs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
++    { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_5D */
+   {
+     { "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
+-    { "vmins%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
++    { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_5E */
+   {
+     { "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
+-    { "vdivs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
++    { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_5F */
+   {
+     { "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
+-    { "vmaxs%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
++    { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
+   },
+   /* PREFIX_EVEX_MAP5_78 */
+   {
+@@ -555,7 +555,7 @@
+   },
+   /* PREFIX_EVEX_MAP6_13 */
+   {
+-    { "vcvts%XH2ss",	{ XMM, VexScalar, EXw, EXxEVexS }, 0 },
++    { "vcvts%XH2ss",	{ XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
+     { Bad_Opcode },
+     { "vcvtp%XH2psx",	{ XM, EXxmmqh, EXxEVexS }, 0 },
+   },
+@@ -569,9 +569,9 @@
+   /* PREFIX_EVEX_MAP6_57 */
+   {
+     { Bad_Opcode },
+-    { "vfmaddcs%XH",      { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
++    { "vfmaddcs%XH",      { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+     { Bad_Opcode },
+-    { "vfcmaddcs%XH",     { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
++    { "vfcmaddcs%XH",     { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+   },
+   /* PREFIX_EVEX_MAP6_D6 */
+   {
+@@ -583,7 +583,7 @@
+   /* PREFIX_EVEX_MAP6_D7 */
+   {
+     { Bad_Opcode },
+-    { "vfmulcs%XH",     { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
++    { "vfmulcs%XH",     { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+     { Bad_Opcode },
+-    { "vfcmulcs%XH",    { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
++    { "vfcmulcs%XH",    { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+   },
+diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
+index 5d621cf1557..fe39026a871 100644
+--- a/opcodes/i386-dis-evex.h
++++ b/opcodes/i386-dis-evex.h
+@@ -1216,7 +1216,7 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { "vscalefp%XH",      { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vscalefs%XH",      { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vscalefs%XH",      { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { Bad_Opcode },
+     { Bad_Opcode },
+     /* 30 */
+@@ -1241,7 +1241,7 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { "vgetexpp%XH",      { XM, EXxh, EXxEVexS }, PREFIX_DATA },
+-    { "vgetexps%XH",      { XMM, VexScalar, EXw, EXxEVexS }, PREFIX_DATA },
++    { "vgetexps%XH",      { XMScalar, VexScalar, EXw, EXxEVexS }, PREFIX_DATA },
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -1252,9 +1252,9 @@ static const struct dis386 evex_table256 = {
+     { Bad_Opcode },
+     { Bad_Opcode },
+     { "vrcpp%XH",	  { XM, EXxh }, PREFIX_DATA },
+-    { "vrcps%XH",	  { XMM, VexScalar, EXw }, PREFIX_DATA },
++    { "vrcps%XH",	  { XMScalar, VexScalar, EXw }, PREFIX_DATA },
+     { "vrsqrtp%XH",       { XM, EXxh }, PREFIX_DATA },
+-    { "vrsqrts%XH",       { XMM, VexScalar, EXw }, PREFIX_DATA },
++    { "vrsqrts%XH",       { XMScalar, VexScalar, EXw }, PREFIX_DATA },
+     /* 50 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -1338,13 +1338,13 @@ static const struct dis386 evex_table256 = {
+     { "vfmsubadd132p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+     /* 98 */
+     { "vfmadd132p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfmadd132s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfmadd132s%XH",  { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfmsub132p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfmsub132s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfmsub132s%XH",  { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfnmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmadd132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfnmadd132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfnmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmsub132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfnmsub132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     /* A0 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -1356,13 +1356,13 @@ static const struct dis386 evex_table256 = {
+     { "vfmsubadd213p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+     /* A8 */
+     { "vfmadd213p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfmadd213s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfmadd213s%XH",  { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfmsub213p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfmsub213s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfmsub213s%XH",  { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfnmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmadd213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfnmadd213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfnmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmsub213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfnmsub213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     /* B0 */
+     { Bad_Opcode },
+     { Bad_Opcode },
+@@ -1374,13 +1374,13 @@ static const struct dis386 evex_table256 = {
+     { "vfmsubadd231p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+     /* B8 */
+     { "vfmadd231p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfmadd231s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfmadd231s%XH",  { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfmsub231p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfmsub231s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfmsub231s%XH",  { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfnmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmadd231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfnmadd231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     { "vfnmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+-    { "vfnmsub231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
++    { "vfnmsub231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+     /* C0 */

_service:tar_scm:CVE-2019-1010204.patch Added

_service:tar_scm:Fix-a-potential-use-of-an-uninitialised-value-in-the.patch Added

@@ -0,0 +1,31 @@
+From 151f5de4a6548cd83a79b4705f1e901776ddacc5 Mon Sep 17 00:00:00 2001
+From: Nick Clifton <nickc@redhat.com>
+Date: Thu, 28 May 2020 11:04:27 +0100
+Subject: PATCH Fix a potential use of an uninitialised value in the ns32k
+ disassembler.
+
+	* ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
+	static.
+---
+ opcodes/ns32k-dis.c | 5 ++++-
+ 1 files changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/opcodes/ns32k-dis.c b/opcodes/ns32k-dis.c
+index 12df182..ccad820 100644
+--- a/opcodes/ns32k-dis.c
++++ b/opcodes/ns32k-dis.c
+@@ -738,7 +738,10 @@ print_insn_ns32k (bfd_vma memaddr, disassemble_info *info)
+   unsigned short first_word;
+   int ioffset;		/* Bits into instruction.  */
+   int aoffset;		/* Bits into arguments.  */
+-  char arg_bufsMAX_ARGS+1ARG_LEN;
++  /* The arg_bufs array is made static in order to avoid a potential
++     use of an uninitialised value if we are asekd to disassemble a
++     corrupt instruction.  */
++  static char arg_bufsMAX_ARGS+1ARG_LEN;
+   int argnum;
+   int maxarg;
+   struct private priv;
+-- 
+1.8.3.1
+

_service:tar_scm:backport-0001-CVE-2021-42574.patch Added

@@ -0,0 +1,1983 @@
+From b3aa80b45c4f46029efeb204bb9f2d2c4278a0e5 Mon Sep 17 00:00:00 2001
+From: Nick Clifton <nickc@redhat.com>
+Date: Tue, 9 Nov 2021 13:25:42 +0000
+Subject: PATCH Add --unicode option to control how unicode characters are
+ handled by display tools.
+
+	* nm.c: Add --unicode option to control how unicode characters are
+	handled.
+	* objdump.c: Likewise.
+	* readelf.c: Likewise.
+	* strings.c: Likewise. 
+	* binutils.texi: Document the new feature. 
+	* NEWS: Document the new feature. 
+	* testsuite/binutils-all/unicode.exp: New file. 
+	* testsuite/binutils-all/nm.hex.unicode 
+	* testsuite/binutils-all/strings.escape.unicode 
+	* testsuite/binutils-all/objdump.highlight.unicode 
+	* testsuite/binutils-all/readelf.invalid.unicode 
+ 
+Conflict:Context adaptation
+---
+ binutils/NEWS              |   9 +
+ binutils/doc/binutils.texi |  78 +++++
+ binutils/nm.c              | 228 +++++++++++++-
+ binutils/objdump.c         | 235 ++++++++++++--
+ binutils/readelf.c         | 190 +++++++++++-
+ binutils/strings.c         | 757 +++++++++++++++++++++++++++++++++++++++++----
+ 6 files changed, 1394 insertions(+), 103 deletions(-)
+
+diff --git a/binutils/NEWS b/binutils/NEWS
+index 8a73387..db9114e 100644
+--- a/binutils/NEWS
++++ b/binutils/NEWS
+@@ -1,5 +1,14 @@
+ -*- text -*-
+ 
++* Tools which display symbols or strings (readelf, strings, nm, objdump)
++  have a new command line option which controls how unicode characters are
++  handled.  By default they are treated as normal for the tool.  Using
++  --unicode=locale will display them according to the current locale.
++  Using --unicode=hex will display them as hex byte values, whilst
++  --unicode=escape will display them as escape sequences.  In addition
++  using --unicode=highlight will display them as unicode escape sequences
++  highlighted in red (if supported by the output device).
++
+ Changes in 2.37:
+ 
+ * The readelf tool has a new command line option which can be used to specify
+diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
+index 504c3ea..5de0631 100644
+--- a/binutils/doc/binutils.texi
++++ b/binutils/doc/binutils.texi
+@@ -812,6 +812,7 @@ nm @option{-A}|@option{-o}|@option{--print-file-name}
+    @option{-s}|@option{--print-armap}
+    @option{-t} @var{radix}|@option{--radix=}@var{radix}
+    @option{-u}|@option{--undefined-only}
++   @option{-U} @var{method} @option{--unicode=}@var{method}
+    @option{-V}|@option{--version}
+    @option{-X 32_64}
+    @option{--defined-only}
+@@ -1132,6 +1133,21 @@ Use @var{radix} as the radix for printing the symbol values.  It must be
+ @cindex undefined symbols
+ Display only undefined symbols (those external to each object file).
+ 
++@item -U @var{d|i|l|e|x|h}
++@itemx --unicode=@var{default|invalid|locale|escape|hex|highlight}
++Controls the display of UTF-8 encoded mulibyte characters in strings.
++The default (@option{--unicode=default}) is to give them no special
++treatment.  The @option{--unicode=locale} option displays the sequence
++in the current locale, which may or may not support them.  The options
++@option{--unicode=hex} and @option{--unicode=invalid} display them as
++hex byte sequences enclosed by either angle brackets or curly braces.
++
++The @option{--unicode=escape} option displays them as escape sequences
++(@var{\uxxxx}) and the @option{--unicode=highlight} option displays
++them as escape sequences highlighted in red (if supported by the
++output device).  The colouring is intended to draw attention to the
++presence of unicode sequences where they might not be expected.
++
+ @item -V
+ @itemx --version
+ Show the version number of @command{nm} and exit.
+@@ -2247,6 +2263,7 @@ objdump @option{-a}|@option{--archive-headers}
+         @option{--prefix-strip=}@var{level}
+         @option{--insn-width=}@var{width}
+         @option{--visualize-jumps=color|=extended-color|=off}
++        @option{-U} @var{method} @option{--unicode=}@var{method}
+         @option{-V}|@option{--version}
+         @option{-H}|@option{--help}
+         @var{objfile}@dots{}
+@@ -2921,6 +2938,21 @@ When displaying symbols include those which the target considers to be
+ special in some way and which would not normally be of interest to the
+ user.
+ 
++@item -U @var{d|i|l|e|x|h}
++@itemx --unicode=@var{default|invalid|locale|escape|hex|highlight}
++Controls the display of UTF-8 encoded mulibyte characters in strings.
++The default (@option{--unicode=default}) is to give them no special
++treatment.  The @option{--unicode=locale} option displays the sequence
++in the current locale, which may or may not support them.  The options
++@option{--unicode=hex} and @option{--unicode=invalid} display them as
++hex byte sequences enclosed by either angle brackets or curly braces.
++
++The @option{--unicode=escape} option displays them as escape sequences
++(@var{\uxxxx}) and the @option{--unicode=highlight} option displays
++them as escape sequences highlighted in red (if supported by the
++output device).  The colouring is intended to draw attention to the
++presence of unicode sequences where they might not be expected.
++
+ @item -V
+ @itemx --version
+ Print the version number of @command{objdump} and exit.
+@@ -3197,6 +3229,7 @@ strings @option{-afovV} @option{-}@var{min-len}
+         @option{-n} @var{min-len} @option{--bytes=}@var{min-len}
+         @option{-t} @var{radix} @option{--radix=}@var{radix}
+         @option{-e} @var{encoding} @option{--encoding=}@var{encoding}
++        @option{-U} @var{method} @option{--unicode=}@var{method}
+         @option{-} @option{--all} @option{--print-file-name}
+         @option{-T} @var{bfdname} @option{--target=}@var{bfdname}
+         @option{-w} @option{--include-all-whitespace}
+@@ -3288,6 +3321,28 @@ single-8-bit-byte characters, @samp{b} = 16-bit bigendian, @samp{l} =
+ littleendian.  Useful for finding wide character strings. (@samp{l}
+ and @samp{b} apply to, for example, Unicode UTF-16/UCS-2 encodings).
+ 
++@item -U @var{d|i|l|e|x|h}
++@itemx --unicode=@var{default|invalid|locale|escape|hex|highlight}
++Controls the display of UTF-8 encoded mulibyte characters in strings.
++The default (@option{--unicode=default}) is to give them no special
++treatment, and instead rely upon the setting of the
++@option{--encoding} option.  The other values for this option
++automatically enable @option{--encoding=S}.
++
++The @option{--unicode=invalid} option treats them as non-graphic
++characters and hence not part of a valid string.  All the remaining
++options treat them as valid string characters.
++
++The @option{--unicode=locale} option displays them in the current
++locale, which may or may not support UTF-8 encoding.  The
++@option{--unicode=hex} option displays them as hex byte sequences
++enclosed between @var{<>} characters.  The @option{--unicode=escape}
++option displays them as escape sequences (@var{\uxxxx}) and the
++@option{--unicode=highlight} option displays them as escape sequences
++highlighted in red (if supported by the output device).  The colouring
++is intended to draw attention to the presence of unicode sequences
++where they might not be expected.
++
+ @item -T @var{bfdname}
+ @itemx --target=@var{bfdname}
+ @cindex object code format
+@@ -4796,6 +4851,7 @@ readelf @option{-a}|@option{--all}
+         @option{--demangle@var{=style}}|@option{--no-demangle}
+         @option{--quiet}
+         @option{--recurse-limit}|@option{--no-recurse-limit}
++        @option{-U} @var{method}|@option{--unicode=}@var{method}
+         @option{-n}|@option{--notes}
+         @option{-r}|@option{--relocs}
+         @option{-u}|@option{--unwind}
+@@ -4962,6 +5018,28 @@ necessary in order to demangle truly complicated names.  Note however
+ that if the recursion limit is disabled then stack exhaustion is
+ possible and any bug reports about such an event will be rejected.
+ 
++@item -U @var{d|i|l|e|x|h}
++@itemx --unicode=default|invalid|locale|escape|hex|highlight
++Controls the display of non-ASCII characters in identifier names.
++The default (@option{--unicode=locale} or @option{--unicode=default}) is
++to treat them as multibyte characters and display them in the current
++locale.  All other versions of this option treat the bytes as UTF-8
++encoded values and attempt to interpret them.  If they cannot be
++interpreted or if the @option{--unicode=invalid} option is used then
++they are displayed as a sequence of hex bytes, encloses in curly
++parethesis characters.
++
++Using the @option{--unicode=escape} option will display the characters
++as as unicode escape sequences (@var{\uxxxx}).  Using the
++@option{--unicode=hex} will display the characters as hex byte
++sequences enclosed between angle brackets.
++
++Using the @option{--unicode=highlight} will display the characters as 
++unicode escape sequences but it will also highlighted them in red,
++assuming that colouring is supported by the output device.  The
++colouring is intended to draw attention to the presence of unicode
++sequences when they might not be expected.
++
+ @item -e
+ @itemx --headers
+ Display all the headers in the file.  Equivalent to @option{-h -l -S}.
+diff --git a/binutils/nm.c b/binutils/nm.c
+index 82ccec6..3f8abfc 100644
+--- a/binutils/nm.c
++++ b/binutils/nm.c
+@@ -38,6 +38,11 @@
+ #include "bucomm.h"
+ #include "plugin-api.h"
+ #include "plugin.h"
++#include "safe-ctype.h"
++
++#ifndef streq
++#define streq(a,b) (strcmp ((a),(b)) == 0)
++#endif

_service:tar_scm:backport-0001-PR28391-strip-objcopy-preserve-dates-.a-cannot-set-t.patch Added

@@ -0,0 +1,54 @@
+From 70b88840a4c65c8f5e2244129487886b5a5c7664 Mon Sep 17 00:00:00 2001
+From: Gleb Fotengauer-Malinovskiy <glebfm@altlinux.org>
+Date: Tue, 28 Sep 2021 20:11:26 +0930
+Subject: PATCH PR28391, strip/objcopy --preserve-dates *.a: cannot set time
+
+Reference: https://sourceware.org/git/?p=binutils-gdb.git;a=patch;h=6b02746a0e29b1007efd4feb137e2da3e681fc68
+
+After commit 985e0264516 copy_archive function began to pass invalid
+values to the utimensat(2) function when it tries to preserve
+timestamps in ar archives.  This happens because the bfd_stat_arch_elt
+implementation for ar archives fills only the st_mtim.tv_sec part of
+the st_mtim timespec structure, but leaves the st_mtim.tv_nsec part
+and the whole st_atim timespec untouched leaving them uninitialized
+
+	PR 28391
+	* ar.c (extract_file): Clear buf for preserve_dates.
+	* objcopy.c (copy_archive): Likewise.
+
+(cherry picked from commit 0d62064867c74286360e821b75ef6799bedc4b34)
+Signed-off-by: maminjie <maminjie8@163.com>
+---
+ binutils/ar.c      | 3 +++
+ binutils/objcopy.c | 1 +
+ 2 files changed, 4 insertions(+)
+
+diff --git a/binutils/ar.c b/binutils/ar.c
+index 5d6976c7..8885585e 100644
+--- a/binutils/ar.c
++++ b/binutils/ar.c
+@@ -1180,6 +1180,9 @@ extract_file (bfd *abfd)
+   bfd_size_type size;
+   struct stat buf;
+ 
++  if (preserve_dates)
++    memset (&buf, 0, sizeof (buf));
++
+   if (bfd_stat_arch_elt (abfd, &buf) != 0)
+     /* xgettext:c-format */
+     fatal (_("internal stat error on %s"), bfd_get_filename (abfd));
+diff --git a/binutils/objcopy.c b/binutils/objcopy.c
+index fe3ea29c..242b1052 100644
+--- a/binutils/objcopy.c
++++ b/binutils/objcopy.c
+@@ -3600,6 +3600,7 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target,
+ 
+       if (preserve_dates)
+ 	{
++	  memset (&buf, 0, sizeof (buf));
+ 	  stat_status = bfd_stat_arch_elt (this_element, &buf);
+ 
+ 	  if (stat_status != 0)
+-- 
+2.30.0
+

_service:tar_scm:backport-0001-texi2pod.pl-add-no-op-no-split-option-support-PR2814.patch Added

@@ -0,0 +1,37 @@
+From 96a7037cd8573cf065aa6b12baca68696f96d9ca Mon Sep 17 00:00:00 2001
+From: Sergei Trofimovich <siarheit@google.com>
+Date: Mon, 26 Jul 2021 22:51:18 +0100
+Subject: PATCH texi2pod.pl: add no-op --no-split option support PR28144
+
+Change 2faf902da ("generate single html manual page by default")
+added use of --no-split option to makeinfo. binutils reuses
+makeinfo options for texi2pod.pl wrapper. Unsupported option
+led to silent manpage truncation.
+
+The change adds no-op option support.
+
+etc/
+
+	* texi2pod.pl: Handle no-op --no-split option.
+
+Signed-off-by: Wei, Qiang <qiang.wei@suse.com>
+---
+ etc/texi2pod.pl | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/etc/texi2pod.pl b/etc/texi2pod.pl
+index 11f70d156be..dcf2b437640 100644
+--- a/etc/texi2pod.pl
++++ b/etc/texi2pod.pl
+@@ -59,6 +59,8 @@ while ($_ = shift) {
+ 	    $flag = shift;
+ 	}
+         push (@ipath, $flag);
++    } elsif (/^--no-split$/) {
++	# ignore option for makeinfo compatibility
+     } elsif (/^-/) {
+ 	usage();
+     } else {
+-- 
+2.33.0
+

_service:tar_scm:backport-0002-CVE-2021-42574.patch Added

@@ -0,0 +1,194 @@
+From 795588aec4f894206863c938bd6d716895886009 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pekka=20Sepp=C3=A4nen?= <pexu@sourceware.mail.kapsi.fi>
+Date: Wed, 10 Nov 2021 20:15:19 +1030
+Subject: PATCH PR28575, readelf.c and strings.c use undefined type uint
+
+Since --unicode support (commit b3aa80b45c4) both binutils/readelf.c
+and binutils/strings.c use 'uint' in a few locations.  It likely
+should be 'unsigned int' since there isn't anything defining 'uint'
+within binutils (besides zlib) and AFAIK it isn't a standard type.
+
+	* readelf.c (print_symbol): Replace uint with unsigned int.
+	* strings.c (string_min, display_utf8_char): Likewise.
+	(print_unicode_stream_body, print_unicode_stream): Likewise.
+	(print_strings): Likewise.
+	(get_unicode_byte): Wrap long line.
+---
+ binutils/readelf.c |  4 ++--
+ binutils/strings.c | 41 ++++++++++++++++++++++-------------------
+ 2 files changed, 24 insertions(+), 21 deletions(-)
+
+diff --git a/binutils/readelf.c b/binutils/readelf.c
+index c71d542f051b..5a87728d3e98 100644
+--- a/binutils/readelf.c
++++ b/binutils/readelf.c
+@@ -702,7 +702,7 @@ print_symbol (signed int width, const char * symbol)
+ 	  /* Display unicode characters as something else.  */
+ 	  unsigned char bytes4;
+ 	  bool          is_utf8;
+-	  uint          nbytes;
++	  unsigned int  nbytes;
+ 
+ 	  bytes0 = c;
+ 
+@@ -767,7 +767,7 @@ print_symbol (signed int width, const char * symbol)
+ 
+ 	  if (unicode_display == unicode_hex || ! is_utf8)
+ 	    {
+-	      uint i;
++	      unsigned int i;
+ 
+ 	      if (width_remaining < (nbytes * 2) + 2)
+ 		break;
+diff --git a/binutils/strings.c b/binutils/strings.c
+index e8649a80d6a7..13db60f57a57 100644
+--- a/binutils/strings.c
++++ b/binutils/strings.c
+@@ -57,7 +57,7 @@
+ 
+   --unicode={default|locale|invalid|hex|escape|highlight}
+   -u {d|l|i|x|e|h}
+-                Determine how to handle UTF-8 unicode characters.  The default
++		Determine how to handle UTF-8 unicode characters.  The default
+ 		is no special treatment.  All other versions of this option
+ 		only apply if the encoding is valid and enabling the option
+ 		implies --encoding=S.
+@@ -123,7 +123,7 @@ extern int errno;
+ static int address_radix;
+ 
+ /* Minimum length of sequence of graphic chars to trigger output.  */
+-static uint string_min;
++static unsigned int string_min;
+ 
+ /* Whether or not we include all whitespace as a graphic char.   */
+ static bool include_all_whitespace;
+@@ -272,7 +272,7 @@ main (int argc, char **argv)
+ 
+ 	case 's':
+ 	  output_separator = optarg;
+-          break;
++	  break;
+ 
+ 	case 'U':
+ 	  if (streq (optarg, "default") || streq (optarg, "d"))
+@@ -677,7 +677,7 @@ is_valid_utf8 (const unsigned char * buffer, unsigned long buflen)
+ 
+   if ((buffer2 & 0xc0) != 0x80)
+     return 0;
+-  
++
+   if ((buffer0 & 0x10) == 0)
+     return 3;
+ 
+@@ -694,11 +694,11 @@ is_valid_utf8 (const unsigned char * buffer, unsigned long buflen)
+    of unicode_display.  The character is known to be valid.
+    Returns the number of bytes consumed.  */
+ 
+-static uint
++static unsigned int
+ display_utf8_char (const unsigned char * buffer)
+ {
+-  uint j;
+-  uint utf8_len;
++  unsigned int j;
++  unsigned int utf8_len;
+ 
+   switch (buffer0 & 0x30)
+     {
+@@ -712,7 +712,7 @@ display_utf8_char (const unsigned char * buffer)
+     default:
+       utf8_len = 4;
+     }
+-      
++
+   switch (unicode_display)
+     {
+     default:
+@@ -728,7 +728,7 @@ display_utf8_char (const unsigned char * buffer)
+ 	{
+ 	case 2:
+ 	  printf ("\\u%02x%02x",
+-		  ((buffer0 & 0x1c) >> 2), 
++		  ((buffer0 & 0x1c) >> 2),
+ 		  ((buffer0 & 0x03) << 6) | (buffer1 & 0x3f));
+ 	  break;
+ 
+@@ -857,7 +857,7 @@ print_unicode_buffer (const char *            filename,
+     return;
+ 
+   print_filename_and_address (filename, address + start_point);
+-  
++
+   /* We have found string_min characters.  Display them and any
+      more that follow.  */
+   for (i = start_point; i < buflen; i += char_len)
+@@ -888,7 +888,10 @@ print_unicode_buffer (const char *            filename,
+ }
+ 
+ static int
+-get_unicode_byte (FILE * stream, unsigned char * putback, uint * num_putback, uint * num_read)
++get_unicode_byte (FILE *          stream,
++		  unsigned char * putback,
++		  unsigned int *  num_putback,
++		  unsigned int *  num_read)
+ {
+   if (* num_putback > 0)
+     {
+@@ -912,7 +915,7 @@ print_unicode_stream_body (const char *     filename,
+ 			   file_ptr         address,
+ 			   FILE *           stream,
+ 			   unsigned char *  putback_buf,
+-			   uint             num_putback,
++			   unsigned int     num_putback,
+ 			   unsigned char *  print_buf)
+ {
+   /* It would be nice if we could just read the stream into a buffer
+@@ -921,9 +924,9 @@ print_unicode_stream_body (const char *     filename,
+      we go one byte at a time...  */
+ 
+   file_ptr start_point = 0;
+-  uint num_read = 0;
+-  uint num_chars = 0;
+-  uint num_print = 0;
++  unsigned int num_read = 0;
++  unsigned int num_chars = 0;
++  unsigned int num_print = 0;
+   int c = 0;
+ 
+   /* Find a series of string_min characters.  Put them into print_buf.  */
+@@ -1064,7 +1067,7 @@ print_unicode_stream_body (const char *     filename,
+ 
+       print_filename_and_address (filename, address + start_point);
+ 
+-      uint i;
++      unsigned int i;
+       for (i = 0; i < num_print;)
+ 	{
+ 	  if (print_bufi < 127)
+@@ -1075,7 +1078,7 @@ print_unicode_stream_body (const char *     filename,
+ 
+       /* OK so now we have to start read unchecked bytes.  */
+ 
+-        /* Find a series of string_min characters.  Put them into print_buf.  */
++      /* Find a series of string_min characters.  Put them into print_buf.  */
+       do
+ 	{
+ 	  c = get_unicode_byte (stream, putback_buf, & num_putback, & num_read);
+@@ -1213,7 +1216,7 @@ print_unicode_stream (const char * filename,
+   unsigned char * print_buf = xmalloc ((4 * string_min) + 1);
+   /* We should never have to put back more than 4 bytes.  */
+   unsigned char putback_buf5;
+-  uint num_putback = 0;
++  unsigned int num_putback = 0;
+ 
+   print_unicode_stream_body (filename, address, stream, putback_buf, num_putback, print_buf);
+   free (print_buf);
+@@ -1250,7 +1253,7 @@ print_strings (const char *filename, FILE *stream, file_ptr address,
+   while (1)
+     {
+       file_ptr start;
+-      uint i;
++      unsigned int i;
+       long c;
+ 
+       /* See if the next `string_min' chars are all graphic chars.  */

_service:tar_scm:backport-0003-CVE-2021-42574.patch Added

@@ -0,0 +1,33 @@
+From 584294c4066d0101161e4e04744a46cce7a7863e Mon Sep 17 00:00:00 2001
+From: Nick Clifton <nickc@redhat.com>
+Date: Mon, 29 Nov 2021 15:37:24 +0000
+Subject: PATCH strings: Replace references to -u option with references to
+ -U.
+
+	PR 28632
+---
+ binutils/strings.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/binutils/strings.c b/binutils/strings.c
+index f594299939f9..f85cb03406c9 100644
+--- a/binutils/strings.c
++++ b/binutils/strings.c
+@@ -57,7 +57,7 @@
+ 		Specify a non-default object file format.
+ 
+   --unicode={default|locale|invalid|hex|escape|highlight}
+-  -u {d|l|i|x|e|h}
++  -U {d|l|i|x|e|h}
+ 		Determine how to handle UTF-8 unicode characters.  The default
+ 		is no special treatment.  All other versions of this option
+ 		only apply if the encoding is valid and enabling the option
+@@ -1333,7 +1333,7 @@ usage (FILE *stream, int status)
+   -e --encoding={s,S,b,l,B,L} Select character size and endianness:\n\
+                             s = 7-bit, S = 8-bit, {b,l} = 16-bit, {B,L} = 32-bit\n\
+   --unicode={default|show|invalid|hex|escape|highlight}\n\
+-  -u {d|s|i|x|e|h}          Specify how to treat UTF-8 encoded unicode characters\n\
++  -U {d|s|i|x|e|h}          Specify how to treat UTF-8 encoded unicode characters\n\
+   -s --output-separator=<string> String used to separate strings in output.\n\
+   @<file>                   Read options from <file>\n\
+   -h --help                 Display this information\n\

_service:tar_scm:backport-AArch64-Add-support-for-AArch64-EFI-efi-aarch64.patch Added

@@ -0,0 +1,179 @@
+From 4b6391170a7c3a70946501fb51606c95827ed9cb Mon Sep 17 00:00:00 2001
+From: Alan Modra <amodra@gmail.com>
+Date: Thu, 25 Nov 2021 14:26:51 +1030
+Subject: PATCH 1/3 AArch64: Add support for AArch64 EFI (efi-*-aarch64)
+
+Commit b69c9d41e8 edited bfd/Makefile.in rather than using automake,
+which meant a typo in Makefile.am was not discovered and other
+differences in Makefile.in are seen with a proper regeneration.  One
+difference was lack of an empty line between the pe-aarch64igen.c rule
+and the following $(BFD32_LIBS) etc. dependency rule, in the
+regenerated file.  Not that it matters for proper "make" behaviour,
+but it's nicer with a line between those rules.  Moving the rule
+earlier seems to cure the missing empty line.
+
+	* Makefile.am (BFD64_BACKENDS): Correct typo.
+	(BFD_H_DEPS, LOCAL_H_DEPS): Move earlier.  Move rule using these
+	deps earlier too.
+	* Makefile.in: Regenerate.
+	* po/BLD-POTFILES.in: Regenerate.
+	* po/SRC-POTFILES.in: Regenerate.
+
+References: bsn#351
+Signed-off-by: Chenxi Mao <chenxi.mao@suse.com>
+---
+ bfd/Makefile.am        | 20 ++++++++++----------
+ bfd/Makefile.in        | 21 ++++++++++-----------
+ bfd/po/BLD-POTFILES.in |  1 +
+ bfd/po/SRC-POTFILES.in |  1 +
+ 4 files changed, 22 insertions(+), 21 deletions(-)
+
+diff --git a/bfd/Makefile.am b/bfd/Makefile.am
+index a4e84a1d..7c859428 100644
+--- a/bfd/Makefile.am
++++ b/bfd/Makefile.am
+@@ -569,7 +569,7 @@ BFD64_BACKENDS = \
+ 	mmo.lo \
+ 	pe-aarch64igen.lo \
+ 	pe-x86_64.lo \
+-	pei-aarch64lo \
++	pei-aarch64.lo \
+ 	pei-ia64.lo \
+ 	pei-x86_64.lo \
+ 	pepigen.lo \
+@@ -710,6 +710,15 @@ BUILT_SOURCES = $(BUILD_HFILES)
+ 
+ HFILES = $(SOURCE_HFILES) $(BUILD_HFILES)
+ 
++BFD_H_DEPS = $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
++LOCAL_H_DEPS = libbfd.h sysdep.h config.h
++$(BFD32_LIBS) \
++ $(BFD64_LIBS) \
++ $(ALL_MACHINES) \
++ $(BFD32_BACKENDS) \
++ $(BFD64_BACKENDS) \
++ $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
++
+ SRC_POTFILES = $(SOURCE_CFILES) $(SOURCE_HFILES)
+ BLD_POTFILES = $(BUILD_CFILES) $(BUILD_HFILES)
+ 
+@@ -869,15 +878,6 @@ pe-aarch64igen.c: peXXigen.c
+ 	echo "#line 1 \"peXXigen.c\"" > $@
+ 	$(SED) -e s/XX/peAArch64/g < $< >> $@
+ 
+-BFD_H_DEPS= $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
+-LOCAL_H_DEPS= libbfd.h sysdep.h config.h
+-$(BFD32_LIBS) \
+- $(BFD64_LIBS) \
+- $(ALL_MACHINES) \
+- $(BFD32_BACKENDS) \
+- $(BFD64_BACKENDS) \
+- $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
+-
+ host-aout.lo: Makefile
+ 
+ # The following program can be used to generate a simple config file
+diff --git a/bfd/Makefile.in b/bfd/Makefile.in
+index dd029f68..66fa92c1 100644
+--- a/bfd/Makefile.in
++++ b/bfd/Makefile.in
+@@ -1131,6 +1131,8 @@ BUILD_HFILES = \
+ # Ensure they are built early:
+ BUILT_SOURCES = $(BUILD_HFILES)
+ HFILES = $(SOURCE_HFILES) $(BUILD_HFILES)
++BFD_H_DEPS = $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
++LOCAL_H_DEPS = libbfd.h sysdep.h config.h
+ SRC_POTFILES = $(SOURCE_CFILES) $(SOURCE_HFILES)
+ BLD_POTFILES = $(BUILD_CFILES) $(BUILD_HFILES)
+ 
+@@ -1156,8 +1158,6 @@ libbfd_la_LIBADD = `cat ofiles` @SHARED_LIBADD@ $(LIBDL) $(ZLIB)
+ # everything else starts using libtool.  FIXME.
+ noinst_LIBRARIES = libbfd.a
+ libbfd_a_SOURCES = 
+-BFD_H_DEPS = $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
+-LOCAL_H_DEPS = libbfd.h sysdep.h config.h
+ BFD_H_FILES = bfd-in.h init.c opncls.c libbfd.c \
+ 	bfdio.c bfdwin.c section.c archures.c reloc.c \
+ 	syms.c bfd.c archive.c corefile.c targets.c format.c \
+@@ -1540,6 +1540,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/osf-core.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pc532-mach.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pdp11.Plo@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-aarch64igen.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-arm-wince.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-arm.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-i386.Plo@am__quote@
+@@ -1547,6 +1548,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-sh.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-x86_64.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pef.Plo@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-aarch64.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-arm-wince.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-arm.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-i386.Plo@am__quote@
+@@ -1554,11 +1556,9 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-mcore.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-sh.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-x86_64.Plo@am__quote@
+-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-aarch64.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/peigen.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pepigen.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pex64igen.Plo@am__quote@
+-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-aarch64igen.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/plugin.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ppcboot.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/reloc.Plo@am__quote@
+@@ -1884,6 +1884,12 @@ uninstall-am: uninstall-bfdincludeHEADERS uninstall-bfdlibLTLIBRARIES
+ 
+ .PRECIOUS: Makefile
+ 
++$(BFD32_LIBS) \
++ $(BFD64_LIBS) \
++ $(ALL_MACHINES) \
++ $(BFD32_BACKENDS) \
++ $(BFD64_BACKENDS) \
++ $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
+ 
+ po/SRC-POTFILES.in: @MAINT@ Makefile $(SRC_POTFILES)
+ 	for file in $(SRC_POTFILES); do echo $$file; done \
+@@ -2001,13 +2007,6 @@ pe-aarch64igen.c: peXXigen.c
+ 	echo "#line 1 \"peXXigen.c\"" > $@
+ 	$(SED) -e s/XX/peAArch64/g < $< >> $@
+ 
+-$(BFD32_LIBS) \
+- $(BFD64_LIBS) \
+- $(ALL_MACHINES) \
+- $(BFD32_BACKENDS) \
+- $(BFD64_BACKENDS) \
+- $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
+-
+ host-aout.lo: Makefile
+ 
+ # The following program can be used to generate a simple config file
+diff --git a/bfd/po/BLD-POTFILES.in b/bfd/po/BLD-POTFILES.in
+index f81e2b40..f0a870df 100644
+--- a/bfd/po/BLD-POTFILES.in
++++ b/bfd/po/BLD-POTFILES.in
+@@ -7,6 +7,7 @@ elf64-aarch64.c
+ elf64-ia64.c
+ elf64-riscv.c
+ elf64-target.h
++pe-aarch64igen.c
+ peigen.c
+ pepigen.c
+ pex64igen.c
+diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in
+index c83b86cd..10de7bc0 100644
+--- a/bfd/po/SRC-POTFILES.in
++++ b/bfd/po/SRC-POTFILES.in
+@@ -320,6 +320,7 @@ pe-x86_64.c
+ pef-traceback.h
+ pef.c
+ pef.h
++pei-aarch64.c
+ pei-arm-wince.c
+ pei-arm.c
+ pei-i386.c
+-- 
+2.30.2
+

_service:tar_scm:backport-Add-support-for-AArch64-EFI-efi-aarch64.patch Added

@@ -0,0 +1,158 @@
+From fd932228d9104001abbf6a1c8ef1bb030ab7a21d Mon Sep 17 00:00:00 2001
+From: Alan Modra <amodra@gmail.com>
+Date: Tue, 7 Dec 2021 12:36:31 +1030
+Subject: PATCH 2/3 Add support for AArch64 EFI (efi-*-aarch64)
+
+Commit b69c9d41e8 was broken in multiple ways regarding the realloc
+of the target string, most notably in that "-little" wasn't actually
+appended to the input_target or output_target.  This caused asan
+errors and "FAIL: Check if efi app format is recognized".  I also
+noticed that the input_target string wasn't being copied but rather
+the output_target when dealing with the input target.  Fix that too.
+
+	PR 26206
+	* objcopy.c (convert_efi_target): Rewrite.  Allocate modified
+	target strings here..
+	(copy_main): ..rather than here.  Do handle input_target,
+	not output_target for input.
+
+References: bsn#351
+Signed-off-by: Chenxi Mao <chenxi.mao@suse.com>
+---
+ binutils/objcopy.c | 86 +++++++++++++++++++++-------------------------
+ 1 file changed, 40 insertions(+), 46 deletions(-)
+
+diff --git a/binutils/objcopy.c b/binutils/objcopy.c
+index 242b1052..cbff93b3 100644
+--- a/binutils/objcopy.c
++++ b/binutils/objcopy.c
+@@ -4969,32 +4969,55 @@ set_pe_subsystem (const char *s)
+ 
+ /* Convert EFI target to PEI target.  */
+ 
+-static void
+-convert_efi_target (char *efi)
++static int
++convert_efi_target (char **targ)
+ {
+-  efi0 = 'p';
+-  efi1 = 'e';
+-  efi2 = 'i';
++  size_t len;
++  char *pei;
++  char *efi = *targ + 4;
++  int subsys = -1;
++
++  if (startswith (efi, "app-"))
++    subsys = IMAGE_SUBSYSTEM_EFI_APPLICATION;
++  else if (startswith (efi, "bsdrv-"))
++    {
++      subsys = IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER;
++      efi += 2;
++    }
++  else if (startswith (efi, "rtdrv-"))
++    {
++      subsys = IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER;
++      efi += 2;
++    }
++  else
++    return subsys;
++
++  len = strlen (efi);
++  pei = xmalloc (len + sizeof ("-little"));
++  memcpy (pei, efi, len + 1);
++  pei0 = 'p';
++  pei1 = 'e';
++  pei2 = 'i';
+ 
+   if (strcmp (efi + 4, "ia32") == 0)
+     {
+       /* Change ia32 to i386.  */
+-      efi5= '3';
+-      efi6= '8';
+-      efi7= '6';
++      pei5= '3';
++      pei6= '8';
++      pei7= '6';
+     }
+   else if (strcmp (efi + 4, "x86_64") == 0)
+     {
+       /* Change x86_64 to x86-64.  */
+-      efi7 = '-';
++      pei7 = '-';
+     }
+   else if (strcmp (efi + 4, "aarch64") == 0)
+     {
+       /* Change aarch64 to aarch64-little.  */
+-      efi = (char *) xrealloc (efi, strlen (efi) + 7);
+-      char *t = "aarch64-little";
+-      strcpy (efi + 4, t);
++      memcpy (pei + 4 + sizeof ("aarch64") - 1, "-little", sizeof ("-little"));
+     }
++  *targ = pei;
++  return subsys;
+ }
+ 
+ /* Allocate and return a pointer to a struct section_add, initializing the
+@@ -5877,53 +5900,24 @@ copy_main (int argc, char *argv)
+   if (input_target != NULL
+       && startswith (input_target, "efi-"))
+     {
+-      char *efi;
+-
+-      efi = xstrdup (output_target + 4);
+-      if (startswith (efi, "bsdrv-")
+-	  || startswith (efi, "rtdrv-"))
+-	efi += 2;
+-      else if (!startswith (efi, "app-"))
++      if (convert_efi_target (&input_target) < 0)
+ 	fatal (_("unknown input EFI target: %s"), input_target);
+-
+-      input_target = efi;
+-      convert_efi_target (efi);
+     }
+ 
+   /* Convert output EFI target to PEI target.  */
+   if (output_target != NULL
+       && startswith (output_target, "efi-"))
+     {
+-      char *efi;
++      int subsys = convert_efi_target (&output_target);
+ 
+-      efi = xstrdup (output_target + 4);
+-      if (startswith (efi, "app-"))
+-	{
+-	  if (pe_subsystem == -1)
+-	    pe_subsystem = IMAGE_SUBSYSTEM_EFI_APPLICATION;
+-	}
+-      else if (startswith (efi, "bsdrv-"))
+-	{
+-	  if (pe_subsystem == -1)
+-	    pe_subsystem = IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER;
+-	  efi += 2;
+-	}
+-      else if (startswith (efi, "rtdrv-"))
+-	{
+-	  if (pe_subsystem == -1)
+-	    pe_subsystem = IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER;
+-	  efi += 2;
+-	}
+-      else
++      if (subsys < 0)
+ 	fatal (_("unknown output EFI target: %s"), output_target);
+-
++      if (pe_subsystem == -1)
++	pe_subsystem = subsys;
+       if (pe_file_alignment == (bfd_vma) -1)
+ 	pe_file_alignment = PE_DEF_FILE_ALIGNMENT;
+       if (pe_section_alignment == (bfd_vma) -1)
+ 	pe_section_alignment = PE_DEF_SECTION_ALIGNMENT;
+-
+-      output_target = efi;
+-      convert_efi_target (efi);
+     }
+ 
+   /* If there is no destination file, or the source and destination files
+-- 
+2.30.2
+

_service:tar_scm:backport-CVE-2021-45078.patch Added

@@ -0,0 +1,245 @@
+From 161e87d12167b1e36193385485c1f6ce92f74f02 Mon Sep 17 00:00:00 2001
+From: Alan Modra <amodra@gmail.com>
+Date: Wed, 15 Dec 2021 11:48:42 +1030
+Subject: PATCH PR28694, Out-of-bounds write in stab_xcoff_builtin_type
+
+	PR 28694
+	* stabs.c (stab_xcoff_builtin_type): Make typenum unsigned.
+	Negate typenum earlier, simplifying bounds checking.  Correct
+	off-by-one indexing.  Adjust switch cases.
+---
+ binutils/stabs.c | 87 ++++++++++++++++++++++++------------------------
+ 1 file changed, 43 insertions(+), 44 deletions(-)
+
+diff --git a/binutils/stabs.c b/binutils/stabs.c
+index 274bfb0e7fa..83ee3ea5fa4 100644
+--- a/binutils/stabs.c
++++ b/binutils/stabs.c
+@@ -202,7 +202,7 @@ static debug_type stab_find_type (void *, struct stab_handle *, const int *);
+ static bool stab_record_type
+   (void *, struct stab_handle *, const int *, debug_type);
+ static debug_type stab_xcoff_builtin_type
+-  (void *, struct stab_handle *, int);
++  (void *, struct stab_handle *, unsigned int);
+ static debug_type stab_find_tagged_type
+   (void *, struct stab_handle *, const char *, int, enum debug_type_kind);
+ static debug_type *stab_demangle_argtypes
+@@ -3496,166 +3496,167 @@ stab_record_type (void *dhandle ATTRIBUTE_UNUSED, struct stab_handle *info,
+ 
+ static debug_type
+ stab_xcoff_builtin_type (void *dhandle, struct stab_handle *info,
+-			 int typenum)
++			 unsigned int typenum)
+ {
+   debug_type rettype;
+   const char *name;
+ 
+-  if (typenum >= 0 || typenum < -XCOFF_TYPE_COUNT)
++  typenum = -typenum - 1;
++  if (typenum >= XCOFF_TYPE_COUNT)
+     {
+-      fprintf (stderr, _("Unrecognized XCOFF type %d\n"), typenum);
++      fprintf (stderr, _("Unrecognized XCOFF type %d\n"), -typenum - 1);
+       return DEBUG_TYPE_NULL;
+     }
+-  if (info->xcoff_types-typenum != NULL)
+-    return info->xcoff_types-typenum;
++  if (info->xcoff_typestypenum != NULL)
++    return info->xcoff_typestypenum;
+ 
+-  switch (-typenum)
++  switch (typenum)
+     {
+-    case 1:
++    case 0:
+       /* The size of this and all the other types are fixed, defined
+ 	 by the debugging format.  */
+       name = "int";
+       rettype = debug_make_int_type (dhandle, 4, false);
+       break;
+-    case 2:
++    case 1:
+       name = "char";
+       rettype = debug_make_int_type (dhandle, 1, false);
+       break;
+-    case 3:
++    case 2:
+       name = "short";
+       rettype = debug_make_int_type (dhandle, 2, false);
+       break;
+-    case 4:
++    case 3:
+       name = "long";
+       rettype = debug_make_int_type (dhandle, 4, false);
+       break;
+-    case 5:
++    case 4:
+       name = "unsigned char";
+       rettype = debug_make_int_type (dhandle, 1, true);
+       break;
+-    case 6:
++    case 5:
+       name = "signed char";
+       rettype = debug_make_int_type (dhandle, 1, false);
+       break;
+-    case 7:
++    case 6:
+       name = "unsigned short";
+       rettype = debug_make_int_type (dhandle, 2, true);
+       break;
+-    case 8:
++    case 7:
+       name = "unsigned int";
+       rettype = debug_make_int_type (dhandle, 4, true);
+       break;
+-    case 9:
++    case 8:
+       name = "unsigned";
+       rettype = debug_make_int_type (dhandle, 4, true);
+       break;
+-    case 10:
++    case 9:
+       name = "unsigned long";
+       rettype = debug_make_int_type (dhandle, 4, true);
+       break;
+-    case 11:
++    case 10:
+       name = "void";
+       rettype = debug_make_void_type (dhandle);
+       break;
+-    case 12:
++    case 11:
+       /* IEEE single precision (32 bit).  */
+       name = "float";
+       rettype = debug_make_float_type (dhandle, 4);
+       break;
+-    case 13:
++    case 12:
+       /* IEEE double precision (64 bit).  */
+       name = "double";
+       rettype = debug_make_float_type (dhandle, 8);
+       break;
+-    case 14:
++    case 13:
+       /* This is an IEEE double on the RS/6000, and different machines
+ 	 with different sizes for "long double" should use different
+ 	 negative type numbers.  See stabs.texinfo.  */
+       name = "long double";
+       rettype = debug_make_float_type (dhandle, 8);
+       break;
+-    case 15:
++    case 14:
+       name = "integer";
+       rettype = debug_make_int_type (dhandle, 4, false);
+       break;
+-    case 16:
++    case 15:
+       name = "boolean";
+       rettype = debug_make_bool_type (dhandle, 4);
+       break;
+-    case 17:
++    case 16:
+       name = "short real";
+       rettype = debug_make_float_type (dhandle, 4);
+       break;
+-    case 18:
++    case 17:
+       name = "real";
+       rettype = debug_make_float_type (dhandle, 8);
+       break;
+-    case 19:
++    case 18:
+       /* FIXME */
+       name = "stringptr";
+       rettype = NULL;
+       break;
+-    case 20:
++    case 19:
+       /* FIXME */
+       name = "character";
+       rettype = debug_make_int_type (dhandle, 1, true);
+       break;
+-    case 21:
++    case 20:
+       name = "logical*1";
+       rettype = debug_make_bool_type (dhandle, 1);
+       break;
+-    case 22:
++    case 21:
+       name = "logical*2";
+       rettype = debug_make_bool_type (dhandle, 2);
+       break;
+-    case 23:
++    case 22:
+       name = "logical*4";
+       rettype = debug_make_bool_type (dhandle, 4);
+       break;
+-    case 24:
++    case 23:
+       name = "logical";
+       rettype = debug_make_bool_type (dhandle, 4);
+       break;
+-    case 25:
++    case 24:
+       /* Complex type consisting of two IEEE single precision values.  */
+       name = "complex";
+       rettype = debug_make_complex_type (dhandle, 8);
+       break;
+-    case 26:
++    case 25:
+       /* Complex type consisting of two IEEE double precision values.  */
+       name = "double complex";
+       rettype = debug_make_complex_type (dhandle, 16);
+       break;
+-    case 27:
++    case 26:
+       name = "integer*1";
+       rettype = debug_make_int_type (dhandle, 1, false);
+       break;
+-    case 28:

_service:tar_scm:backport-CVE-2022-38126.patch Added

@@ -0,0 +1,34 @@
+From 753efb93dc018558c483111fbfe14c4ee8c84c51 Mon Sep 17 00:00:00 2001
+From: yinyongkang <yinyongkang@kylinos.cn>
+Date: Thu, 8 Sep 2022 17:14:11 +0800
+Subject: PATCH Replace a run-time assertion failure with a warning message
+ when parsing corrupt...
+
+PR 29289
+* dwarf.c (display_debug_names): Replace assert with a warning
+message.
+---
+ binutils/dwarf.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/binutils/dwarf.c b/binutils/dwarf.c
+index 1e7f4db7..7c54820a 100644
+--- a/binutils/dwarf.c
++++ b/binutils/dwarf.c
+@@ -9781,7 +9781,12 @@ display_debug_names (struct dwarf_section *section, void *file)
+       printf (_("Out of %lu items there are %zu bucket clashes"
+ 		" (longest of %zu entries).\n"),
+ 	      (unsigned long) name_count, hash_clash_count, longest_clash);
+-      assert (name_count == buckets_filled + hash_clash_count);
++         
++      if (name_count != buckets_filled + hash_clash_count)
++        warn (_("The name_count (%lu) is not the same as the used bucket_count (%lu) + the hash clash count (%lu)"),
++              (unsigned long) name_count,
++              (unsigned long) buckets_filled,
++              (unsigned long) hash_clash_count);
+ 
+       struct abbrev_lookup_entry
+       {
+-- 
+2.33.0
+

_service:tar_scm:backport-PR28186-SEGV-elf.c-7991-30-in-_bfd_elf_fixup_group_sections.patch Added

@@ -0,0 +1,32 @@
+From d86cf1b0d5ac6c0d900ae2b2a07fce7c4414d0e6 Mon Sep 17 00:00:00 2001
+From: Alan Modra <amodra@gmail.com>
+Date: Sat, 7 Aug 2021 14:10:38 +0930
+Subject: PATCH PR28186, SEGV elf.c:7991:30 in _bfd_elf_fixup_group_sections
+
+	PR 28186
+	* elf.c (_bfd_elf_fixup_group_sections): Don't segfault on
+	objcopy/strip with NULL output_section.
+
+(cherry picked from commit 182ad37589e3931390d0c43f1d52a9a6e0062a61)
+Reference:https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=d86cf1b0d5ac6c0d900ae2b2a07fce7c4414d0e6
+Conflict:NA
+---
+ bfd/elf.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/bfd/elf.c b/bfd/elf.c
+index de5abafabf0..9c3f34c415b 100644
+--- a/bfd/elf.c
++++ b/bfd/elf.c
+@@ -7984,7 +7984,7 @@ _bfd_elf_fixup_group_sections (bfd *ibfd, asection *discarded)
+ 		    isec->flags |= SEC_EXCLUDE;
+ 		  }
+ 	      }
+-	    else
++	    else if (isec->output_section != NULL)
+ 	      {
+ 		/* Adjust the output section size when called from
+ 		   objcopy. */
+-- 
+2.23.0
+

_service:tar_scm:backport-PR28422-build_id-use-after-free.patch Added

@@ -0,0 +1,33 @@
+From c20c7adbeaa3af18a58ba1e20e6c33e7186356e3 Mon Sep 17 00:00:00 2001
+From: Alan Modra <amodra@gmail.com>
+Date: Wed, 6 Oct 2021 18:28:47 +1030
+Subject: PATCH PR28422, build_id use-after-free
+
+This fixes a bug in commit 5d9bbb73c1df.  All fields preserved from a
+bfd in struct bfd_preserve need to be cleared in bfd_reinit.
+
+	PR 28422
+	* format.c (bfd_reinit): Clear build_id.
+
+(cherry picked from commit 6d661cdc5be46e890ed9255e749806f46a88e26c)
+Reference:https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=c20c7adbeaa3af18a58ba1e20e6c33e7186356e3
+Conflict:NA
+---
+ bfd/format.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/bfd/format.c b/bfd/format.c
+index 5d08d1d642c..408c984690e 100644
+--- a/bfd/format.c
++++ b/bfd/format.c
+@@ -151,6 +151,7 @@ bfd_reinit (bfd *abfd, unsigned int section_id, bfd_cleanup cleanup)
+   abfd->tdata.any = NULL;
+   abfd->arch_info = &bfd_default_arch_struct;
+   abfd->flags &= BFD_FLAGS_SAVED;
++  abfd->build_id = NULL;
+   bfd_section_list_clear (abfd);
+ }
+ 
+-- 
+2.23.0
+

_service:tar_scm:backport-PR28540-segmentation-fault-on-NULL-byte_get.patch Added

@@ -0,0 +1,32 @@
+From 96eb21265ebffbc28f767bed9a2b7650ecb9818d Mon Sep 17 00:00:00 2001
+From: Alan Modra <amodra@gmail.com>
+Date: Thu, 4 Nov 2021 14:11:02 +1030
+Subject: PATCH PR28540, segmentation fault on NULL byte_get
+
+	PR 28540
+	* objdump.c (dump_bfd): Don't attempt load_separate_debug_files
+	when byte_get is NULL.
+
+(cherry picked from commit f2f105f518413ea3e4c212f89585f9a8a5dddcdd)
+Reference:https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=96eb21265ebffbc28f767bed9a2b7650ecb9818d
+Conflict:NA
+---
+ binutils/objdump.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/binutils/objdump.c b/binutils/objdump.c
+index a7b8303b992..50317b3d48f 100644
+--- a/binutils/objdump.c
++++ b/binutils/objdump.c
+@@ -4869,7 +4869,7 @@ dump_bfd (bfd *abfd, bool is_mainfile)
+      
+      The test on is_mainfile is there because the chain of separate debug
+      info files is a global variable shared by all invocations of dump_bfd.  */
+-  if (is_mainfile)
++  if (byte_get != NULL && is_mainfile)
+     {
+       load_separate_debug_files (abfd, bfd_get_filename (abfd));
+ 
+-- 
+2.23.0
+

_service:tar_scm:backport-don-t-over-align-file-positions-of-PE-executable-sec.patch Added

@@ -0,0 +1,111 @@
+From 5bb067dba365e713bf988a06f7ed1c352aab52c4 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 19 May 2022 12:43:10 +0200
+Subject: PATCH 3/3 don't over-align file positions of PE executable sections
+
+When a sufficiently small alignment was specified via --file-alignment,
+individual section alignment shouldn't affect placement within the file.
+This involves first of all clearing D_PAGED for images when section and
+file alignment together don't permit paging of the image. The involved
+comparison against COFF_PAGE_SIZE in turn helped point out (through a
+compiler warning) that 'page_size' should be of unsigned type (as in
+particular FileAlignment is). This yet in turn pointed out a dubious
+error condition (which is being deleted).
+
+For the D_PAGED case I think the enforced file alignment may still be
+too high, but I'm wary of changing that logic without knowing of
+possible corner cases.
+
+Furthermore file positions in PE should be independent of the alignment
+recorded in section headers anyway. Otherwise there are e.g. anomalies
+following commit 6f8f6017a0c4 ("PR27567, Linking PE files adds alignment
+section flags to executables") in that linking would use information a
+subsequent processing step (e.g. stripping) wouldn't have available
+anymore, and hence a binary could change in that 2nd step for no actual
+reason. (Similarly stripping a binary linked with a linker pre-dating
+that commit would change the binary again when stripping it a 2nd time.)
+
+References: bsn#351
+Signed-off-by: Chenxi Mao <chenxi.mao@suse.com>
+---
+ bfd/coffcode.h | 29 ++++++++++++++---------------
+ 1 file changed, 14 insertions(+), 15 deletions(-)
+
+diff --git a/bfd/coffcode.h b/bfd/coffcode.h
+index a5a4979f..d222c88d 100644
+--- a/bfd/coffcode.h
++++ b/bfd/coffcode.h
+@@ -2952,7 +2952,7 @@ coff_compute_section_file_positions (bfd * abfd)
+ #endif
+ 
+ #ifdef COFF_IMAGE_WITH_PE
+-  int page_size;
++  unsigned int page_size;
+ 
+   if (coff_data (abfd)->link_info
+       || (pe_data (abfd) && pe_data (abfd)->pe_opthdr.FileAlignment))
+@@ -2963,22 +2963,12 @@ coff_compute_section_file_positions (bfd * abfd)
+ 	 This repairs 'ld -r' for arm-wince-pe target.  */
+       if (page_size == 0)
+ 	page_size = 1;
+-
+-      /* PR 17512: file: 0ac816d3.  */
+-      if (page_size < 0)
+-	{
+-	  bfd_set_error (bfd_error_file_too_big);
+-	  _bfd_error_handler
+-	    /* xgettext:c-format */
+-	    (_("%pB: page size is too large (0x%x)"), abfd, page_size);
+-	  return false;
+-	}
+     }
+   else
+     page_size = PE_DEF_FILE_ALIGNMENT;
+ #else
+ #ifdef COFF_PAGE_SIZE
+-  int page_size = COFF_PAGE_SIZE;
++  unsigned int page_size = COFF_PAGE_SIZE;
+ #endif
+ #endif
+ 
+@@ -3060,9 +3050,10 @@ coff_compute_section_file_positions (bfd * abfd)
+     bfd_size_type amt;
+ 
+ #ifdef COFF_PAGE_SIZE
+-    /* Clear D_PAGED if section alignment is smaller than
+-       COFF_PAGE_SIZE.  */
+-   if (pe_data (abfd)->pe_opthdr.SectionAlignment < COFF_PAGE_SIZE)
++    /* Clear D_PAGED if section / file alignment aren't suitable for
++       paging at COFF_PAGE_SIZE granularity.  */
++   if (pe_data (abfd)->pe_opthdr.SectionAlignment < COFF_PAGE_SIZE
++       || page_size < COFF_PAGE_SIZE)
+      abfd->flags &= ~D_PAGED;
+ #endif
+ 
+@@ -3183,7 +3174,11 @@ coff_compute_section_file_positions (bfd * abfd)
+ 	     padding the previous section up if necessary.  */
+ 	  old_sofar = sofar;
+ 
++#ifdef COFF_IMAGE_WITH_PE
++	  sofar = BFD_ALIGN (sofar, page_size);
++#else
+ 	  sofar = BFD_ALIGN (sofar, 1 << current->alignment_power);
++#endif
+ 
+ #ifdef RS6000COFF_C
+ 	  /* Make sure the file offset and the vma of .text/.data are at the
+@@ -3259,7 +3254,11 @@ coff_compute_section_file_positions (bfd * abfd)
+       else
+ 	{
+ 	  old_sofar = sofar;
++#ifdef COFF_IMAGE_WITH_PE
++	  sofar = BFD_ALIGN (sofar, page_size);
++#else
+ 	  sofar = BFD_ALIGN (sofar, 1 << current->alignment_power);
++#endif
+ 	  align_adjust = sofar != old_sofar;
+ 	  current->size += sofar - old_sofar;
+ 	}
+-- 
+2.30.2
+

_service:tar_scm:bfd-Close-the-file-descriptor-if-there-is-no-archive.patch Added

@@ -0,0 +1,234 @@
+From 1c611b40e6bfc8029bff7696814330b5bc0ee5c0 Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Mon, 26 Jul 2021 05:59:55 -0700
+Subject: PATCH bfd: Close the file descriptor if there is no archive fd
+
+Close the file descriptor if there is no archive plugin file descriptor
+to avoid running out of file descriptors on thin archives with many
+archive members.
+
+bfd/
+
+	PR ld/28138
+	* plugin.c (bfd_plugin_close_file_descriptor): Close the file
+	descriptor there is no archive plugin file descriptor.
+
+ld/
+
+	PR ld/28138
+	* testsuite/ld-plugin/lto.exp: Run tmpdir/pr28138 only for
+	native build.
+
+	PR ld/28138
+	* testsuite/ld-plugin/lto.exp: Run ld/28138 tests.
+	* testsuite/ld-plugin/pr28138.c: New file.
+	* testsuite/ld-plugin/pr28138-1.c: Likewise.
+	* testsuite/ld-plugin/pr28138-2.c: Likewise.
+	* testsuite/ld-plugin/pr28138-3.c: Likewise.
+	* testsuite/ld-plugin/pr28138-4.c: Likewise.
+	* testsuite/ld-plugin/pr28138-5.c: Likewise.
+	* testsuite/ld-plugin/pr28138-6.c: Likewise.
+	* testsuite/ld-plugin/pr28138-7.c: Likewise.
+
+(cherry picked from commit 5a98fb7513b559e20dfebdbaa2a471afda3b4742)
+(cherry picked from commit 7dc37e1e1209c80e0bab784df6b6bac335e836f2)
+
+Signed-off-by: Kai Liu <kai.liu@suse.com>
+---
+ bfd/plugin.c                       |  8 +++++++
+ ld/testsuite/ld-plugin/lto.exp     | 34 ++++++++++++++++++++++++++++++
+ ld/testsuite/ld-plugin/pr28138-1.c |  6 ++++++
+ ld/testsuite/ld-plugin/pr28138-2.c |  6 ++++++
+ ld/testsuite/ld-plugin/pr28138-3.c |  6 ++++++
+ ld/testsuite/ld-plugin/pr28138-4.c |  6 ++++++
+ ld/testsuite/ld-plugin/pr28138-5.c |  6 ++++++
+ ld/testsuite/ld-plugin/pr28138-6.c |  6 ++++++
+ ld/testsuite/ld-plugin/pr28138-7.c |  6 ++++++
+ ld/testsuite/ld-plugin/pr28138.c   | 20 ++++++++++++++++++
+ 10 files changed, 104 insertions(+)
+ create mode 100644 ld/testsuite/ld-plugin/pr28138-1.c
+ create mode 100644 ld/testsuite/ld-plugin/pr28138-2.c
+ create mode 100644 ld/testsuite/ld-plugin/pr28138-3.c
+ create mode 100644 ld/testsuite/ld-plugin/pr28138-4.c
+ create mode 100644 ld/testsuite/ld-plugin/pr28138-5.c
+ create mode 100644 ld/testsuite/ld-plugin/pr28138-6.c
+ create mode 100644 ld/testsuite/ld-plugin/pr28138-7.c
+ create mode 100644 ld/testsuite/ld-plugin/pr28138.c
+
+diff --git a/bfd/plugin.c b/bfd/plugin.c
+index 6cfa2b66470..3bab8febe88 100644
+--- a/bfd/plugin.c
++++ b/bfd/plugin.c
+@@ -291,6 +291,14 @@ bfd_plugin_close_file_descriptor (bfd *abfd, int fd)
+ 	     && !bfd_is_thin_archive (abfd->my_archive))
+ 	abfd = abfd->my_archive;
+ 
++      /* Close the file descriptor if there is no archive plugin file
++	 descriptor.  */
++      if (abfd->archive_plugin_fd == -1)
++	{
++	  close (fd);
++	  return;
++	}
++
+       abfd->archive_plugin_fd_open_count--;
+       /* Dup the archive plugin file descriptor for later use, which
+ 	 will be closed by _bfd_archive_close_and_cleanup.  */
+diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
+index def69e43ab3..999d911ce6a 100644
+--- a/ld/testsuite/ld-plugin/lto.exp
++++ b/ld/testsuite/ld-plugin/lto.exp
+@@ -687,6 +687,40 @@ if { is_elf_format && check_lto_shared_available } {
+     }
+ }
+ 
++run_cc_link_tests list \
++    list \
++	"Build pr28138.a" \
++	"-T" "" \
++	{pr28138-1.c pr28138-2.c pr28138-3.c pr28138-4.c pr28138-5.c \
++	 pr28138-6.c pr28138-7.c} {} "pr28138.a" \
++     \
++    list \
++	"Build pr28138.o" \
++	"" "" \
++	{pr28138.c} {} \
++     \
++
++
++set exec_output run_host_cmd "sh" \
++			      "-c \"ulimit -n 20; \
++			      $CC -Btmpdir/ld -o tmpdir/pr28138 \
++			      tmpdir/pr28138.o tmpdir/pr28138.a\""
++set exec_output prune_warnings $exec_output
++if string match "" $exec_output then {
++    if { isnative } {
++	set exec_output run_host_cmd "tmpdir/pr28138" ""
++	if string match "PASS" $exec_output then {
++	    pass "PR ld/28138"
++	} else {
++	    fail "PR ld/28138"
++	}
++    } else {
++	pass "PR ld/28138"
++    }
++} else {
++    fail "PR ld/28138"
++}
++
+ set testname "Build liblto-11.a"
+ remote_file host delete "tmpdir/liblto-11.a"
+ set catch_output run_host_cmd "$ar" "rc $plug_opt tmpdir/liblto-11.a tmpdir/lto-11a.o tmpdir/lto-11b.o tmpdir/lto-11c.o"
+diff --git a/ld/testsuite/ld-plugin/pr28138-1.c b/ld/testsuite/ld-plugin/pr28138-1.c
+new file mode 100644
+index 00000000000..51d119e1642
+--- /dev/null
++++ b/ld/testsuite/ld-plugin/pr28138-1.c
+@@ -0,0 +1,6 @@
++extern int a0(void);
++int
++a1(void)
++{
++  return 1 + a0();
++}
+diff --git a/ld/testsuite/ld-plugin/pr28138-2.c b/ld/testsuite/ld-plugin/pr28138-2.c
+new file mode 100644
+index 00000000000..1120cd797e9
+--- /dev/null
++++ b/ld/testsuite/ld-plugin/pr28138-2.c
+@@ -0,0 +1,6 @@
++extern int a1(void);
++int
++a2(void)
++{
++  return 1 + a1();
++}
+diff --git a/ld/testsuite/ld-plugin/pr28138-3.c b/ld/testsuite/ld-plugin/pr28138-3.c
+new file mode 100644
+index 00000000000..ec464947ee6
+--- /dev/null
++++ b/ld/testsuite/ld-plugin/pr28138-3.c
+@@ -0,0 +1,6 @@
++extern int a2(void);
++int
++a3(void)
++{
++  return 1 + a2();
++}
+diff --git a/ld/testsuite/ld-plugin/pr28138-4.c b/ld/testsuite/ld-plugin/pr28138-4.c
+new file mode 100644
+index 00000000000..475701b2c5c
+--- /dev/null
++++ b/ld/testsuite/ld-plugin/pr28138-4.c
+@@ -0,0 +1,6 @@
++extern int a3(void);
++int
++a4(void)
++{
++  return 1 + a3();
++}
+diff --git a/ld/testsuite/ld-plugin/pr28138-5.c b/ld/testsuite/ld-plugin/pr28138-5.c
+new file mode 100644
+index 00000000000..e24f86c363e
+--- /dev/null
++++ b/ld/testsuite/ld-plugin/pr28138-5.c
+@@ -0,0 +1,6 @@
++extern int a4(void);
++int
++a5(void)
++{
++  return 1 + a4();
++}
+diff --git a/ld/testsuite/ld-plugin/pr28138-6.c b/ld/testsuite/ld-plugin/pr28138-6.c
+new file mode 100644
+index 00000000000..b5b938bdb21
+--- /dev/null
++++ b/ld/testsuite/ld-plugin/pr28138-6.c
+@@ -0,0 +1,6 @@
++extern int a5(void);
++int
++a6(void)
++{
++  return 1 + a5();
++}
+diff --git a/ld/testsuite/ld-plugin/pr28138-7.c b/ld/testsuite/ld-plugin/pr28138-7.c
+new file mode 100644
+index 00000000000..4ef75bf0f0c
+--- /dev/null
++++ b/ld/testsuite/ld-plugin/pr28138-7.c
+@@ -0,0 +1,6 @@

_service:tar_scm:binutils-2.20.51.0.2-libtool-lib64.patch Added

@@ -0,0 +1,236 @@
+diff -rcp ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure
+--- a/bfd/configure	2010-04-08 14:53:48.000000000 +0100
++++ b/bfd/configure	2010-04-08 14:56:50.000000000 +0100
+@@ -10762,10 +10762,34 @@
+   # before this can be enabled.
+   hardcode_into_libs=yes
+ 
++  # find out which ABI we are using
++  libsuff=
++  case "$host_cpu" in
++  x86_64*|s390*|powerpc*|ppc*|sparc*)
++    echo 'int i;' > conftest.$ac_ext
++    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
++  (eval $ac_compile) 2>&5
++  ac_status=$?
++  echo "$as_me:$LINENO: \$? = $ac_status" >&5
++  (exit $ac_status); }; then
++      case `/usr/bin/file conftest.$ac_objext` in
++      *64-bit*)
++        libsuff=64
++        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
++          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
++        fi
++        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
++        ;;
++      esac
++    fi
++    rm -rf conftest*
++    ;;
++  esac
++
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
+-    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
++    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
+   fi
+ 
+   # We used to test for /lib/ld.so.1 and disable shared libraries on
+diff -rcp ../binutils-2.20.51.0.7.original/binutils/configure ./binutils/configure
+--- a/binutils/configure	2010-04-08 14:53:45.000000000 +0100
++++ b/binutils/configure	2010-04-08 14:56:21.000000000 +0100
+@@ -10560,10 +10560,34 @@
+   # before this can be enabled.
+   hardcode_into_libs=yes
+ 
++  # find out which ABI we are using
++  libsuff=
++  case "$host_cpu" in
++  x86_64*|s390*|powerpc*|ppc*|sparc*)
++    echo 'int i;' > conftest.$ac_ext
++    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
++  (eval $ac_compile) 2>&5
++  ac_status=$?
++  echo "$as_me:$LINENO: \$? = $ac_status" >&5
++  (exit $ac_status); }; then
++      case `/usr/bin/file conftest.$ac_objext` in
++      *64-bit*)
++        libsuff=64
++        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
++          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
++        fi
++        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
++        ;;
++      esac
++    fi
++    rm -rf conftest*
++    ;;
++  esac
++
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
+-    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
++    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
+   fi
+ 
+   # We used to test for /lib/ld.so.1 and disable shared libraries on
+diff -rcp ../binutils-2.20.51.0.7.original/gas/configure ./gas/configure
+--- a/gas/configure	2010-04-08 14:53:47.000000000 +0100
++++ b/gas/configure	2010-04-08 14:57:24.000000000 +0100
+@@ -10547,10 +10547,34 @@
+   # before this can be enabled.
+   hardcode_into_libs=yes
+ 
++  # find out which ABI we are using
++  libsuff=
++  case "$host_cpu" in
++  x86_64*|s390*|powerpc*|ppc*|sparc*)
++    echo 'int i;' > conftest.$ac_ext
++    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
++  (eval $ac_compile) 2>&5
++  ac_status=$?
++  echo "$as_me:$LINENO: \$? = $ac_status" >&5
++  (exit $ac_status); }; then
++      case `/usr/bin/file conftest.$ac_objext` in
++      *64-bit*)
++        libsuff=64
++        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
++          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
++        fi
++        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
++        ;;
++      esac
++    fi
++    rm -rf conftest*
++    ;;
++  esac
++
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
+-    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
++    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
+   fi
+ 
+   # We used to test for /lib/ld.so.1 and disable shared libraries on
+diff -rcp ../binutils-2.20.51.0.7.original/gprof/configure ./gprof/configure
+--- a/gprof/configure	2010-04-08 14:53:45.000000000 +0100
++++ b/gprof/configure	2010-04-08 14:57:50.000000000 +0100
+@@ -10485,10 +10485,34 @@
+   # before this can be enabled.
+   hardcode_into_libs=yes
+ 
++  # find out which ABI we are using
++  libsuff=
++  case "$host_cpu" in
++  x86_64*|s390*|powerpc*|ppc*|sparc*)
++    echo 'int i;' > conftest.$ac_ext
++    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
++  (eval $ac_compile) 2>&5
++  ac_status=$?
++  echo "$as_me:$LINENO: \$? = $ac_status" >&5
++  (exit $ac_status); }; then
++      case `/usr/bin/file conftest.$ac_objext` in
++      *64-bit*)
++        libsuff=64
++        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
++          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
++        fi
++        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
++        ;;
++      esac
++    fi
++    rm -rf conftest*
++    ;;
++  esac
++
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
+-    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
++    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
+   fi
+ 
+   # We used to test for /lib/ld.so.1 and disable shared libraries on
+diff -rcp ../binutils-2.20.51.0.7.original/ld/configure ./ld/configure
+--- a/ld/configure	2010-04-08 14:53:44.000000000 +0100
++++ b/ld/configure	2010-04-08 14:58:21.000000000 +0100
+@@ -10966,10 +10966,34 @@
+   # before this can be enabled.
+   hardcode_into_libs=yes
+ 
++  # find out which ABI we are using
++  libsuff=
++  case "$host_cpu" in
++  x86_64*|s390*|powerpc*|ppc*|sparc*)
++    echo 'int i;' > conftest.$ac_ext
++    if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
++  (eval $ac_compile) 2>&5
++  ac_status=$?
++  echo "$as_me:$LINENO: \$? = $ac_status" >&5
++  (exit $ac_status); }; then
++      case `/usr/bin/file conftest.$ac_objext` in
++      *64-bit*)
++        libsuff=64
++        if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
++          sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
++        fi
++        sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
++        ;;
++      esac
++    fi
++    rm -rf conftest*
++    ;;
++  esac
++
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+     lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^	 *hwcap	 /d;s/:,	/ /g;s/=^=*$//;s/=^= * / /g;s/"//g;/^$/d' | tr '\n' ' '`
+-    sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
++    sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
+   fi
+ 
+   # We used to test for /lib/ld.so.1 and disable shared libraries on
+Only in .: .#libtool.m4
+Only in .: #libtool.m4#
+diff -rcp ../binutils-2.20.51.0.7.original/opcodes/configure ./opcodes/configure
+--- a/opcodes/configure	2010-04-08 14:53:45.000000000 +0100

_service:tar_scm:binutils-2.22.52.0.4-no-config-h-check.patch Added

_service:tar_scm:binutils-2.27-aarch64-ifunc.patch Added

_service:tar_scm:binutils-AArch64-EFI.patch Added

@@ -0,0 +1,944 @@
+diff -rup binutils.orig/bfd/.gitignore binutils-2.37/bfd/.gitignore
+--- binutils.orig/bfd/.gitignore	2021-12-01 13:35:33.826078119 +0000
++++ binutils-2.37/bfd/.gitignore	2021-12-01 13:35:43.138988270 +0000
+@@ -10,6 +10,7 @@
+ /peigen.c
+ /pepigen.c
+ /pex64igen.c
++/pe-aarch64igen.c
+ /stmp-bfd-h
+ /targmatch.h
+ 
+diff -rup binutils.orig/bfd/Makefile.am binutils-2.37/bfd/Makefile.am
+--- binutils.orig/bfd/Makefile.am	2021-12-01 13:35:33.817078206 +0000
++++ binutils-2.37/bfd/Makefile.am	2021-12-01 13:35:43.139988261 +0000
+@@ -567,7 +567,9 @@ BFD64_BACKENDS = \
+ 	mach-o-aarch64.lo \
+ 	mach-o-x86-64.lo \
+ 	mmo.lo \
++	pe-aarch64igen.lo \
+ 	pe-x86_64.lo \
++	pei-aarch64lo \
+ 	pei-ia64.lo \
+ 	pei-x86_64.lo \
+ 	pepigen.lo \
+@@ -607,6 +609,7 @@ BFD64_BACKENDS_CFILES = \
+ 	mach-o-x86-64.c \
+ 	mmo.c \
+ 	pe-x86_64.c \
++	pei-aarch64.c \
+ 	pei-ia64.c \
+ 	pei-x86_64.c \
+ 	vms-alpha.c
+@@ -666,7 +669,7 @@ BUILD_CFILES = \
+ 	elf32-aarch64.c elf64-aarch64.c \
+ 	elf32-ia64.c elf64-ia64.c \
+ 	elf32-riscv.c elf64-riscv.c \
+-	peigen.c pepigen.c pex64igen.c
++	peigen.c pepigen.c pex64igen.c pe-aarch64igen.c
+ 
+ CFILES = $(SOURCE_CFILES) $(BUILD_CFILES)
+ 
+@@ -862,6 +865,10 @@ pex64igen.c: peXXigen.c
+ 	echo "#line 1 \"peXXigen.c\"" > $@
+ 	$(SED) -e s/XX/pex64/g < $< >> $@
+ 
++pe-aarch64igen.c: peXXigen.c
++	echo "#line 1 \"peXXigen.c\"" > $@
++	$(SED) -e s/XX/peAArch64/g < $< >> $@
++
+ BFD_H_DEPS= $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
+ LOCAL_H_DEPS= libbfd.h sysdep.h config.h
+ $(BFD32_LIBS) \
+diff -rup binutils.orig/bfd/Makefile.in binutils-2.37/bfd/Makefile.in
+--- binutils.orig/bfd/Makefile.in	2021-12-01 13:35:33.823078148 +0000
++++ binutils-2.37/bfd/Makefile.in	2021-12-01 13:35:43.139988261 +0000
+@@ -994,7 +994,9 @@ BFD64_BACKENDS = \
+ 	mach-o-aarch64.lo \
+ 	mach-o-x86-64.lo \
+ 	mmo.lo \
++	pe-aarch64igen.lo \
+ 	pe-x86_64.lo \
++	pei-aarch64.lo \
+ 	pei-ia64.lo \
+ 	pei-x86_64.lo \
+ 	pepigen.lo \
+@@ -1034,6 +1036,7 @@ BFD64_BACKENDS_CFILES = \
+ 	mach-o-x86-64.c \
+ 	mmo.c \
+ 	pe-x86_64.c \
++	pei-aarch64.c \
+ 	pei-ia64.c \
+ 	pei-x86_64.c \
+ 	vms-alpha.c
+@@ -1092,7 +1095,7 @@ BUILD_CFILES = \
+ 	elf32-aarch64.c elf64-aarch64.c \
+ 	elf32-ia64.c elf64-ia64.c \
+ 	elf32-riscv.c elf64-riscv.c \
+-	peigen.c pepigen.c pex64igen.c
++	peigen.c pepigen.c pex64igen.c pe-aarch64igen.c
+ 
+ CFILES = $(SOURCE_CFILES) $(BUILD_CFILES)
+ SOURCE_HFILES = \
+@@ -1551,9 +1554,11 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-mcore.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-sh.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-x86_64.Plo@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-aarch64.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/peigen.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pepigen.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pex64igen.Plo@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-aarch64igen.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/plugin.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ppcboot.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/reloc.Plo@am__quote@
+@@ -1991,6 +1996,11 @@ pepigen.c : peXXigen.c
+ pex64igen.c: peXXigen.c
+ 	echo "#line 1 \"peXXigen.c\"" > $@
+ 	$(SED) -e s/XX/pex64/g < $< >> $@
++
++pe-aarch64igen.c: peXXigen.c
++	echo "#line 1 \"peXXigen.c\"" > $@
++	$(SED) -e s/XX/peAArch64/g < $< >> $@
++
+ $(BFD32_LIBS) \
+  $(BFD64_LIBS) \
+  $(ALL_MACHINES) \
+diff -rup binutils.orig/bfd/bfd.c binutils-2.37/bfd/bfd.c
+--- binutils.orig/bfd/bfd.c	2021-12-01 13:35:33.821078167 +0000
++++ binutils-2.37/bfd/bfd.c	2021-12-01 13:35:43.139988261 +0000
+@@ -1735,6 +1735,7 @@ bfd_get_sign_extend_vma (bfd *abfd)
+       || strcmp (name, "pei-i386") == 0
+       || strcmp (name, "pe-x86-64") == 0
+       || strcmp (name, "pei-x86-64") == 0
++      || strcmp (name, "pei-aarch64-little") == 0
+       || strcmp (name, "pe-arm-wince-little") == 0
+       || strcmp (name, "pei-arm-wince-little") == 0
+       || strcmp (name, "aixcoff-rs6000") == 0
+Only in binutils-2.37/bfd: coff-aarch64.c
+diff -rup binutils.orig/bfd/coffcode.h binutils-2.37/bfd/coffcode.h
+--- binutils.orig/bfd/coffcode.h	2021-12-01 13:35:33.822078158 +0000
++++ binutils-2.37/bfd/coffcode.h	2021-12-01 13:35:43.140988251 +0000
+@@ -2215,6 +2215,12 @@ coff_set_arch_mach_hook (bfd *abfd, void
+ 	}
+       break;
+ #endif
++#ifdef AARCH64MAGIC
++    case AARCH64MAGIC:
++      arch = bfd_arch_aarch64;
++      machine = internal_f->f_flags & F_AARCH64_ARCHITECTURE_MASK;
++      break;
++#endif
+ #ifdef Z80MAGIC
+     case Z80MAGIC:
+       arch = bfd_arch_z80;
+@@ -2771,6 +2777,12 @@ coff_set_flags (bfd * abfd,
+       return true;
+ #endif
+ 
++#ifdef AARCH64MAGIC
++    case bfd_arch_aarch64:
++      * magicp = AARCH64MAGIC;
++      return true;
++#endif
++
+ #ifdef ARMMAGIC
+     case bfd_arch_arm:
+ #ifdef ARM_WINCE
+@@ -3866,7 +3878,7 @@ coff_write_object_contents (bfd * abfd)
+     internal_f.f_flags |= IMAGE_FILE_LARGE_ADDRESS_AWARE;
+ #endif
+ 
+-#ifndef COFF_WITH_pex64
++#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
+ #ifdef COFF_WITH_PE
+   internal_f.f_flags |= IMAGE_FILE_32BIT_MACHINE;
+ #else
+@@ -3914,6 +3926,11 @@ coff_write_object_contents (bfd * abfd)
+ #define __A_MAGIC_SET__
+     internal_a.magic = ZMAGIC;
+ #endif
++
++#if defined(AARCH64)
++#define __A_MAGIC_SET__
++    internal_a.magic = ZMAGIC;
++#endif
+ 
+ #if defined MCORE_PE
+ #define __A_MAGIC_SET__
+diff -rup binutils.orig/bfd/config.bfd binutils-2.37/bfd/config.bfd
+--- binutils.orig/bfd/config.bfd	2021-12-01 13:35:33.833078051 +0000
++++ binutils-2.37/bfd/config.bfd	2021-12-01 13:35:43.140988251 +0000
+@@ -232,7 +232,7 @@ case "${targ}" in
+     ;;
+   aarch64-*-elf | aarch64-*-rtems* | aarch64-*-genode*)
+     targ_defvec=aarch64_elf64_le_vec
+-    targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
++    targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_vec"
+     want64=true
+     ;;
+   aarch64_be-*-elf)
+@@ -257,7 +257,7 @@ case "${targ}" in
+     ;;
+   aarch64-*-linux* | aarch64-*-netbsd*)
+     targ_defvec=aarch64_elf64_le_vec
+-    targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
++    targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_vec"
+     want64=true
+     ;;
+   aarch64_be-*-linux* | aarch64_be-*-netbsd*)
+diff -rup binutils.orig/bfd/configure binutils-2.37/bfd/configure
+--- binutils.orig/bfd/configure	2021-12-01 13:35:33.817078206 +0000
++++ binutils-2.37/bfd/configure	2021-12-01 13:35:43.141988241 +0000
+@@ -13283,6 +13283,7 @@ do
+     aarch64_elf64_le_vec)	   tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
+     aarch64_elf64_le_cloudabi_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
+     aarch64_mach_o_vec)		 tb="$tb mach-o-aarch64.lo"; target_size=64 ;;
++    aarch64_pei_vec)		 tb="$tb pei-aarch64.lo pe-aarch64igen.lo $coff"; target_size=64 ;;
+     alpha_ecoff_le_vec)		 tb="$tb coff-alpha.lo ecoff.lo $ecoff"; target_size=64 ;;
+     alpha_elf64_vec)		 tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;

_service:tar_scm:export-demangle.h-in-devel-package.patch Added

@@ -0,0 +1,48 @@
+From 85f7739c1c9cfcd143b4192204246f4fe5dafeed Mon Sep 17 00:00:00 2001
+From: openEuler Buildteam <buildteam@openeuler.org>
+Date: Sat, 11 Jan 2020 13:34:40 +0800
+Subject: PATCH export demangle.h in devel package
+
+---
+ bfd/Makefile.am | 2 +-
+ bfd/Makefile.in | 4 ++--
+ 2 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/bfd/Makefile.am b/bfd/Makefile.am
+index 6a39ef5..ddc3b54 100644
+--- a/bfd/Makefile.am
++++ b/bfd/Makefile.am
+@@ -33,7 +33,7 @@ bfdlibdir = @bfdlibdir@
+ bfdincludedir = @bfdincludedir@
+ bfdlib_LTLIBRARIES = libbfd.la
+ bfdinclude_HEADERS = $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+-		     $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
++		     $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
+ else !INSTALL_LIBBFD
+ # Empty these so that the respective installation directories will not be created.
+ bfdlibdir =
+diff --git a/bfd/Makefile.in b/bfd/Makefile.in
+index 80499d6..09a93b9 100644
+--- a/bfd/Makefile.in
++++ b/bfd/Makefile.in
+@@ -249,7 +249,7 @@ am__can_run_installinfo = \
+   esac
+ am__bfdinclude_HEADERS_DIST = $(INCDIR)/plugin-api.h bfd.h \
+ 	$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+-	$(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
++	$(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
+ HEADERS = $(bfdinclude_HEADERS)
+ RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive	\
+   distclean-recursive maintainer-clean-recursive
+@@ -468,7 +468,7 @@ libbfd_la_LDFLAGS = $(am__append_1) -release `cat libtool-soversion` \
+ @INSTALL_LIBBFD_FALSE@bfdinclude_HEADERS = $(am__append_2)
+ @INSTALL_LIBBFD_TRUE@bfdinclude_HEADERS = $(BFD_H) \
+ @INSTALL_LIBBFD_TRUE@	$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+-@INSTALL_LIBBFD_TRUE@	$(INCDIR)/diagnostics.h \
++@INSTALL_LIBBFD_TRUE@	$(INCDIR)/diagnostics.h $(INCDIR)/demangle.h \
+ @INSTALL_LIBBFD_TRUE@	$(INCDIR)/bfdlink.h $(am__append_2)
+ @INSTALL_LIBBFD_FALSE@rpath_bfdlibdir = @bfdlibdir@
+ @INSTALL_LIBBFD_FALSE@noinst_LTLIBRARIES = libbfd.la
+-- 
+1.8.3.1
+

_service Changed

_service:extract_file:binutils-2.37.tar.xz Deleted

_service:extract_file:binutils.yaml Deleted

_service:tar_scm:binutils-1650003181.cce51fc.tar -> _service:tar_scm:binutils-2.37.tar.xz Changed

_service:tar_scm:binutils.yaml Added