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Changes of Revision 17
View file
_service:tar_scm:gcc.spec
Changed
@@ -2,7 +2,7 @@ %global gcc_major 12 # Note, gcc_release must be integer, if you want to add suffixes to # %%{release}, append them after %%{gcc_release} on Release: line. -%global gcc_release 24 +%global gcc_release 26 %global _unpackaged_files_terminate_build 0 %global _performance_build 1 @@ -193,6 +193,10 @@ Patch53: 0053-struct-reorg-Add-Semi-Relayout.patch Patch54: 0054-Struct-Reorg-Bugfix-for-structure-pointer-compressio.patch Patch55: 0055-Struct-Reorg-Port-bugfixes-to-GCC-12.3.1.patch +Patch56: 0056-Fix-bug-that-verifying-gimple-failed-when-reorg-leve.patch +Patch57: 0057-AutoFdo-Fix-memory-leaks-in-autofdo.patch +Patch86: 0086-Modfify-cost-calculation-for-dealing-with-equivalenc.patch +Patch87: 0087-Add-cost-calculation-for-reg-equivalence-invariants.patch # Part 3000 ~ 4999 %ifarch loongarch64 @@ -847,6 +851,10 @@ %patch53 -p1 %patch54 -p1 %patch55 -p1 +%patch56 -p1 +%patch57 -p1 +%patch86 -p1 +%patch87 -p1 %ifarch loongarch64 %patch3001 -p1 @@ -3238,6 +3246,14 @@ %doc rpm.doc/changelogs/libcc1/ChangeLog* %changelog +* Fri Apr 26 2024 Zheng Chenhui <zhengchenhui1@huawei.com> - 12.3.1-26 +- Type: Revert +- DESC: Revert Intel patches. + +* Wed Apr 24 2024 Wang Ding <wangding16@huawei.com> - 12.3.1-25 +- Type: Sync +- DESC: Sync patch from openeuler/gcc + * Tue Apr 23 2024 laokz <zhangkai@iscas.ac.cn> - 12.3.1-24 - Type: SPEC - DESC: riscv64 enable libasan, libusan package
View file
_service:tar_scm:0056-Fix-bug-that-verifying-gimple-failed-when-reorg-leve.patch
Added
@@ -0,0 +1,27 @@ +From fa6f80044dcebd28506e871e6e5d25e2dfd7e105 Mon Sep 17 00:00:00 2001 +From: tiancheng-bao <baotiancheng1@huawei.com> +Date: Fri, 12 Apr 2024 15:09:28 +0800 +Subject: PATCH 01/32 Fix bug that verifying gimple failed when reorg-level > + 5 + +--- + gcc/ipa-struct-reorg/ipa-struct-reorg.cc | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/gcc/ipa-struct-reorg/ipa-struct-reorg.cc b/gcc/ipa-struct-reorg/ipa-struct-reorg.cc +index f03d1d875..e08577c0c 100644 +--- a/gcc/ipa-struct-reorg/ipa-struct-reorg.cc ++++ b/gcc/ipa-struct-reorg/ipa-struct-reorg.cc +@@ -7461,6 +7461,9 @@ ipa_struct_reorg::rewrite_assign (gassign *stmt, gimple_stmt_iterator *gsi) + continue; + tree lhs_expr = newlhsi ? newlhsi : lhs; + tree rhs_expr = newrhsi ? newrhsi : rhs; ++ if (!useless_type_conversion_p (TREE_TYPE (lhs_expr), ++ TREE_TYPE (rhs_expr))) ++ rhs_expr = gimplify_build1 (gsi, NOP_EXPR, TREE_TYPE (lhs_expr), rhs_expr); + gimple *newstmt = gimple_build_assign (lhs_expr, rhs_expr); + if (dump_file && (dump_flags & TDF_DETAILS)) + { +-- +2.28.0.windows.1 +
View file
_service:tar_scm:0057-AutoFdo-Fix-memory-leaks-in-autofdo.patch
Added
@@ -0,0 +1,90 @@ +From 13e82fccba781b29e55a6e1934986514019b728d Mon Sep 17 00:00:00 2001 +From: zhenyu--zhao <zhaozhenyu17@huawei.com> +Date: Sun, 24 Mar 2024 20:42:27 +0800 +Subject: PATCH 02/32 AutoFdo Fix memory leaks in autofdo + +--- + gcc/final.cc | 22 ++++++++++++++-------- + 1 file changed, 14 insertions(+), 8 deletions(-) + +diff --git a/gcc/final.cc b/gcc/final.cc +index d4c4fa08f..af4e529bb 100644 +--- a/gcc/final.cc ++++ b/gcc/final.cc +@@ -4402,12 +4402,15 @@ get_fdo_count_quality (profile_count count) + return profile_qualitycount.quality (); + } + +-static const char * ++/* If the function is not public, return the function_name/file_name for ++ disambiguation of local symbols since there could be identical function ++ names coming from identical file names. The caller needs to free memory. */ ++static char * + alias_local_functions (const char *fnname) + { + if (TREE_PUBLIC (cfun->decl)) + { +- return fnname; ++ return concat (fnname, NULL); + } + return concat (fnname, "/", lbasename (dump_base_name), NULL); + } +@@ -4457,12 +4460,13 @@ dump_direct_callee_info_to_asm (basic_block bb, gcov_type call_count) + + if (callee) + { ++ char *func_name = ++ alias_local_functions (get_fnname_from_decl (callee)); + fprintf (asm_out_file, "\t.string \"%x\"\n", + INSN_ADDRESSES (INSN_UID (insn))); + + fprintf (asm_out_file, "\t.string \"%s%s\"\n", +- ASM_FDO_CALLEE_FLAG, +- alias_local_functions (get_fnname_from_decl (callee))); ++ ASM_FDO_CALLEE_FLAG, func_name); + + fprintf (asm_out_file, + "\t.string \"" HOST_WIDE_INT_PRINT_DEC "\"\n", +@@ -4472,9 +4476,9 @@ dump_direct_callee_info_to_asm (basic_block bb, gcov_type call_count) + { + fprintf (dump_file, "call: %x --> %s \n", + INSN_ADDRESSES (INSN_UID (insn)), +- alias_local_functions +- (get_fnname_from_decl (callee))); ++ func_name); + } ++ free (func_name); + } + } + } +@@ -4547,8 +4551,9 @@ dump_bb_info_to_asm (basic_block bb, gcov_type bb_count) + static void + dump_function_info_to_asm (const char *fnname) + { ++ char *func_name = alias_local_functions (fnname); + fprintf (asm_out_file, "\t.string \"%s%s\"\n", +- ASM_FDO_CALLER_FLAG, alias_local_functions (fnname)); ++ ASM_FDO_CALLER_FLAG, func_name); + fprintf (asm_out_file, "\t.string \"%s%d\"\n", + ASM_FDO_CALLER_SIZE_FLAG, get_function_end_addr ()); + fprintf (asm_out_file, "\t.string \"%s%s\"\n", +@@ -4557,7 +4562,7 @@ dump_function_info_to_asm (const char *fnname) + if (dump_file) + { + fprintf (dump_file, "\n FUNC_NAME: %s\n", +- alias_local_functions (fnname)); ++ func_name); + fprintf (dump_file, " file: %s\n", + dump_base_name); + fprintf (dump_file, "profile_status: %s\n", +@@ -4567,6 +4572,7 @@ dump_function_info_to_asm (const char *fnname) + fprintf (dump_file, " function_bind: %s\n", + simple_get_function_bind ()); + } ++ free (func_name); + } + + /* Dump function profile into form AutoFDO or PGO to asm. */ +-- +2.28.0.windows.1 +
View file
_service:tar_scm:0086-Modfify-cost-calculation-for-dealing-with-equivalenc.patch
Added
@@ -0,0 +1,321 @@ +From c546aad5d38165e2962456525a0f6a427e03583b Mon Sep 17 00:00:00 2001 +From: "Vladimir N. Makarov" <vmakarov@redhat.com> +Date: Thu, 26 Oct 2023 09:50:40 -0400 +Subject: PATCH 31/32 Modfify cost calculation for dealing with equivalences + +RISCV target developers reported that pseudos with equivalence used in +a loop can be spilled. Simple changes of heuristics of cost +calculation of pseudos with equivalence or even ignoring equivalences +resulted in numerous testsuite failures on different targets or worse +spec2017 performance. This patch implements more sophisticated cost +calculations of pseudos with equivalences. The patch does not change +RA behaviour for targets still using the old reload pass instead of +LRA. The patch solves the reported problem and improves x86-64 +specint2017 a bit (specfp2017 performance stays the same). The patch +takes into account how the equivalence will be used: will it be +integrated into the user insns or require an input reload insn. It +requires additional pass over insns. To compensate RA slow down, the +patch removes a pass over insns in the reload pass used by IRA before. +This also decouples IRA from reload more and will help to remove the +reload pass in the future if it ever happens. + +gcc/ChangeLog: + + * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when + LRA is used. + * ira-costs.cc: Include regset.h. + (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains): + New functions. + (find_costs_and_classes): Call calculate_equiv_gains and redefine + mem_cost of pseudos with equivs when LRA is used. + * var-tracking.cc: Include ira.h and lra.h. + (vt_initialize): Use lra_eliminate_regs when LRA is used. +--- + gcc/dwarf2out.cc | 4 +- + gcc/ira-costs.cc | 169 ++++++++++++++++++++++++++++++++++++++++++-- + gcc/var-tracking.cc | 14 +++- + 3 files changed, 179 insertions(+), 8 deletions(-) + +diff --git a/gcc/dwarf2out.cc b/gcc/dwarf2out.cc +index 0a5c081d8..f0f6f4fd4 100644 +--- a/gcc/dwarf2out.cc ++++ b/gcc/dwarf2out.cc +@@ -14263,7 +14263,9 @@ reg_loc_descriptor (rtx rtl, enum var_init_status initialized) + argument pointer and soft frame pointer rtx's. + Use DW_OP_fbreg offset DW_OP_stack_value in this case. */ + if ((rtl == arg_pointer_rtx || rtl == frame_pointer_rtx) +- && eliminate_regs (rtl, VOIDmode, NULL_RTX) != rtl) ++ && (ira_use_lra_p ++ ? lra_eliminate_regs (rtl, VOIDmode, NULL_RTX) ++ : eliminate_regs (rtl, VOIDmode, NULL_RTX)) != rtl) + { + dw_loc_descr_ref result = NULL; + +diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc +index 642fda529..c79311783 100644 +--- a/gcc/ira-costs.cc ++++ b/gcc/ira-costs.cc +@@ -30,6 +30,7 @@ along with GCC; see the file COPYING3. If not see + #include "tm_p.h" + #include "insn-config.h" + #include "regs.h" ++#include "regset.h" + #include "ira.h" + #include "ira-int.h" + #include "addresses.h" +@@ -1750,6 +1751,145 @@ process_bb_node_for_costs (ira_loop_tree_node_t loop_tree_node) + process_bb_for_costs (bb); + } + ++/* Check that reg REGNO can be changed by TO in INSN. Return true in case the ++ result insn would be valid one. */ ++static bool ++equiv_can_be_consumed_p (int regno, rtx to, rtx_insn *insn) ++{ ++ validate_replace_src_group (regno_reg_rtxregno, to, insn); ++ bool res = verify_changes (0); ++ cancel_changes (0); ++ return res; ++} ++ ++/* Return true if X contains a pseudo with equivalence. In this case also ++ return the pseudo through parameter REG. If the pseudo is a part of subreg, ++ return the subreg through parameter SUBREG. */ ++ ++static bool ++get_equiv_regno (rtx x, int ®no, rtx &subreg) ++{ ++ subreg = NULL_RTX; ++ if (GET_CODE (x) == SUBREG) ++ { ++ subreg = x; ++ x = SUBREG_REG (x); ++ } ++ if (REG_P (x) ++ && (ira_reg_equivREGNO (x).memory != NULL ++ || ira_reg_equivREGNO (x).constant != NULL)) ++ { ++ regno = REGNO (x); ++ return true; ++ } ++ RTX_CODE code = GET_CODE (x); ++ const char *fmt = GET_RTX_FORMAT (code); ++ ++ for (int i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) ++ if (fmti == 'e') ++ { ++ if (get_equiv_regno (XEXP (x, i), regno, subreg)) ++ return true; ++ } ++ else if (fmti == 'E') ++ { ++ for (int j = 0; j < XVECLEN (x, i); j++) ++ if (get_equiv_regno (XVECEXP (x, i, j), regno, subreg)) ++ return true; ++ } ++ return false; ++} ++ ++/* A pass through the current function insns. Calculate costs of using ++ equivalences for pseudos and store them in regno_equiv_gains. */ ++ ++static void ++calculate_equiv_gains (void) ++{ ++ basic_block bb; ++ int regno, freq, cost; ++ rtx subreg; ++ rtx_insn *insn; ++ machine_mode mode; ++ enum reg_class rclass; ++ bitmap_head equiv_pseudos; ++ ++ ira_assert (allocno_p); ++ bitmap_initialize (&equiv_pseudos, ®_obstack); ++ for (regno = max_reg_num () - 1; regno >= FIRST_PSEUDO_REGISTER; regno--) ++ if (ira_reg_equivregno.init_insns != NULL ++ && (ira_reg_equivregno.memory != NULL ++ || (ira_reg_equivregno.constant != NULL ++ /* Ignore complicated constants which probably will be placed ++ in memory: */ ++ && GET_CODE (ira_reg_equivregno.constant) != CONST_DOUBLE ++ && GET_CODE (ira_reg_equivregno.constant) != CONST_VECTOR ++ && GET_CODE (ira_reg_equivregno.constant) != LABEL_REF))) ++ { ++ rtx_insn_list *x; ++ for (x = ira_reg_equivregno.init_insns; x != NULL; x = x->next ()) ++ { ++ insn = x->insn (); ++ rtx set = single_set (insn); ++ ++ if (set == NULL_RTX || SET_DEST (set) != regno_reg_rtxregno) ++ break; ++ bb = BLOCK_FOR_INSN (insn); ++ ira_curr_regno_allocno_map ++ = ira_bb_nodesbb->index.parent->regno_allocno_map; ++ mode = PSEUDO_REGNO_MODE (regno); ++ rclass = prefCOST_INDEX (regno); ++ ira_init_register_move_cost_if_necessary (mode); ++ if (ira_reg_equivregno.memory != NULL) ++ cost = ira_memory_move_costmoderclass1; ++ else ++ cost = ira_register_move_costmoderclassrclass; ++ freq = REG_FREQ_FROM_BB (bb); ++ regno_equiv_gainsregno += cost * freq; ++ } ++ if (x != NULL) ++ /* We found complicated equiv or reverse equiv mem=reg. Ignore ++ them. */ ++ regno_equiv_gainsregno = 0; ++ else ++ bitmap_set_bit (&equiv_pseudos, regno); ++ } ++ ++ FOR_EACH_BB_FN (bb, cfun) ++ { ++ freq = REG_FREQ_FROM_BB (bb); ++ ira_curr_regno_allocno_map ++ = ira_bb_nodesbb->index.parent->regno_allocno_map; ++ FOR_BB_INSNS (bb, insn) ++ { ++ if (!INSN_P (insn) || !get_equiv_regno (PATTERN (insn), regno, subreg) ++ || !bitmap_bit_p (&equiv_pseudos, regno)) ++ continue; ++ rtx subst = ira_reg_equivregno.memory; ++ ++ if (subst == NULL) ++ subst = ira_reg_equivregno.constant; ++ ira_assert (subst != NULL); ++ mode = PSEUDO_REGNO_MODE (regno); ++ ira_init_register_move_cost_if_necessary (mode); ++ bool consumed_p = equiv_can_be_consumed_p (regno, subst, insn); ++ ++ rclass = prefCOST_INDEX (regno); ++ if (MEM_P (subst) ++ /* If it is a change of constant into double for example, the ++ result constant probably will be placed in memory. */ ++ || (subreg != NULL_RTX && !INTEGRAL_MODE_P (GET_MODE (subreg)))) ++ cost = ira_memory_move_costmoderclass1 + (consumed_p ? 0 : 1); ++ else if (consumed_p)
View file
_service:tar_scm:0087-Add-cost-calculation-for-reg-equivalence-invariants.patch
Added
@@ -0,0 +1,49 @@ +From 4965473a4211a9feb46a0d168180ab450cb18bcc Mon Sep 17 00:00:00 2001 +From: "Vladimir N. Makarov" <vmakarov@redhat.com> +Date: Fri, 27 Oct 2023 08:28:24 -0400 +Subject: PATCH 32/32 Add cost calculation for reg equivalence invariants + +My recent patch improving cost calculation for pseudos with equivalence +resulted in failure of gcc.target/arm/eliminate.c on aarch64. This patch +fixes this failure. + +gcc/ChangeLog: + + * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains): + Process reg equivalence invariants. +--- + gcc/ira-costs.cc | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc +index c79311783..d33104a30 100644 +--- a/gcc/ira-costs.cc ++++ b/gcc/ira-costs.cc +@@ -1777,6 +1777,7 @@ get_equiv_regno (rtx x, int ®no, rtx &subreg) + } + if (REG_P (x) + && (ira_reg_equivREGNO (x).memory != NULL ++ || ira_reg_equivREGNO (x).invariant != NULL + || ira_reg_equivREGNO (x).constant != NULL)) + { + regno = REGNO (x); +@@ -1819,6 +1820,7 @@ calculate_equiv_gains (void) + for (regno = max_reg_num () - 1; regno >= FIRST_PSEUDO_REGISTER; regno--) + if (ira_reg_equivregno.init_insns != NULL + && (ira_reg_equivregno.memory != NULL ++ || ira_reg_equivregno.invariant != NULL + || (ira_reg_equivregno.constant != NULL + /* Ignore complicated constants which probably will be placed + in memory: */ +@@ -1869,6 +1871,8 @@ calculate_equiv_gains (void) + + if (subst == NULL) + subst = ira_reg_equivregno.constant; ++ if (subst == NULL) ++ subst = ira_reg_equivregno.invariant; + ira_assert (subst != NULL); + mode = PSEUDO_REGNO_MODE (regno); + ira_init_register_move_cost_if_necessary (mode); +-- +2.28.0.windows.1 +
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