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Changes of Revision 2
View file
_service:tar_scm:pciutils.spec
Changed
@@ -1,6 +1,6 @@ Name: pciutils -Version: 3.7.0 -Release: 2 +Version: 3.9.0 +Release: 1 Summary: PCI bus related utilities License: GPLv2+ URL: http://atrey.karlin.mff.cuni.cz/~mj/pciutils.shtml @@ -84,7 +84,7 @@ %files %defattr(-,root,root,-) %doc README ChangeLog pciutils.lsm COPYING -/sbin/lspci +/usr/bin/lspci /sbin/setpci /sbin/update-pciids /%{_lib}/libpci.so.* @@ -105,6 +105,15 @@ rm -rf $RPM_BUILD_ROOT %changelog +* Thu Feb 09 2023 suweifeng <suweifeng1@huawei.com> 3.9.0-1 +- upgrade to 3.9.0 + +* Fri Oct 28 2022 liusirui <liusirui@huawei.com> - 3.8.0-1 +- update to v3.8.0 + +* Tue Sep 6 2022 Wangming Shao <shaowangming@h-partners.com> - 3.7.0-3 +- DESC:add support lspci querying 10-bit tag information + * Fri Jul 30 2021 chenyanpanHW <chenyanpan@huawei.com> - 3.7.0-2 - DESC: delete -Sgit from %autosetup, and delete BuildRequires git
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_service:tar_scm:0000-pciutils-2.2.1-idpath.patch
Changed
@@ -2,7 +2,7 @@ --- pciutils-3.0.0/Makefile.idpath 2008-04-10 21:19:43.000000000 +0200 +++ pciutils-3.0.0/Makefile 2008-09-01 15:16:19.000000000 +0200 @@ -27,7 +27,7 @@ ABI_VERSION=.3 - PREFIX=/usr/local + BINDIR=$(PREFIX)/bin SBINDIR=$(PREFIX)/sbin SHAREDIR=$(PREFIX)/share -IDSDIR=$(SHAREDIR)
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_service
Changed
@@ -2,7 +2,7 @@ <service name="tar_scm"> <param name="scm">git</param> <param name="url">git@gitee.com:src-openeuler/pciutils.git</param> - <param name="revision">d0187243a5df92d4809aa4b50aaaea7b276eb383</param> + <param name="revision">master</param> <param name="exclude">*</param> <param name="extract">*</param> </service>
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_service:tar_scm:pciutils-3.7.0.tar.gz/win32
Deleted
-(directory)
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_service:tar_scm:pciutils-3.7.0.tar.gz/win32/config.h
Deleted
@@ -1,6 +0,0 @@ -#define PCI_ARCH_I386 -#define PCI_OS_WINDOWS -#define PCI_HAVE_PM_INTEL_CONF -#define PCI_IDS "pci.ids" -#define PCI_PATH_IDS_DIR "." -#define PCILIB_VERSION "3.7.0"
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_service:tar_scm:pciutils-3.7.0.tar.gz/win32/config.mk
Deleted
@@ -1,13 +0,0 @@ -# TOOLPREFIX is for cross compiling - -CC=$(TOOLPREFIX)gcc -LD=$(TOOLPREFIX)ld -AR=$(TOOLPREFIX)ar -RANLIB=$(TOOLPREFIX)ranlib - -PCI_ARCH_I386=yes -PCI_OS_WINDOWS=yes -PCI_HAVE_PM_INTEL_CONF=yes - -PCILIB=$(LIBNAME).a -PCILIBPC=$(LIBNAME).pc
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_service:tar_scm:pciutils-3.7.0.tar.gz/.gitignore -> _service:tar_scm:pciutils-3.9.0.tar.gz/.gitignore
Changed
@@ -1,6 +1,7 @@ *.a *.o *.so +*.exe *.0-9 lspci setpci
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_service:tar_scm:pciutils-3.7.0.tar.gz/ChangeLog -> _service:tar_scm:pciutils-3.9.0.tar.gz/ChangeLog
Changed
@@ -1,3 +1,73 @@ +2022-11-20 Martin Mares <mj@ucw.cz> + + * Released as 3.9.0. + + * We decode Compute Express Link (CXL) capabilities. + + * The tree mode of lspci is now compatible with filtering options. + + * When setpci is used with a named register, it checks whether + the register is present in the particular header type. + + * Linux: The intel-conf12 back-ends prefer to use ioperm() instead + of iopl() to gain access to I/O ports. + + * Windows: We have two new back-ends thanks to Pali Rohár. + One uses the NT SysDbg interface, the other uses kldbgdrv.sys + (which is a part of the Microsoft WinDbg tool). + + * Windows: We support building libpci as a DLL. Also, Windows + binaries now include meta-data with version. + + * Hurd: The Hurd back-end works again. + + * mmio-conf1(-ext): Added a new back-end implementing the intel-conf1 + interface over MMIO. This is useful on some ARM machines, but it + requires manual configuration of the MMIO addresses. + + * As usually, updated pci.ids to the current snapshot of the database. + +2022-04-18 Martin Mares <mj@ucw.cz> + + * Released as 3.8.0. + + * Filters can now match devices based on partially specified + class code and also on the programming interface. + + * Reporting of link speeds, power limits, and virtual function tags + has been updated to the current PCIe specification. + + * We decode the Data Object Exchange capability. + + * Bus mapping mode works in non-zero domains. + + * pci_fill_info() can fetch more fields: bridge bases, programming + interface, revision, subsystem vendor and device ID, OS driver, + and also parent bridge. Internally, the implementation was rewritten, + significantly reducing the number of corner cases to be handled. + + * The Windows port was revived and greatly improved by Pali Rohár. + It requires less magic to compile. More importantly, it runs on both + old and recent Windows systems (see README.Windows for details). + + * Added a new Windows back-end using the cfgmgr32 interface. + It does not provide direct access to the configuration space, + but basic information about the device is reported via pci_fill_info(). + For back-ends of this type, we now provide an emulated read-only + config space. + + * If the configuration space is not readable for some reason + (e.g., the cfgmgr32 back-end, but also badly implemented sleep mode + of some devices), lspci prints only information provided by the OS. + + * The Hurd back-end was greatly improved thanks to Joan Lledó. + + * Various minor bug fixes and improvements. + + * We officially require a working C99 compiler. Sorry, MSVC. + + * As usually, updated pci.ids to the current snapshot of the database. + 2020-05-31 Martin Mares <mj@ucw.cz> * Released as 3.7.0. @@ -763,7 +833,7 @@ 2007-08-31 Martin Mares <mj@ucw.cz> - * Makefile, lib/Makefile: `ar' and `ranlib' can be overriden to allow + * Makefile, lib/Makefile: `ar' and `ranlib' can be overridden to allow cross-compilation. 2007-08-27 Martin Mares <mj@ucw.cz> @@ -1337,7 +1407,7 @@ is not supported by all C libraries. * Makefile: Always enter the lib directory (remember that we don't have - full dependecies for the library in the top-level Makefile; hmmm, another + full dependencies for the library in the top-level Makefile; hmmm, another thing to rewrite some day). * lib/sysfs.c: Added Linux sysfs access method based on the patch @@ -1860,7 +1930,7 @@ * lspci.c (show_msi): Added dumping of the MSI capability. (show_slotid): The same for SlotID capability. - (show_caps): Seperated capability dumping, because it should + (show_caps): Separated capability dumping, because it should be used for both htype0 and htype1. Even PCI 2.2 doesn't mention layout of htype2, so I'm a bit unsure about it wrt capabilities -- they at least have to live somewhere else since address 0x34 @@ -1975,7 +2045,7 @@ is mainly guesswork based on DEC/Intel 21153 bridge specs since I don't have the PCI Power Management document). - * lspci.c: Replaced numerous occurences of (x & flag) ? '+' : '-' + * lspci.c: Replaced numerous occurrences of (x & flag) ? '+' : '-' by FLAG macro. * lspci.c: Added bridge checks to bus mapping code. @@ -2007,11 +2077,11 @@ * lib/header.h: Until kernel adopts new layout of PCI includes (i.e., separate declaration of header structure, functions and device IDs), which is not going to happen - before 2.3, we'll use our own definiton of the header. + before 2.3, we'll use our own definition of the header. * lspci.c (show_verbose): Display `Cap' flag in device status. - * lspci.c (show_htype0): Display capability lists whereever + * lspci.c (show_htype0): Display capability lists wherever available. The only capability name we recognize now is `AGP'. Unfortunately, capabilities are stored in device-dependent portion of the configuration space and are thus available
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_service:tar_scm:pciutils-3.7.0.tar.gz/Makefile -> _service:tar_scm:pciutils-3.9.0.tar.gz/Makefile
Changed
@@ -1,11 +1,11 @@ # Makefile for The PCI Utilities -# (c) 1998--2020 Martin Mares <mj@ucw.cz> +# (c) 1998--2022 Martin Mares <mj@ucw.cz> OPT=-O2 CFLAGS=$(OPT) -Wall -W -Wno-parentheses -Wstrict-prototypes -Wmissing-prototypes -VERSION=3.7.0 -DATE=2020-05-31 +VERSION=3.9.0 +DATE=2022-11-20 # Host OS and release (override if you are cross-compiling) HOST= @@ -29,10 +29,11 @@ # ABI version suffix in the name of the shared library # (as we use proper symbol versioning, this seldom needs changing) -ABI_VERSION=.3 +ABI_VERSION=3 # Installation directories PREFIX=/usr/local +BINDIR=$(PREFIX)/bin SBINDIR=$(PREFIX)/sbin SHAREDIR=$(PREFIX)/share IDSDIR=$(SHAREDIR) @@ -45,11 +46,17 @@ INSTALL=install DIRINSTALL=install -d STRIP=-s +ifdef CROSS_COMPILE CC=$(CROSS_COMPILE)gcc +else +CC=cc +endif AR=$(CROSS_COMPILE)ar RANLIB=$(CROSS_COMPILE)ranlib +DLLTOOL=$(CROSS_COMPILE)dlltool +WINDRES=$(CROSS_COMPILE)windres -# Base name of the library (overriden on NetBSD, which has its own libpci) +# Base name of the library (overridden on NetBSD, which has its own libpci) LIBNAME=libpci -include lib/config.mk @@ -59,9 +66,9 @@ export -all: lib/$(PCILIB) lspci setpci example lspci.8 setpci.8 pcilib.7 pci.ids.5 update-pciids update-pciids.8 $(PCI_IDS) +all: lib/$(PCIIMPLIB) lspci$(EXEEXT) setpci$(EXEEXT) example$(EXEEXT) lspci.8 setpci.8 pcilib.7 pci.ids.5 update-pciids update-pciids.8 $(PCI_IDS) -lib/$(PCILIB): $(PCIINC) force +lib/$(PCIIMPLIB): $(PCIINC) force $(MAKE) -C lib all force: @@ -69,8 +76,14 @@ lib/config.h lib/config.mk: cd lib && ./configure -lspci: lspci.o ls-vpd.o ls-caps.o ls-caps-vendor.o ls-ecaps.o ls-kernel.o ls-tree.o ls-map.o common.o lib/$(PCILIB) -setpci: setpci.o common.o lib/$(PCILIB) +COMMON=common.o +ifeq ($(COMPAT_GETOPT),yes) +PCIINC+=compat/getopt.h +COMMON+=compat/getopt.o +endif + +lspci$(EXEEXT): lspci.o ls-vpd.o ls-caps.o ls-caps-vendor.o ls-ecaps.o ls-kernel.o ls-tree.o ls-map.o $(COMMON) lib/$(PCIIMPLIB) +setpci$(EXEEXT): setpci.o $(COMMON) lib/$(PCIIMPLIB) LSPCIINC=lspci.h pciutils.h $(PCIINC) lspci.o: lspci.c $(LSPCIINC) @@ -83,23 +96,39 @@ setpci.o: setpci.c pciutils.h $(PCIINC) common.o: common.c pciutils.h $(PCIINC) +compat/getopt.o: compat/getopt.c -lspci: LDLIBS+=$(LIBKMOD_LIBS) +lspci$(EXEEXT): LDLIBS+=$(LIBKMOD_LIBS) ls-kernel.o: CFLAGS+=$(LIBKMOD_CFLAGS) update-pciids: update-pciids.sh - sed <$< >$@ "s@^DEST=.*@DEST=$(IDSDIR)/$(PCI_IDS)@;s@^PCI_COMPRESSED_IDS=.*@PCI_COMPRESSED_IDS=$(PCI_COMPRESSED_IDS)@" + sed <$< >$@ "s@^DEST=.*@DEST=$(if $(IDSDIR),$(IDSDIR)/,)$(PCI_IDS)@;s@^PCI_COMPRESSED_IDS=.*@PCI_COMPRESSED_IDS=$(PCI_COMPRESSED_IDS)@" chmod +x $@ # The example of use of libpci -example: example.o lib/$(PCILIB) +example$(EXEEXT): example.o lib/$(PCIIMPLIB) example.o: example.c $(PCIINC) -%: %.o +%$(EXEEXT): %.o $(CC) $(LDFLAGS) $(TARGET_ARCH) $^ $(LDLIBS) -o $@ +ifdef PCI_OS_WINDOWS +comma := , +%-rsrc.rc: lib/winrsrc.rc.in + sed <$< >$@ -e 's,@PCILIB_VERSION@,$(PCILIB_VERSION),' \ + -e 's,@PCILIB_VERSION_WINRC@,$(subst .,\$(comma),$(PCILIB_VERSION).0),' \ + -e 's,@FILENAME@,$(subst -rsrc.rc,$(EXEEXT),$@),' \ + -e 's,@DESCRIPTION@,$(subst -rsrc.rc,,$@),' \ + -e 's,@LIBRARY_BUILD@,0,' \ + -e 's,@DEBUG_BUILD@,$(if $(findstring -g,$(CFLAGS)),1,0),' +%-rsrc.o: %-rsrc.rc + $(WINDRES) --input=$< --output=$@ --input-format=rc --output-format=coff +lspci$(EXEEXT): lspci-rsrc.o +setpci$(EXEEXT): setpci-rsrc.o +endif + %.8 %.7 %.5: %.man - M=`echo $(DATE) | sed 's/-01-/-January-/;s/-02-/-February-/;s/-03-/-March-/;s/-04-/-April-/;s/-05-/-May-/;s/-06-/-June-/;s/-07-/-July-/;s/-08-/-August-/;s/-09-/-September-/;s/-10-/-October-/;s/-11-/-November-/;s/-12-/-December-/;s/\(.*\)-\(.*\)-\(.*\)/\3 \2 \1/'` ; sed <$< >$@ "s/@TODAY@/$$M/;s/@VERSION@/pciutils-$(VERSION)/;s#@IDSDIR@#$(IDSDIR)#" + M=`echo $(DATE) | sed 's/-01-/-January-/;s/-02-/-February-/;s/-03-/-March-/;s/-04-/-April-/;s/-05-/-May-/;s/-06-/-June-/;s/-07-/-July-/;s/-08-/-August-/;s/-09-/-September-/;s/-10-/-October-/;s/-11-/-November-/;s/-12-/-December-/;s/\(.*\)-\(.*\)-\(.*\)/\3 \2 \1/'` ; sed <$< >$@ "s/@TODAY@/$$M/;s/@VERSION@/pciutils-$(VERSION)/;s#@IDSDIR@#$(IDSDIR)#;s#@PCI_IDS@#$(PCI_IDS)#" ctags: rm -f tags @@ -111,25 +140,30 @@ clean: rm -f `find . -name "*~" -o -name "*.oa" -o -name "\#*\#" -o -name TAGS -o -name core -o -name "*.orig"` - rm -f update-pciids lspci setpci example lib/config.* *.578 pci.ids.gz lib/*.pc lib/*.so lib/*.so.* tags + rm -f update-pciids lspci$(EXEEXT) setpci$(EXEEXT) example$(EXEEXT) lib/config.* *.578 pci.ids.gz lib/*.pc lib/*.so lib/*.so.* lib/*.dll lib/*.def lib/dllrsrc.rc *-rsrc.rc tags rm -rf maint/dist distclean: clean install: all # -c is ignored on Linux, but required on FreeBSD - $(DIRINSTALL) -m 755 $(DESTDIR)$(SBINDIR) $(DESTDIR)$(IDSDIR) $(DESTDIR)$(MANDIR)/man8 $(DESTDIR)$(MANDIR)/man7 $(DESTDIR)/$(MANDIR)/man5 - $(INSTALL) -c -m 755 $(STRIP) lspci setpci $(DESTDIR)$(SBINDIR) + $(DIRINSTALL) -m 755 $(DESTDIR)$(BINDIR) $(DESTDIR)$(SBINDIR) $(DESTDIR)$(IDSDIR) $(DESTDIR)$(MANDIR)/man8 $(DESTDIR)$(MANDIR)/man7 $(DESTDIR)$(MANDIR)/man5 + $(INSTALL) -c -m 755 $(STRIP) lspci$(EXEEXT) $(DESTDIR)$(LSPCIDIR) + $(INSTALL) -c -m 755 $(STRIP) setpci$(EXEEXT) $(DESTDIR)$(SBINDIR) $(INSTALL) -c -m 755 update-pciids $(DESTDIR)$(SBINDIR) +ifneq ($(IDSDIR),) $(INSTALL) -c -m 644 $(PCI_IDS) $(DESTDIR)$(IDSDIR) +else + $(INSTALL) -c -m 644 $(PCI_IDS) $(DESTDIR)$(SBINDIR) +endif $(INSTALL) -c -m 644 lspci.8 setpci.8 update-pciids.8 $(DESTDIR)$(MANDIR)/man8 $(INSTALL) -c -m 644 pcilib.7 $(DESTDIR)$(MANDIR)/man7 $(INSTALL) -c -m 644 pci.ids.5 $(DESTDIR)$(MANDIR)/man5 ifeq ($(SHARED),yes) ifeq ($(LIBEXT),dylib) - ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME)$(ABI_VERSION).$(LIBEXT) -else - ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT)$(ABI_VERSION) + ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(ABI_VERSION).$(LIBEXT) +else ifeq ($(LIBEXT),so) + ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT).$(ABI_VERSION) endif endif @@ -139,27 +173,66 @@ install-pcilib: lib/$(PCILIB) $(DIRINSTALL) -m 755 $(DESTDIR)$(LIBDIR) +ifeq ($(SHARED)_$(LIBEXT),yes_dll) +# DLL library must have executable flag on disk and be placed in same directory as where are EXE files + $(DIRINSTALL) -m 755 $(DESTDIR)$(SBINDIR) + $(INSTALL) -c -m 755 lib/$(PCILIB) $(DESTDIR)$(SBINDIR) +else $(INSTALL) -c -m 644 lib/$(PCILIB) $(DESTDIR)$(LIBDIR) +endif -install-lib: $(PCIINC_INS) lib/$(PCILIBPC) install-pcilib +install-lib: $(PCIINC_INS) install-pcilib $(DIRINSTALL) -m 755 $(DESTDIR)$(INCDIR)/pci $(DESTDIR)$(PKGCFDIR) $(INSTALL) -c -m 644 $(PCIINC_INS) $(DESTDIR)$(INCDIR)/pci $(INSTALL) -c -m 644 lib/$(PCILIBPC) $(DESTDIR)$(PKGCFDIR) +ifneq ($(PCIIMPLIB),$(PCILIB)) + $(INSTALL) -c -m 644 lib/$(PCIIMPLIB) $(DESTDIR)$(LIBDIR) +endif +ifneq ($(PCIIMPDEF),) + $(INSTALL) -c -m 644 lib/$(PCIIMPDEF) $(DESTDIR)$(LIBDIR) +endif ifeq ($(SHARED),yes) ifeq ($(LIBEXT),dylib) - ln -sf $(LIBNAME)$(ABI_VERSION).$(LIBEXT) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT) -else - ln -sf $(LIBNAME).$(LIBEXT)$(ABI_VERSION) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT) + ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(ABI_VERSION).$(LIBEXT) + ln -sf $(LIBNAME).$(ABI_VERSION).$(LIBEXT) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT) +else ifeq ($(LIBEXT),so) + ln -sf $(PCILIB) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT).$(ABI_VERSION) + ln -sf $(LIBNAME).$(LIBEXT).$(ABI_VERSION) $(DESTDIR)$(LIBDIR)/$(LIBNAME).$(LIBEXT) endif endif uninstall: all - rm -f $(DESTDIR)$(SBINDIR)/lspci $(DESTDIR)$(SBINDIR)/setpci $(DESTDIR)$(SBINDIR)/update-pciids + rm -f $(DESTDIR)$(SBINDIR)/lspci$(EXEEXT) $(DESTDIR)$(SBINDIR)/setpci$(EXEEXT) $(DESTDIR)$(SBINDIR)/update-pciids +ifneq ($(IDSDIR),) rm -f $(DESTDIR)$(IDSDIR)/$(PCI_IDS) +else
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_service:tar_scm:pciutils-3.7.0.tar.gz/README -> _service:tar_scm:pciutils-3.9.0.tar.gz/README
Changed
@@ -1,11 +1,14 @@ -This package contains the PCI Utilities, version 3.7.0. +This package contains the PCI Utilities, version 3.9.0. -Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz> +Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz> All files in this package can be freely distributed and used according to the terms of the GNU General Public License, either version 2 or (at your opinion) any newer version. See https://www.gnu.org/ for details. +The author wants to clarify that he does not consider programs which link +dynamically to the libpci to be derived works of the library. + 1. What's that? ~~~~~~~~~~~~~~~ @@ -22,7 +25,7 @@ Solaris/i386 (direct port access) Aix (via /dev/pci and odmget) GNU Hurd (direct port access) - Windows (direct port access, see README.Windows for caveats) + Windows (via cfgmgr32 or direct port access, see README.Windows for caveats) CYGWIN (direct port access) BeOS (via syscalls) Haiku (via /dev/misc/poke) @@ -49,7 +52,8 @@ 2. Compiling and (un)installing ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Just run "make" to compile the package and then "make install" to install it. -Please note that GNU make is needed on most platforms. +Please note that a C compiler supporting the C99 standard is required. +Also, GNU make is needed on most platforms. If you want to change the default installation location, please override the PREFIX variable specified in the Makefile -- e.g., you can use
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_service:tar_scm:pciutils-3.7.0.tar.gz/README.Windows -> _service:tar_scm:pciutils-3.9.0.tar.gz/README.Windows
Changed
@@ -4,20 +4,35 @@ Updated after version 2.2.6 to compile again, and with MinGW, even (only?) cross-compiling. (Hopefully it works with MSVC too.) -To use this port, you need to install WinIO.dll first. You can get it here: +For simple listing PCI devices in system with basic information, there is no +special requirement. To list PCI resources on Windows 8 and higher versions, +it is necessary to have architecture-native version (e.g. AMD64 version on +AMD64 systems). - https://github.com/starofrainnight/winio - https://github.com/vaptu/winio +To access config space on NT-based systems, it is required to have SeTcbPrivilege +(Act as part of the operating system privilege), which can be enabled in User +Accounts settings (take effect after next login). By default this privilege is +not enabled for any non-system user. Or alternatively it is required to be in +local Administrators group and on Windows 2000 SP4 or higher systems to have +SeImpersonatePrivilege (Impersonate a client after authentication privilege) +which is by default enabled for all local Administrators accounts. There is no +special requirement for DOS-based systems. 64-bit systems do not have to allow +users to access config space even with SeTcbPrivilege. -However, you need to use win32/config.{h,mk} instead of the automatically -generated lib/config.{h,mk} as lib/configure does not run on Windows. +To compile this port, run following command: + + make CROSS_COMPILE=i586-mingw32msvc- HOST=i386-windows ZLIB=no IDSDIR="" + +To build 64-bit version, run: + + make CROSS_COMPILE=x86_64-w64-mingw32- HOST=x86_64-windows ZLIB=no IDSDIR="" + +Sometimes compilation may fail due to broken or missing getopt implementation. +In this case try to compile with additional make option: COMPAT_GETOPT=yes ================================================================================ BEWARE: The current implementation pokes I/O ports to access the PCI devices directly. This leads to several problems: some devices are invisible, extended PCIe configuration space is not available, and there are many potential race conditions. Instead, libpci should use the proper Windows drivers. - -Unfortunately, the Windows port currently lacks a maintainer. If you are willing -to step up and fix the issues, please let me know. -- Martin Mares ================================================================================
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_service:tar_scm:pciutils-3.7.0.tar.gz/common.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/common.c
Changed
@@ -10,7 +10,6 @@ #include <string.h> #include <stdlib.h> #include <stdarg.h> -#include <unistd.h> #include "pciutils.h"
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_service:tar_scm:pciutils-3.7.0.tar.gz/compat/getopt.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/compat/getopt.c
Changed
@@ -36,7 +36,6 @@ #endif #include <stdio.h> -#include <string.h> /* Comment out all this code if we are using the GNU C Library, and are not actually compiling the library itself. This code is part of the GNU C @@ -163,6 +162,8 @@ #include <string.h> #define my_index strchr #define my_strlen strlen +#define my_strcmp strcmp +#define my_strncmp strncmp #else /* Avoid depending on library functions or files @@ -170,11 +171,11 @@ #if __STDC__ || defined(PROTO) extern char *getenv(const char *name); -extern int strcmp(const char *s1, const char *s2); -extern int strncmp(const char *s1, const char *s2, int n); static int my_strlen(const char *s); static char *my_index(const char *str, int chr); +static int my_strncmp(const char *s1, const char *s2, int n); +static int my_strcmp(const char *s1, const char *s2); #else extern char *getenv(); #endif @@ -197,6 +198,23 @@ return 0; } +static int my_strncmp(const char *s1, const char *s2, int n) +{ + while (n && *s1 && (*s1 == *s2)) { + ++s1; + ++s2; + --n; + } + if (n == 0) + return 0; + return *(const unsigned char *)s1 - *(const unsigned char *)s2; +} + +static int my_strcmp(const char *s1, const char *s2) +{ + return my_strncmp(s1, s2, -1); +} + #endif /* GNU C library. */  /* Handle permutation of arguments. */ @@ -385,7 +403,7 @@ then exchange with previous non-options as if it were an option, then skip everything else like a non-option. */ - if (optind != argc && !strcmp(argvoptind, "--")) { + if (optind != argc && !my_strcmp(argvoptind, "--")) { optind++; if (first_nonopt != last_nonopt && last_nonopt != optind) @@ -445,7 +463,7 @@ /* Test all options for either exact match or abbreviated matches. */ for (p = longopts, option_index = 0; p->name; p++, option_index++) - if (!strncmp(p->name, nextchar, s - nextchar)) { + if (!my_strncmp(p->name, nextchar, s - nextchar)) { if (s - nextchar == my_strlen(p->name)) { /* Exact match found. */ pfound = p;
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_service:tar_scm:pciutils-3.7.0.tar.gz/compat/getopt.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/compat/getopt.h
Changed
@@ -95,12 +95,7 @@ #define optional_argument 2 #if __STDC__ || defined(PROTO) -#if defined(__GNU_LIBRARY__) -/* Many other libraries have conflicting prototypes for getopt, with - differences in the consts, in stdlib.h. To avoid compilation - errors, only prototype getopt for the GNU C library. */ extern int getopt (int argc, char *const *argv, const char *shortopts); -#endif /* not __GNU_LIBRARY__ */ extern int getopt_long (int argc, char *const *argv, const char *shortopts, const struct option *longopts, int *longind); extern int getopt_long_only (int argc, char *const *argv,
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/Makefile -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/Makefile
Changed
@@ -18,6 +18,10 @@ OBJS += i386-ports endif +ifdef PCI_HAVE_PM_MMIO_CONF +OBJS += mmio-ports +endif + ifdef PCI_HAVE_PM_DUMP OBJS += dump endif @@ -54,6 +58,19 @@ OBJS += hurd endif +ifdef PCI_HAVE_PM_WIN32_CFGMGR32 +OBJS += emulated +OBJS += win32-cfgmgr32 +endif + +ifdef PCI_HAVE_PM_WIN32_KLDBG +OBJS += win32-kldbg +endif + +ifdef PCI_HAVE_PM_WIN32_SYSDBG +OBJS += win32-sysdbg +endif + all: $(PCILIB) $(PCILIBPC) ifeq ($(SHARED),no) @@ -62,13 +79,31 @@ $(AR) rcs $@ $^ $(RANLIB) $@ else +ifeq ($(LIBEXT),dll) +all: $(PCIIMPDEF) $(PCIIMPLIB) +build.def: $(PCIIMPDEF) +$(PCIIMPDEF): libpci.ver ver2def.pl + perl ver2def.pl libpci.ver $(PCILIB) build.def $(PCIIMPDEF) +$(PCIIMPLIB): $(PCIIMPDEF) + $(DLLTOOL) --input-def $< --output-lib $@ +comma := , +dllrsrc.rc: winrsrc.rc.in + sed <$< >$@ -e 's,@PCILIB_VERSION@,$(PCILIB_VERSION),' \ + -e 's,@PCILIB_VERSION_WINRC@,$(subst .,\$(comma),$(PCILIB_VERSION).0),' \ + -e 's,@FILENAME@,$(PCILIB),' \ + -e 's,@DESCRIPTION@,libpci,' \ + -e 's,@LIBRARY_BUILD@,1,' \ + -e 's,@DEBUG_BUILD@,$(if $(findstring -g,$(CFLAGS)),1,0),' +dllrsrc.o: dllrsrc.rc + $(WINDRES) --input=$< --output=$@ --input-format=rc --output-format=coff +OBJS += dllrsrc +endif CFLAGS += -fPIC -fvisibility=hidden $(PCILIB): $(addsuffix .o,$(OBJS)) - ifdef PCI_HAVE_PM_DARWIN_DEVICE - $(CC) -shared $(LDFLAGS) $(SONAME) -Wl,-install_name,$(LIBDIR)/$(PCILIB) -o $@ $^ $(LIB_LDLIBS) - else - $(CC) -shared $(LDFLAGS) $(SONAME) -Wl,--version-script=libpci.ver -o $@ $^ $(LIB_LDLIBS) - endif + $(CC) -shared $(CFLAGS) $(LDFLAGS) $(PCILIB_LDFLAGS) -o $@ $^ $(LIB_LDLIBS) +ifeq ($(LIBEXT),dll) +$(PCILIB): build.def +endif endif $(PCILIBPC): libpci.pc.in @@ -77,15 +112,18 @@ -e 's,@LIBDIR@,$(LIBDIR),' \ -e 's,@IDSDIR@,$(IDSDIR),' \ -e 's,@VERSION@,$(VERSION),' \ - -e 's,@LDLIBS@,$(LDLIBS),' + -e 's,@LDLIBS@,$(LDLIBS),' \ + -e 's,@WITH_LIBS@,$(WITH_LIBS),' init.o: init.c $(INCL) access.o: access.c $(INCL) params.o: params.c $(INCL) i386-ports.o: i386-ports.c $(INCL) i386-io-hurd.h i386-io-linux.h i386-io-sunos.h i386-io-windows.h i386-io-cygwin.h +mmio-ports.o: mmio-ports.c $(INCL) proc.o: proc.c $(INCL) pread.h sysfs.o: sysfs.c $(INCL) pread.h generic.o: generic.c $(INCL) +emulated.o: emulated.c $(INCL) syscalls.o: syscalls.c $(INCL) obsd-device.o: obsd-device.c $(INCL) fbsd-device.o: fbsd-device.c $(INCL) @@ -100,3 +138,15 @@ filter.o: filter.c $(INCL) nbsd-libpci.o: nbsd-libpci.c $(INCL) hurd.o: hurd.c $(INCL) +win32-cfgmgr32.o: win32-cfgmgr32.c $(INCL) +win32-kldbg.o: win32-kldbg.c $(INCL) +win32-sysdbg.o: win32-sysdbg.c $(INCL) + +# MinGW32 toolchain has some required Win32 header files in /ddk subdirectory. +# But these header files include another header files from /ddk subdirectory +# and expect that build system has already set /ddk subdirectory into includes. +# So include /ddk subdirectory of each system predefined include path via -I. +ifdef PCI_HAVE_PM_WIN32_CFGMGR32 +DDKCFLAGS:=$(shell echo | $(CC) $(CFLAGS) -E -Wp,-v -o /dev/null - 2>&1 | sed -n 's/^ \(.*\)/-I\1\/ddk/p') +win32-cfgmgr32.o: override CFLAGS+=$(DDKCFLAGS) +endif
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/access.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/access.c
Changed
@@ -1,7 +1,7 @@ /* * The PCI Library -- User Access * - * Copyright (c) 1997--2018 Martin Mares <mj@ucw.cz> + * Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz> * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -189,7 +189,7 @@ } int -pci_fill_info_v35(struct pci_dev *d, int flags) +pci_fill_info_v38(struct pci_dev *d, int flags) { unsigned int uflags = flags; if (uflags & PCI_FILL_RESCAN) @@ -198,24 +198,26 @@ pci_reset_properties(d); } if (uflags & ~d->known_fields) - d->known_fields |= d->methods->fill_info(d, flags & ~d->known_fields); + d->methods->fill_info(d, uflags); return d->known_fields; } /* In version 3.1, pci_fill_info got new flags => versioned alias */ -/* In versions 3.2, 3.3, 3.4 and 3.5, the same has happened */ -STATIC_ALIAS(int pci_fill_info(struct pci_dev *d, int flags), pci_fill_info_v35(d, flags)); -DEFINE_ALIAS(int pci_fill_info_v30(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v31(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v32(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v33(struct pci_dev *d, int flags), pci_fill_info_v35); -DEFINE_ALIAS(int pci_fill_info_v34(struct pci_dev *d, int flags), pci_fill_info_v35); +/* In versions 3.2, 3.3, 3.4, 3.5 and 3.8, the same has happened */ +STATIC_ALIAS(int pci_fill_info(struct pci_dev *d, int flags), pci_fill_info_v38(d, flags)); +DEFINE_ALIAS(int pci_fill_info_v30(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v31(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v32(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v33(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v34(struct pci_dev *d, int flags), pci_fill_info_v38); +DEFINE_ALIAS(int pci_fill_info_v35(struct pci_dev *d, int flags), pci_fill_info_v38); SYMBOL_VERSION(pci_fill_info_v30, pci_fill_info@LIBPCI_3.0); SYMBOL_VERSION(pci_fill_info_v31, pci_fill_info@LIBPCI_3.1); SYMBOL_VERSION(pci_fill_info_v32, pci_fill_info@LIBPCI_3.2); SYMBOL_VERSION(pci_fill_info_v33, pci_fill_info@LIBPCI_3.3); SYMBOL_VERSION(pci_fill_info_v34, pci_fill_info@LIBPCI_3.4); -SYMBOL_VERSION(pci_fill_info_v35, pci_fill_info@@LIBPCI_3.5); +SYMBOL_VERSION(pci_fill_info_v35, pci_fill_info@LIBPCI_3.5); +SYMBOL_VERSION(pci_fill_info_v38, pci_fill_info@@LIBPCI_3.8); void pci_setup_cache(struct pci_dev *d, byte *cache, int len)
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/aix-device.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/aix-device.c
Changed
@@ -206,7 +206,7 @@ bus_number = pci_busesi.bus_number; if (!busmapbus_number) { - pci_generic_scan_bus(a, busmap, bus_number); + pci_generic_scan_bus(a, busmap, 0, bus_number); } } }
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/caps.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/caps.c
Changed
@@ -80,17 +80,16 @@ while (where); } -unsigned int +void pci_scan_caps(struct pci_dev *d, unsigned int want_fields) { - if ((want_fields & PCI_FILL_EXT_CAPS) && !(d->known_fields & PCI_FILL_CAPS)) + if (want_fields & PCI_FILL_EXT_CAPS) want_fields |= PCI_FILL_CAPS; - if (want_fields & PCI_FILL_CAPS) + if (want_fill(d, want_fields, PCI_FILL_CAPS)) pci_scan_trad_caps(d); - if (want_fields & PCI_FILL_EXT_CAPS) + if (want_fill(d, want_fields, PCI_FILL_EXT_CAPS)) pci_scan_ext_caps(d); - return want_fields; } void @@ -117,8 +116,8 @@ * To select one capability if there are more than one with the same id, you * can provide a pointer to an unsigned int that contains the index which you * want as cap_number. If you don't care and are fine with the first one you - * can supply NULL. The cap_number will be replaced by the acutal number - * of capablities with that id. + * can supply NULL. The cap_number will be replaced by the actual number + * of capabilities with that id. */ struct pci_cap * pci_find_cap_nr(struct pci_dev *d, unsigned int id, unsigned int type, @@ -129,7 +128,7 @@ unsigned int target = (cap_number ? *cap_number : 0); unsigned int index = 0; - pci_fill_info_v35(d, ((type == PCI_CAP_NORMAL) ? PCI_FILL_CAPS : PCI_FILL_EXT_CAPS)); + pci_fill_info_v38(d, ((type == PCI_CAP_NORMAL) ? PCI_FILL_CAPS : PCI_FILL_EXT_CAPS)); for (c=d->first_cap; c; c=c->next) {
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/configure -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/configure
Changed
@@ -9,7 +9,7 @@ printf '%s' "$*" } -if -z "$VERSION" -o -z "$IDSDIR" ; then +if -z "$VERSION" ; then echo >&2 "Please run the configure script from the top-level Makefile" exit 1 fi @@ -25,12 +25,20 @@ proc=`/usr/sbin/lsdev -C -c processor -S available -F name | head -1` cpu=`/usr/sbin/lsattr -F value -l $proc -a type | sed 's/_.*//'` else - cpu=`uname -m | sed 's/^i.86$/i386/;s/^sun4u$/sparc64/;s/^i86pc$/i386/;s/^BePC$/i386/;s/^BeMac$/powerpc/;s/^BeBox$/powerpc/'` + cpu=`uname -m | sed 's/^i.86-AT386/i386/;s/^i.86$/i386/;s/^sun4u$/sparc64/;s/^i86pc$/i386/;s/^BePC$/i386/;s/^BeMac$/powerpc/;s/^BeBox$/powerpc/'` fi - if "$sys" = "GNU/kFreeBSD" -o "$sys" = "DragonFly" + if "$sys" = "DragonFly" then sys=freebsd fi + if "$sys" = "GNU/kFreeBSD" + then + sys=kfreebsd + fi + if "$sys" = "GNU" + then + sys=gnu + fi if "$sys" = "CYGWIN_NT-5.1" -o "$sys" = "CYGWIN_NT-6.0" then sys=cygwin @@ -54,21 +62,27 @@ echo_n "Looking for access methods..." LIBRESOLV=-lresolv LIBEXT=so +EXEEXT= +SYSINCLUDE=/usr/include +LSPCIDIR=SBINDIR case $sys in linux*) - echo_n " sysfs proc" + echo_n " sysfs proc mem-ports" echo >>$c '#define PCI_HAVE_PM_LINUX_SYSFS' echo >>$c '#define PCI_HAVE_PM_LINUX_PROC' + echo >>$c '#define PCI_HAVE_PM_MMIO_CONF' echo >>$c '#define PCI_HAVE_LINUX_BYTEORDER_H' echo >>$c '#define PCI_PATH_PROC_BUS_PCI "/proc/bus/pci"' echo >>$c '#define PCI_PATH_SYS_BUS_PCI "/sys/bus/pci"' + echo >>$c '#define PCI_PATH_DEVMEM_DEVICE "/dev/mem"' case $cpu in i?86|x86_64) echo_n " i386-ports" echo >>$c '#define PCI_HAVE_PM_INTEL_CONF' ;; esac echo >>$c '#define PCI_HAVE_64BIT_ADDRESS' + LSPCIDIR=BINDIR ;; sunos) case $cpu in @@ -82,18 +96,22 @@ esac echo >>$c '#define PCI_HAVE_STDINT_H' ;; - freebsd*) - echo_n " fbsd-device" + freebsd*|kfreebsd*) + echo_n " fbsd-device mem-ports" echo >>$c '#define PCI_HAVE_PM_FBSD_DEVICE' + echo >>$c '#define PCI_HAVE_PM_MMIO_CONF' echo >>$c '#define PCI_PATH_FBSD_DEVICE "/dev/pci"' - if "$realsys" != "GNU/kFreeBSD" ; then + echo >>$c '#define PCI_PATH_DEVMEM_DEVICE "/dev/mem"' + if "$sys" != "kfreebsd" ; then LIBRESOLV= fi ;; openbsd) - echo_n " obsd-device" + echo_n " obsd-device mem-ports" echo >>$c '#define PCI_HAVE_PM_OBSD_DEVICE' + echo >>$c '#define PCI_HAVE_PM_MMIO_CONF' echo >>$c '#define PCI_PATH_OBSD_DEVICE "/dev/pci"' + echo >>$c '#define PCI_PATH_DEVMEM_DEVICE "/dev/mem"' LIBRESOLV= ;; @@ -104,6 +122,7 @@ echo >>$c '#define PCI_HAVE_64BIT_ADDRESS' LIBRESOLV= LIBEXT=dylib + SYSINCLUDE=$(xcrun --sdk macosx --show-sdk-path)/usr/include ;; aix) echo_n " aix-device" @@ -113,9 +132,11 @@ echo >>$m 'DIRINSTALL=mkdir -p' ;; netbsd) - echo_n " nbsd-libpci" + echo_n " nbsd-libpci mem-ports" echo >>$c '#define PCI_HAVE_PM_NBSD_LIBPCI' + echo >>$c '#define PCI_HAVE_PM_MMIO_CONF' echo >>$c '#define PCI_PATH_NBSD_DEVICE "/dev/pci0"' + echo >>$c '#define PCI_PATH_DEVMEM_DEVICE "/dev/mem"' echo >>$c '#define PCI_HAVE_64BIT_ADDRESS' echo >>$m 'LIBNAME=libpciutils' echo >>$m 'WITH_LIBS+=-lpci' @@ -129,11 +150,32 @@ djgpp) echo_n " i386-ports" echo >>$c '#define PCI_HAVE_PM_INTEL_CONF' + EXEEXT=.exe ;; - cygwin) + cygwin|windows) + echo_n " win32-cfgmgr32 win32-kldbg win32-sysdbg" + echo >>$c '#define PCI_HAVE_64BIT_ADDRESS' + echo >>$c '#define PCI_HAVE_PM_WIN32_CFGMGR32' + echo >>$c '#define PCI_HAVE_PM_WIN32_KLDBG' + echo >>$c '#define PCI_HAVE_PM_WIN32_SYSDBG' + # Warning: MinGW-w64 (incorrectly) provides cfgmgr32 functions + # also in other import libraries, not only in libcfgmgr32.a. + # So always set -lcfgmgr32 as a first library parameter which + # instruct linker to prefer symbols from cfgmgr32.dll. + echo >>$m 'WITH_LIBS+=-lcfgmgr32' + case $cpu in i?86|x86_64) echo_n " i386-ports" echo >>$c '#define PCI_HAVE_PM_INTEL_CONF' - echo >>$m 'WITH_LIBS+=-lioperm' + if "$sys" = "cygwin" ; then + # ioperm is cygwin specific library and used only by lib/i386-io-cygwin.h + echo >>$m 'WITH_LIBS+=-lioperm' + elif "$sys" = "windows" ; then + # advapi32 is windows system library and used only by lib/i386-io-windows.h + echo >>$m 'WITH_LIBS+=-ladvapi32' + fi + ;; esac + EXEEXT=.exe + LIBEXT=dll ;; beos|haiku) case $cpu in @@ -157,6 +199,8 @@ esac echo >>$m "LIBEXT="$LIBEXT +echo >>$m "EXEEXT="$EXEEXT +echo >>$m "LSPCIDIR=\$($LSPCIDIR)" echo >>$c '#define PCI_HAVE_PM_DUMP' echo " dump" @@ -164,7 +208,7 @@ if "$ZLIB" = yes -o "$ZLIB" = no ; then echo "$ZLIB (set manually)" else - if -f /usr/include/zlib.h -o -f /usr/local/include/zlib.h ; then + if -f "$SYSINCLUDE/zlib.h" -o -f /usr/local/include/zlib.h ; then ZLIB=yes else ZLIB=no @@ -185,7 +229,7 @@ if "$DNS" = yes -o "$DNS" = no ; then echo "$DNS (set manually)" else - if -f /usr/include/resolv.h ; then + if "$sys" != "windows" -a -f "$SYSINCLUDE/resolv.h" ; then DNS=yes else DNS=no @@ -205,7 +249,7 @@ PKG_CONFIG=pkg-config fi if "$LIBKMOD" != no ; then - if ! which $PKG_CONFIG >/dev/null ; then + if ! command -v $PKG_CONFIG >/dev/null ; then echo_n "($PKG_CONFIG not found) " elif $PKG_CONFIG libkmod ; then LIBKMOD_DETECTED=1 @@ -235,7 +279,7 @@ if "$HWDB" = yes -o "$HWDB" = no ; then echo "$HWDB (set manually)" else - if `which pkg-config >/dev/null && pkg-config --atleast-version=196 libudev` ; then + if `command -v $PKG_CONFIG >/dev/null && $PKG_CONFIG --atleast-version=196 libudev` ; then HWDB=yes else HWDB=no @@ -257,6 +301,8 @@ else if "$LIBEXT" = so ; then echo >>$m 'PCILIB=$(LIBNAME).$(LIBEXT).$(VERSION)' + elif "$LIBEXT" = dll ; then + echo >>$m 'PCILIB=$(LIBNAME)$(ABI_VERSION).$(LIBEXT)' else echo >>$m 'PCILIB=$(LIBNAME).$(VERSION).$(LIBEXT)' fi @@ -264,11 +310,24 @@ echo >>$m 'LDLIBS='
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/dump.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/dump.c
Changed
@@ -80,7 +80,8 @@ len = z - buf + 1; mn = 0; if (dump_validate(buf, "##:##.# ") && sscanf(buf, "%x:%x.%d", &bn, &dn, &fn) == 3 || - dump_validate(buf, "####:##:##.# ") && sscanf(buf, "%x:%x:%x.%d", &mn, &bn, &dn, &fn) == 4) + dump_validate(buf, "####:##:##.# ") && sscanf(buf, "%x:%x:%x.%d", &mn, &bn, &dn, &fn) == 4 || + dump_validate(buf, "#####:##:##.# ") && sscanf(buf, "%x:%x:%x.%d", &mn, &bn, &dn, &fn) == 4) { dev = pci_get_dev(a, mn, bn, dn, fn); dump_alloc_data(dev, 256); @@ -89,7 +90,9 @@ else if (!len) dev = NULL; else if (dev && - (dump_validate(buf, "##: ") || dump_validate(buf, "###: ")) && + (dump_validate(buf, "##: ") || dump_validate(buf, "###: ") || dump_validate(buf, "####: ") || + dump_validate(buf, "#####: ") || dump_validate(buf, "######: ") || + dump_validate(buf, "#######: ") || dump_validate(buf, "########: ")) && sscanf(buf, "%x: ", &i) == 1) { struct dump_data *dd = dev->aux;
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_service:tar_scm:pciutils-3.9.0.tar.gz/lib/emulated.c
Added
@@ -0,0 +1,299 @@ +/* + * The PCI Library -- Virtual Emulated Config Space Access Functions + * + * Copyright (c) 2022 Pali Rohár + * + * Can be freely distributed and used under the terms of the GNU GPL. + */ + +#include "internal.h" + +static u32 +ioflg_to_pciflg(pciaddr_t ioflg) +{ + u32 flg = 0; + + if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_IO) + flg = PCI_BASE_ADDRESS_SPACE_IO; + else if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM) + { + flg = PCI_BASE_ADDRESS_SPACE_MEMORY; + if (ioflg & PCI_IORESOURCE_MEM_64) + flg |= PCI_BASE_ADDRESS_MEM_TYPE_64; + else + flg |= PCI_BASE_ADDRESS_MEM_TYPE_32; + if (ioflg & PCI_IORESOURCE_PREFETCH) + flg |= PCI_BASE_ADDRESS_MEM_PREFETCH; + } + + return flg; +} + +static u32 +baseres_to_pcires(pciaddr_t addr, pciaddr_t ioflg, int *have_sec, u32 *sec_val) +{ + u32 val = ioflg_to_pciflg(ioflg); + + if (have_sec) + *have_sec = 0; + + if ((val & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO && addr <= 0xffffffff) + val |= addr & PCI_BASE_ADDRESS_IO_MASK; + else if ((val & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) + { + val |= addr & PCI_BASE_ADDRESS_MEM_MASK; + if ((val & PCI_BASE_ADDRESS_MEM_TYPE_64) && have_sec) + { + *have_sec = 1; + *sec_val = addr >> 32; + } + } + + return val; +} + +static inline u32 +even_baseres_to_pcires(pciaddr_t addr, pciaddr_t ioflg) +{ + return baseres_to_pcires(addr, ioflg, NULL, NULL); +} + +static inline u32 +odd_baseres_to_pcires(pciaddr_t addr0, pciaddr_t ioflg0, pciaddr_t addr, pciaddr_t ioflg) +{ + int have_sec; + u32 val; + baseres_to_pcires(addr0, ioflg0, &have_sec, &val); + if (!have_sec) + val = baseres_to_pcires(addr, ioflg, NULL, NULL); + return val; +} + +int +pci_emulated_read(struct pci_dev *d, int pos, byte *buf, int len) +{ + u32 ht = PCI_HEADER_TYPE_NORMAL; + u32 val = 0; + int i; + + if (pos >= 64) + return 0; + + if (len > 4) + return pci_generic_block_read(d, pos, buf, len); + + if (d->device_class == PCI_CLASS_BRIDGE_PCI) + ht = PCI_HEADER_TYPE_BRIDGE; + else if (d->device_class == PCI_CLASS_BRIDGE_CARDBUS) + ht = PCI_HEADER_TYPE_CARDBUS; + + switch (pos & ~3) + { + case PCI_COMMAND: + for (i = 0; i < 6; i++) + { + if (!d->sizei) + continue; + if ((d->flagsi & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_IO) + val |= PCI_COMMAND_IO; + else if ((d->flagsi & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM) + val |= PCI_COMMAND_MEMORY; + } + break; + case PCI_VENDOR_ID: + val = (d->device_id << 16) | d->vendor_id; + break; + case PCI_CLASS_REVISION: + val = (d->device_class << 16) | (d->prog_if << 8) | d->rev_id; + break; + case PCI_CACHE_LINE_SIZE: + val = ht << 16; + break; + case PCI_BASE_ADDRESS_0: + val = even_baseres_to_pcires(d->base_addr0, d->flags0); + break; + case PCI_INTERRUPT_LINE: + val = (d->irq >= 0 && d->irq <= 0xff) ? d->irq : 0; + break; + } + + if ((pos & ~3) == PCI_BASE_ADDRESS_1 && (ht == PCI_HEADER_TYPE_NORMAL || ht == PCI_HEADER_TYPE_BRIDGE)) + val = odd_baseres_to_pcires(d->base_addr0, d->flags0, d->base_addr1, d->flags1); + + if (ht == PCI_HEADER_TYPE_NORMAL) + switch (pos & ~3) + { + case PCI_BASE_ADDRESS_2: + val = even_baseres_to_pcires(d->base_addr2, d->flags2); + break; + case PCI_BASE_ADDRESS_3: + val = odd_baseres_to_pcires(d->base_addr2, d->flags2, d->base_addr3, d->flags3); + break; + case PCI_BASE_ADDRESS_4: + val = even_baseres_to_pcires(d->base_addr4, d->flags4); + break; + case PCI_BASE_ADDRESS_5: + val = odd_baseres_to_pcires(d->base_addr4, d->flags4, d->base_addr5, d->flags5); + break; + case PCI_SUBSYSTEM_VENDOR_ID: + val = (d->subsys_id << 16) | d->subsys_vendor_id; + break; + case PCI_ROM_ADDRESS: + val = d->rom_base_addr & PCI_ROM_ADDRESS_MASK; + if (val) + val |= PCI_ROM_ADDRESS_ENABLE; + break; + } + else if (ht == PCI_HEADER_TYPE_BRIDGE) + switch (pos & ~3) + { + case PCI_COMMAND: + if (d->bridge_size0) + val |= PCI_COMMAND_IO; + if (d->bridge_size1 || d->bridge_size2) + val |= PCI_COMMAND_MEMORY; + break; + case PCI_PRIMARY_BUS: + val = d->bus; + break; + case PCI_IO_BASE: + if (d->bridge_size0) + { + val = (((((d->bridge_base_addr0 + d->bridge_size0 - 1) >> 8) & PCI_IO_RANGE_MASK) << 8) & 0xff00) | + (((d->bridge_base_addr0 >> 8) & PCI_IO_RANGE_MASK) & 0x00ff); + if ((d->bridge_flags0 & PCI_IORESOURCE_IO_16BIT_ADDR) && + d->bridge_base_addr0 + d->bridge_size0 - 1 <= 0xffff) + val |= (PCI_IO_RANGE_TYPE_16 << 8) | PCI_IO_RANGE_TYPE_16; + else + val |= (PCI_IO_RANGE_TYPE_32 << 8) | PCI_IO_RANGE_TYPE_32; + } + else + val = 0xff & PCI_IO_RANGE_MASK; + break; + case PCI_MEMORY_BASE: + if (d->bridge_size1) + val = (((((d->bridge_base_addr1 + d->bridge_size1 - 1) >> 16) & PCI_MEMORY_RANGE_MASK) << 16) & 0xffff0000) | + (((d->bridge_base_addr1 >> 16) & PCI_MEMORY_RANGE_MASK) & 0x0000ffff); + else + val = 0xffff & PCI_MEMORY_RANGE_MASK; + break; + case PCI_PREF_MEMORY_BASE: + if (d->bridge_size2) + { + val = (((((d->bridge_base_addr2 + d->bridge_size2 - 1) >> 16) & PCI_PREF_RANGE_MASK) << 16) & 0xffff0000) | + (((d->bridge_base_addr2 >> 16) & PCI_PREF_RANGE_MASK) & 0x0000ffff); + if ((d->bridge_flags2 & PCI_IORESOURCE_MEM_64) || + d->bridge_base_addr2 + d->bridge_size2 - 1 > 0xffffffff) + val |= (PCI_PREF_RANGE_TYPE_64 << 16) | PCI_PREF_RANGE_TYPE_64; + else + val |= (PCI_PREF_RANGE_TYPE_32 << 16) | PCI_PREF_RANGE_TYPE_32; + } + else + val = 0xffff & PCI_PREF_RANGE_MASK; + break; + case PCI_PREF_BASE_UPPER32: + if (d->bridge_size2) + val = d->bridge_base_addr2 >> 32; + break; + case PCI_PREF_LIMIT_UPPER32: + if (d->bridge_size2)
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/fbsd-device.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/fbsd-device.c
Changed
@@ -159,8 +159,8 @@ free(matches); } -static int -fbsd_fill_info(struct pci_dev *d, int flags) +static void +fbsd_fill_info(struct pci_dev *d, unsigned int flags) { struct pci_conf_io conf; struct pci_bar_io bar; @@ -195,21 +195,19 @@ if (ioctl(d->access->fd, PCIOCGETCONF, &conf) < 0) { - if (errno == ENODEV) - return 0; - d->access->error("fbsd_fill_info: ioctl(PCIOCGETCONF) failed: %s", strerror(errno)); + if (errno != ENODEV) + d->access->error("fbsd_fill_info: ioctl(PCIOCGETCONF) failed: %s", strerror(errno)); + return; } - if (flags & PCI_FILL_IDENT) + if (want_fill(d, flags, PCI_FILL_IDENT)) { d->vendor_id = match.pc_vendor; d->device_id = match.pc_device; } - if (flags & PCI_FILL_CLASS) - { - d->device_class = (match.pc_class << 8) | match.pc_subclass; - } - if (flags & (PCI_FILL_BASES | PCI_FILL_SIZES)) + if (want_fill(d, flags, PCI_FILL_CLASS)) + d->device_class = (match.pc_class << 8) | match.pc_subclass; + if (want_fill(d, flags, PCI_FILL_BASES | PCI_FILL_SIZES)) { d->rom_base_addr = 0; d->rom_size = 0; @@ -226,7 +224,7 @@ if (ioctl(d->access->fd, PCIOCGETBAR, &bar) < 0) { if (errno == ENODEV) - return 0; + return; if (errno == EINVAL) { d->base_addri = 0; @@ -242,9 +240,6 @@ } } } - - return flags & (PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_BASES | - PCI_FILL_SIZES); } static int
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/filter.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/filter.c
Changed
@@ -1,7 +1,7 @@ /* * The PCI Library -- Device Filtering * - * Copyright (c) 1998--2014 Martin Mares <mj@ucw.cz> + * Copyright (c) 1998--2022 Martin Mares <mj@ucw.cz> * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -11,116 +11,184 @@ #include "internal.h" -void pci_filter_init_v33(struct pci_access *a UNUSED, struct pci_filter *f) VERSIONED_ABI; -char *pci_filter_parse_slot_v33(struct pci_filter *f, char *str) VERSIONED_ABI; -char *pci_filter_parse_id_v33(struct pci_filter *f, char *str) VERSIONED_ABI; -int pci_filter_match_v33(struct pci_filter *f, struct pci_dev *d) VERSIONED_ABI; +void pci_filter_init_v38(struct pci_access *a UNUSED, struct pci_filter *f) VERSIONED_ABI; +char *pci_filter_parse_slot_v38(struct pci_filter *f, char *str) VERSIONED_ABI; +char *pci_filter_parse_id_v38(struct pci_filter *f, char *str) VERSIONED_ABI; +int pci_filter_match_v38(struct pci_filter *f, struct pci_dev *d) VERSIONED_ABI; void -pci_filter_init_v33(struct pci_access *a UNUSED, struct pci_filter *f) +pci_filter_init_v38(struct pci_access *a UNUSED, struct pci_filter *f) { + memset((byte *) f, 0, sizeof(*f)); f->domain = f->bus = f->slot = f->func = -1; - f->vendor = f->device = f->device_class = -1; + f->vendor = f->device = -1; + f->device_class = -1; + f->device_class_mask = ~0U; + f->prog_if = -1; } -/* Slot filter syntax: domain:bus:slot.func */ +#define BUF_SIZE 64 -char * -pci_filter_parse_slot_v33(struct pci_filter *f, char *str) +static char * +split_to_fields(char *str, char *buffer, int sep, char **fields, int num_fields) { - char *colon = strrchr(str, ':'); - char *dot = strchr((colon ? colon + 1 : str), '.'); - char *mid = str; - char *e, *bus, *colon2; + if (buffer) + { + if (strlen(str) >= BUF_SIZE) + return "Expression too long"; + strcpy(buffer, str); + str = buffer; + } - if (colon) + int i = 0; + + for (;;) { - *colon++ = 0; - mid = colon; - colon2 = strchr(str, ':'); - if (colon2) + if (i >= num_fields) + return "Too many fields"; + fieldsi++ = str; + while (*str && *str != sep) + str++; + if (!*str) + break; + *str++ = 0; + } + + while (i < num_fields) + fieldsi++ = NULL; + + return NULL; +} + +static int +field_defined(char *field) +{ + return field && field0 && strcmp(field, "*"); +} + +static int +parse_hex_field(char *str, int *outp, unsigned int *maskp, unsigned int max) +{ + unsigned int out = 0; + unsigned int mask = ~0U; + unsigned int bound = 0; + + if (!field_defined(str)) + return 1; // and keep the defaults + + while (*str) + { + int c = *str++; + int d; + + if ((c == 'x' || c == 'X') && maskp) { - *colon2++ = 0; - bus = colon2; - if (str0 && strcmp(str, "*")) - { - long int x = strtol(str, &e, 16); - if ((e && *e) || (x < 0 || x > 0x7fffffff)) - return "Invalid domain number"; - f->domain = x; - } + out = out << 4; + bound = (bound << 4) | 1; + mask = mask << 4; } else - bus = str; - if (bus0 && strcmp(bus, "*")) { - long int x = strtol(bus, &e, 16); - if ((e && *e) || (x < 0 || x > 0xff)) - return "Invalid bus number"; - f->bus = x; + if (c >= '0' && c <= '9') + d = c - '0'; + else if (c >= 'A' && c <= 'F') + d = c - 'A' + 10; + else if (c >= 'a' && c <= 'f') + d = c - 'a' + 10; + else + return 0; + + out = (out << 4) | d; + bound = (bound << 4) | d; + mask = (mask << 4) | 0xf; } + + if (bound > max) + return 0; } - if (dot) - *dot++ = 0; - if (mid0 && strcmp(mid, "*")) - { - long int x = strtol(mid, &e, 16); - if ((e && *e) || (x < 0 || x > 0x1f)) - return "Invalid slot number"; - f->slot = x; - } - if (dot && dot0 && strcmp(dot, "*")) - { - long int x = strtol(dot, &e, 16); - if ((e && *e) || (x < 0 || x > 7)) - return "Invalid function number"; - f->func = x; - } - return NULL; + + *outp = out; + if (maskp) + *maskp = mask; + return 1; } -/* ID filter syntax: vendor:device:class */ +/* Slot filter syntax: domain:bus:slot.func */ char * -pci_filter_parse_id_v33(struct pci_filter *f, char *str) +pci_filter_parse_slot_v38(struct pci_filter *f, char *str) { - char *s, *c, *e; - - if (!*str) - return NULL; - s = strchr(str, ':'); - if (!s) - return "':' expected"; - *s++ = 0; - if (str0 && strcmp(str, "*")) + char bufBUF_SIZE; + char *fields3; + char *err; + + if (err = split_to_fields(str, buf, ':', fields, 3)) + return err; + + int i = 0; + if (fields2) { - long int x = strtol(str, &e, 16); - if ((e && *e) || (x < 0 || x > 0xffff)) - return "Invalid vendor ID"; - f->vendor = x; + if (!parse_hex_field(fields0, &f->domain, NULL, 0x7fffffff)) + return "Invalid domain number"; + i++; } - c = strchr(s, ':');
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/generic.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/generic.c
Changed
@@ -1,7 +1,7 @@ /* * The PCI Library -- Generic Direct Access Functions * - * Copyright (c) 1997--2000 Martin Mares <mj@ucw.cz> + * Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz> * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -11,7 +11,7 @@ #include "internal.h" void -pci_generic_scan_bus(struct pci_access *a, byte *busmap, int bus) +pci_generic_scan_bus(struct pci_access *a, byte *busmap, int domain, int bus) { int dev, multi, ht; struct pci_dev *t; @@ -24,6 +24,7 @@ } busmapbus = 1; t = pci_alloc_dev(a); + t->domain = domain; t->bus = bus; for (dev=0; dev<32; dev++) { @@ -41,6 +42,7 @@ multi = ht & 0x80; ht &= 0x7f; d = pci_alloc_dev(a); + d->domain = t->domain; d->bus = t->bus; d->dev = t->dev; d->func = t->func; @@ -55,7 +57,7 @@ break; case PCI_HEADER_TYPE_BRIDGE: case PCI_HEADER_TYPE_CARDBUS: - pci_generic_scan_bus(a, busmap, pci_read_byte(t, PCI_SECONDARY_BUS)); + pci_generic_scan_bus(a, busmap, domain, pci_read_byte(t, PCI_SECONDARY_BUS)); break; default: a->debug("Device %04x:%02x:%02x.%d has unknown header type %02x.\n", d->domain, d->bus, d->dev, d->func, ht); @@ -66,47 +68,82 @@ } void -pci_generic_scan(struct pci_access *a) +pci_generic_scan_domain(struct pci_access *a, int domain) { byte busmap256; memset(busmap, 0, sizeof(busmap)); - pci_generic_scan_bus(a, busmap, 0); + pci_generic_scan_bus(a, busmap, domain, 0); } -unsigned int -pci_generic_fill_info(struct pci_dev *d, unsigned int flags) +void +pci_generic_scan(struct pci_access *a) { - struct pci_access *a = d->access; - unsigned int done = 0; + pci_generic_scan_domain(a, 0); +} - if ((flags & (PCI_FILL_BASES | PCI_FILL_ROM_BASE)) && d->hdrtype < 0) +static int +get_hdr_type(struct pci_dev *d) +{ + if (d->hdrtype < 0) d->hdrtype = pci_read_byte(d, PCI_HEADER_TYPE) & 0x7f; + return d->hdrtype; +} - if (flags & PCI_FILL_IDENT) +void +pci_generic_fill_info(struct pci_dev *d, unsigned int flags) +{ + struct pci_access *a = d->access; + struct pci_cap *cap; + + if (want_fill(d, flags, PCI_FILL_IDENT)) { d->vendor_id = pci_read_word(d, PCI_VENDOR_ID); d->device_id = pci_read_word(d, PCI_DEVICE_ID); - done |= PCI_FILL_IDENT; } - if (flags & PCI_FILL_CLASS) + if (want_fill(d, flags, PCI_FILL_CLASS)) + d->device_class = pci_read_word(d, PCI_CLASS_DEVICE); + + if (want_fill(d, flags, PCI_FILL_CLASS_EXT)) { - d->device_class = pci_read_word(d, PCI_CLASS_DEVICE); - done |= PCI_FILL_CLASS; + d->prog_if = pci_read_byte(d, PCI_CLASS_PROG); + d->rev_id = pci_read_byte(d, PCI_REVISION_ID); } - if (flags & PCI_FILL_IRQ) + if (want_fill(d, flags, PCI_FILL_SUBSYS)) { - d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE); - done |= PCI_FILL_IRQ; + switch (get_hdr_type(d)) + { + case PCI_HEADER_TYPE_NORMAL: + d->subsys_vendor_id = pci_read_word(d, PCI_SUBSYSTEM_VENDOR_ID); + d->subsys_id = pci_read_word(d, PCI_SUBSYSTEM_ID); + break; + case PCI_HEADER_TYPE_BRIDGE: + cap = pci_find_cap(d, PCI_CAP_ID_SSVID, PCI_CAP_NORMAL); + if (cap) + { + d->subsys_vendor_id = pci_read_word(d, cap->addr + PCI_SSVID_VENDOR); + d->subsys_id = pci_read_word(d, cap->addr + PCI_SSVID_DEVICE); + } + break; + case PCI_HEADER_TYPE_CARDBUS: + d->subsys_vendor_id = pci_read_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID); + d->subsys_id = pci_read_word(d, PCI_CB_SUBSYSTEM_ID); + break; + default: + clear_fill(d, PCI_FILL_SUBSYS); + } } - if (flags & PCI_FILL_BASES) + if (want_fill(d, flags, PCI_FILL_IRQ)) + d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE); + + if (want_fill(d, flags, PCI_FILL_BASES)) { int cnt = 0, i; memset(d->base_addr, 0, sizeof(d->base_addr)); - switch (d->hdrtype) + switch (get_hdr_type(d)) { case PCI_HEADER_TYPE_NORMAL: cnt = 6; @@ -148,14 +185,13 @@ } } } - done |= PCI_FILL_BASES; } - if (flags & PCI_FILL_ROM_BASE) + if (want_fill(d, flags, PCI_FILL_ROM_BASE)) { int reg = 0; d->rom_base_addr = 0; - switch (d->hdrtype) + switch (get_hdr_type(d)) { case PCI_HEADER_TYPE_NORMAL: reg = PCI_ROM_ADDRESS; @@ -170,13 +206,9 @@ if (u != 0xffffffff) d->rom_base_addr = u; } - done |= PCI_FILL_ROM_BASE; } - if (flags & (PCI_FILL_CAPS | PCI_FILL_EXT_CAPS)) - done |= pci_scan_caps(d, flags); - - return done; + pci_scan_caps(d, flags); } static int
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/header.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/header.h
Changed
@@ -219,7 +219,7 @@ #define PCI_EXT_CAP_ID_PB 0x04 /* Power Budgeting */ #define PCI_EXT_CAP_ID_RCLINK 0x05 /* Root Complex Link Declaration */ #define PCI_EXT_CAP_ID_RCILINK 0x06 /* Root Complex Internal Link Declaration */ -#define PCI_EXT_CAP_ID_RCECOLL 0x07 /* Root Complex Event Collector */ +#define PCI_EXT_CAP_ID_RCEC 0x07 /* Root Complex Event Collector */ #define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function Virtual Channel */ #define PCI_EXT_CAP_ID_VC2 0x09 /* Virtual Channel (2nd ID) */ #define PCI_EXT_CAP_ID_RCRB 0x0a /* Root Complex Register Block */ @@ -252,6 +252,7 @@ #define PCI_EXT_CAP_ID_LMR 0x27 /* Lane Margining at Receiver */ #define PCI_EXT_CAP_ID_HIER_ID 0x28 /* Hierarchy ID */ #define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */ +#define PCI_EXT_CAP_ID_DOE 0x2e /* Data Object Exchange */ /*** Definitions of capabilities ***/ @@ -536,7 +537,7 @@ #define PCI_HT_SEC_CMD 2 /* Command Register */ #define PCI_HT_SEC_CMD_WR 0x0001 /* Warm Reset */ #define PCI_HT_SEC_CMD_DE 0x0002 /* Double-Ended */ -#define PCI_HT_SEC_CMD_DN 0x0076 /* Device Number */ +#define PCI_HT_SEC_CMD_DN 0x007c /* Device Number */ #define PCI_HT_SEC_CMD_CS 0x0080 /* Chain Side */ #define PCI_HT_SEC_CMD_HH 0x0100 /* Host Hide */ #define PCI_HT_SEC_CMD_AS 0x0400 /* Act as Slave */ @@ -873,6 +874,13 @@ #define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */ #define PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */ #define PCI_EXP_DEVCAP2 0x24 /* Device capabilities 2 */ +#define PCI_EXP_DEVCAP2_TIMEOUT_RANGE(x) ((x) & 0xf) /* Completion Timeout Ranges Supported */ +#define PCI_EXP_DEVCAP2_TIMEOUT_DIS 0x0010 /* Completion Timeout Disable Supported */ +#define PCI_EXP_DEVCAP2_ARI 0x0020 /* ARI Forwarding Supported */ +#define PCI_EXP_DEVCAP2_ATOMICOP_ROUTING 0x0040 /* AtomicOp Routing Supported */ +#define PCI_EXP_DEVCAP2_32BIT_ATOMICOP_COMP 0x0080 /* 32bit AtomicOp Completer Supported */ +#define PCI_EXP_DEVCAP2_64BIT_ATOMICOP_COMP 0x0100 /* 64bit AtomicOp Completer Supported */ +#define PCI_EXP_DEVCAP2_128BIT_CAS_COMP 0x0200 /* 128bit CAS Completer Supported */ #define PCI_EXP_DEVCAP2_NROPRPRP 0x0400 /* No RO-enabled PR-PR Passing */ #define PCI_EXP_DEVCAP2_LTR 0x0800 /* LTR supported */ #define PCI_EXP_DEVCAP2_TPH_COMP(x) (((x) >> 12) & 3) /* TPH Completer Supported */ @@ -887,18 +895,14 @@ #define PCI_EXP_DEVCAP2_EPR_INIT 0x04000000 /* Emergency Power Reduction Initialization Required */ #define PCI_EXP_DEVCAP2_FRS 0x80000000 /* FRS supported */ #define PCI_EXP_DEVCTL2 0x28 /* Device Control */ -#define PCI_EXP_DEV2_TIMEOUT_RANGE(x) ((x) & 0xf) /* Completion Timeout Ranges Supported */ -#define PCI_EXP_DEV2_TIMEOUT_VALUE(x) ((x) & 0xf) /* Completion Timeout Value */ -#define PCI_EXP_DEV2_TIMEOUT_DIS 0x0010 /* Completion Timeout Disable Supported */ -#define PCI_EXP_DEV2_ATOMICOP_REQUESTER_EN 0x0040 /* AtomicOp RequesterEnable */ -#define PCI_EXP_DEV2_ATOMICOP_EGRESS_BLOCK 0x0080 /* AtomicOp Egress Blocking */ -#define PCI_EXP_DEV2_ARI 0x0020 /* ARI Forwarding */ -#define PCI_EXP_DEVCAP2_ATOMICOP_ROUTING 0x0040 /* AtomicOp Routing Supported */ -#define PCI_EXP_DEVCAP2_32BIT_ATOMICOP_COMP 0x0080 /* 32bit AtomicOp Completer Supported */ -#define PCI_EXP_DEVCAP2_64BIT_ATOMICOP_COMP 0x0100 /* 64bit AtomicOp Completer Supported */ -#define PCI_EXP_DEVCAP2_128BIT_CAS_COMP 0x0200 /* 128bit CAS Completer Supported */ -#define PCI_EXP_DEV2_LTR 0x0400 /* LTR enabled */ -#define PCI_EXP_DEV2_OBFF(x) (((x) >> 13) & 3) /* OBFF enabled */ +#define PCI_EXP_DEVCTL2_TIMEOUT_VALUE(x) ((x) & 0xf) /* Completion Timeout Value */ +#define PCI_EXP_DEVCTL2_TIMEOUT_DIS 0x0010 /* Completion Timeout Disable */ +#define PCI_EXP_DEVCTL2_ARI 0x0020 /* ARI Forwarding */ +#define PCI_EXP_DEVCTL2_ATOMICOP_REQUESTER_EN 0x0040 /* AtomicOp RequesterEnable */ +#define PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK 0x0080 /* AtomicOp Egress Blocking */ +#define PCI_EXP_DEVCTL2_LTR 0x0400 /* LTR enabled */ +#define PCI_EXP_DEVCTL2_10BIT_TAG_REQ 0x1000 /* 10 Bit Tag Requester enabled */ +#define PCI_EXP_DEVCTL2_OBFF(x) (((x) >> 13) & 3) /* OBFF enabled */ #define PCI_EXP_DEVSTA2 0x2a /* Device Status */ #define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities */ #define PCI_EXP_LNKCAP2_SPEED(x) (((x) >> 1) & 0x7f) @@ -914,7 +918,7 @@ #define PCI_EXP_LNKCTL2_MARGIN(x) (((x) >> 7) & 7) /* Transmit Margin */ #define PCI_EXP_LNKCTL2_MOD_CMPLNC 0x0400 /* Enter Modified Compliance */ #define PCI_EXP_LNKCTL2_CMPLNC_SOS 0x0800 /* Compliance SOS */ -#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 0xf) /* Compliance De-emphasis */ +#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 0xf) /* Compliance Preset/De-emphasis */ #define PCI_EXP_LNKSTA2 0x32 /* Link Status */ #define PCI_EXP_LINKSTA2_DEEMPHASIS(x) ((x) & 1) /* Current De-emphasis Level */ #define PCI_EXP_LINKSTA2_EQU_COMP 0x02 /* Equalization Complete */ @@ -1048,6 +1052,12 @@ #define PCI_RCLINK_LINK_ADDR 8 /* Link Entry: Address (64-bit) */ #define PCI_RCLINK_LINK_SIZE 16 /* Link Entry: sizeof */ +/* Root Complex Event Collector Endpoint Association */ +#define PCI_RCEC_EP_CAP_VER(reg) (((reg) >> 16) & 0xf) +#define PCI_RCEC_BUSN_REG_VER 0x02 /* as per PCIe sec 7.9.10.1 */ +#define PCI_RCEC_RCIEP_BMAP 0x0004 /* as per PCIe sec 7.9.10.2 */ +#define PCI_RCEC_BUSN_REG 0x0008 /* as per PCIe sec 7.9.10.3 */ + /* PCIe Vendor-Specific Capability */ #define PCI_EVNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_EVNDR_REGISTERS 8 /* Vendor-Specific Registers */ @@ -1058,24 +1068,146 @@ #define PCI_DVSEC_VENDOR_ID_CXL 0x1e98 /* Designated Vendor-Specific Vendor ID for CXL */ #define PCI_DVSEC_ID_CXL 0 /* Designated Vendor-Specific ID for Intel CXL */ -/* PCIe CXL Designated Vendor-Specific Capabilities, Control, Status */ -#define PCI_CXL_CAP 0x0a /* CXL Capability Register */ -#define PCI_CXL_CAP_CACHE 0x0001 /* CXL.cache Protocol Support */ -#define PCI_CXL_CAP_IO 0x0002 /* CXL.io Protocol Support */ -#define PCI_CXL_CAP_MEM 0x0004 /* CXL.mem Protocol Support */ -#define PCI_CXL_CAP_MEM_HWINIT 0x0008 /* CXL.mem Initalizes with HW/FW Support */ -#define PCI_CXL_CAP_HDM_CNT(x) (((x) & (3 << 4)) >> 4) /* CXL Number of HDM ranges */ -#define PCI_CXL_CAP_VIRAL 0x4000 /* CXL Viral Handling Support */ -#define PCI_CXL_CTRL 0x0c /* CXL Control Register */ -#define PCI_CXL_CTRL_CACHE 0x0001 /* CXL.cache Protocol Enable */ -#define PCI_CXL_CTRL_IO 0x0002 /* CXL.io Protocol Enable */ -#define PCI_CXL_CTRL_MEM 0x0004 /* CXL.mem Protocol Enable */ -#define PCI_CXL_CTRL_CACHE_SF_COV(x) (((x) & (0x1f << 3)) >> 3) /* Snoop Filter Coverage */ -#define PCI_CXL_CTRL_CACHE_SF_GRAN(x) (((x) & (0x7 << 8)) >> 8) /* Snoop Filter Granularity */ -#define PCI_CXL_CTRL_CACHE_CLN 0x0800 /* CXL.cache Performance Hint on Clean Evictions */ -#define PCI_CXL_CTRL_VIRAL 0x4000 /* CXL Viral Handling Enable */ -#define PCI_CXL_STATUS 0x0e /* CXL Status Register */ -#define PCI_CXL_STATUS_VIRAL 0x4000 /* CXL Viral Handling Status */ +/* PCIe CXL Designated Vendor-Specific Capabilities for Devices: Control, Status */ +#define PCI_CXL_DEV_LEN 0x38 /* CXL Device DVSEC Length */ +#define PCI_CXL_DEV_CAP 0x0a /* CXL Capability Register */ +#define PCI_CXL_DEV_CAP_CACHE 0x0001 /* CXL.cache Protocol Support */ +#define PCI_CXL_DEV_CAP_IO 0x0002 /* CXL.io Protocol Support */ +#define PCI_CXL_DEV_CAP_MEM 0x0004 /* CXL.mem Protocol Support */ +#define PCI_CXL_DEV_CAP_MEM_HWINIT 0x0008 /* CXL.mem Initializes with HW/FW Support */ +#define PCI_CXL_DEV_CAP_HDM_CNT(x) (((x) & (3 << 4)) >> 4) /* CXL Number of HDM ranges */ +#define PCI_CXL_DEV_CAP_VIRAL 0x4000 /* CXL Viral Handling Support */ +#define PCI_CXL_DEV_CTRL 0x0c /* CXL Control Register */ +#define PCI_CXL_DEV_CTRL_CACHE 0x0001 /* CXL.cache Protocol Enable */ +#define PCI_CXL_DEV_CTRL_IO 0x0002 /* CXL.io Protocol Enable */ +#define PCI_CXL_DEV_CTRL_MEM 0x0004 /* CXL.mem Protocol Enable */ +#define PCI_CXL_DEV_CTRL_CACHE_SF_COV(x) (((x) & (0x1f << 3)) >> 3) /* Snoop Filter Coverage */ +#define PCI_CXL_DEV_CTRL_CACHE_SF_GRAN(x) (((x) & (0x7 << 8)) >> 8) /* Snoop Filter Granularity */ +#define PCI_CXL_DEV_CTRL_CACHE_CLN 0x0800 /* CXL.cache Performance Hint on Clean Evictions */ +#define PCI_CXL_DEV_CTRL_VIRAL 0x4000 /* CXL Viral Handling Enable */ +#define PCI_CXL_DEV_STATUS 0x0e /* CXL Status Register */ +#define PCI_CXL_DEV_STATUS_VIRAL 0x4000 /* CXL Viral Handling Status */ +#define PCI_CXL_DEV_STATUS2 0x12 +#define PCI_CXL_DEV_STATUS_CACHE_INV 0x0001 +#define PCI_CXL_DEV_STATUS_RC 0x0002 /* Device Reset Complete */ +#define PCI_CXL_DEV_STATUS_RE 0x0004 /* Device Reset Error */ +#define PCI_CXL_DEV_STATUS_PMC 0x8000 /* Power Management Init Complete */ +#define PCI_CXL_DEV_CAP2 0x16 +#define PCI_CXL_DEV_CAP2_CACHE_UNK 0x0000 /* Cache Size Isn't Reported */ +#define PCI_CXL_DEV_CAP2_CACHE_64K 0x0001 /* Unit Size 64K */ +#define PCI_CXL_DEV_CAP2_CACHE_1M 0x0002 /* Unit Size 1M */ +#define PCI_CXL_DEV_RANGE1_SIZE_HI 0x18 +#define PCI_CXL_DEV_RANGE1_SIZE_LO 0x1c +#define PCI_CXL_RANGE_VALID 0x0001 +#define PCI_CXL_RANGE_ACTIVE 0x0002 +#define PCI_CXL_RANGE_TYPE(x) (((x) >> 2) & 0x7) +#define PCI_CXL_RANGE_CLASS(x) (((x) >> 5) & 0x7) +#define PCI_CXL_RANGE_INTERLEAVE(x) (((x) >> 8) & 0x1f) +#define PCI_CXL_RANGE_TIMEOUT(x) (((x) >> 13) & 0x7) +#define PCI_CXL_DEV_RANGE1_BASE_HI 0x20 +#define PCI_CXL_DEV_RANGE1_BASE_LO 0x24 +#define PCI_CXL_DEV_RANGE2_SIZE_HI 0x28 +#define PCI_CXL_DEV_RANGE2_SIZE_LO 0x2c +#define PCI_CXL_DEV_RANGE2_BASE_HI 0x30 +#define PCI_CXL_DEV_RANGE2_BASE_LO 0x34 + +/* PCIe CXL 2.0 Designated Vendor-Specific Capabilities for Ports */ +#define PCI_CXL_PORT_EXT_LEN 0x28 /* CXL Extensions DVSEC for Ports Length */ +#define PCI_CXL_PORT_EXT_STATUS 0x0a /* Port Extension Status */ +#define PCI_CXL_PORT_PM_INIT_COMPLETE 0x1 /* Port Power Management Initialization Complete */ +#define PCI_CXL_PORT_CTRL 0x0c /* Port Control Override */ +#define PCI_CXL_PORT_UNMASK_SBR 0x0001 /* Unmask SBR */ +#define PCI_CXL_PORT_UNMASK_LINK 0x0002 /* Unmask Link Disable */ +#define PCI_CXL_PORT_ALT_MEMORY 0x0004 /* Alt Memory and ID Space Enable */ +#define PCI_CXL_PORT_ALT_BME 0x0008 /* Alt BME */ +#define PCI_CXL_PORT_VIRAL_EN 0x4000 /* Viral Enable */ +#define PCI_CXL_PORT_ALT_BUS_BASE 0xe +#define PCI_CXL_PORT_ALT_BUS_LIMIT 0xf +#define PCI_CXL_PORT_ALT_MEM_BASE 0x10 +#define PCI_CXL_PORT_ALT_MEM_LIMIT 0x12 + +/* PCIe CXL 2.0 Designated Vendor-Specific Capabilities for Register Locator */ +#define PCI_CXL_RL_BLOCK1_LO 0x0c + +/* PCIe CXL Designated Vendor-Specific Capabilities for Global Persistent Flush */ +#define PCI_CXL_GPF_DEV_LEN 0x10 +#define PCI_CXL_GPF_DEV_PHASE2_DUR 0x0a /* GPF Phase 2 Duration Register */ +#define PCI_CXL_GPF_DEV_PHASE2_POW 0x0c /* GPF Phase 2 Power Register */ +#define PCI_CXL_GPF_DEV_1US 0x0 +#define PCI_CXL_GPF_DEV_10US 0x1 +#define PCI_CXL_GPF_DEV_100US 0x2 +#define PCI_CXL_GPF_DEV_1MS 0x3 +#define PCI_CXL_GPF_DEV_10MS 0x4 +#define PCI_CXL_GPF_DEV_100MS 0x5 +#define PCI_CXL_GPF_DEV_1S 0x6 +#define PCI_CXL_GPF_DEV_10S 0x7 +#define PCI_CXL_GPF_PORT_LEN 0x10 +#define PCI_CXL_GPF_PORT_PHASE1_CTRL 0x0c /* GPF Phase 1 Control Register */ +#define PCI_CXL_GPF_PORT_PHASE2_CTRL 0x0e /* GPF Phase 2 Control Register */ +#define PCI_CXL_GPF_PORT_1US 0x0 +#define PCI_CXL_GPF_PORT_10US 0x1 +#define PCI_CXL_GPF_PORT_100US 0x2 +#define PCI_CXL_GPF_PORT_1MS 0x3 +#define PCI_CXL_GPF_PORT_10MS 0x4 +#define PCI_CXL_GPF_PORT_100MS 0x5 +#define PCI_CXL_GPF_PORT_1S 0x6 +#define PCI_CXL_GPF_PORT_10S 0x7 + +/* PCIe CXL Designated Vendor-Specific Capabilities for Flex Bus Port */ +#define PCI_CXL_FB_LEN 0x20 +#define PCI_CXL_FB_PORT_CAP 0x0a /* CXL Flex Bus Port Capability Register */ +#define PCI_CXL_FB_CAP_CACHE 0x0001 /* CXL.cache Capable */
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/hurd.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/hurd.c
Changed
@@ -73,6 +73,7 @@ hurd_init_dev(struct pci_dev *d) { d->aux = pci_malloc(d->access, sizeof(mach_port_t)); + *((mach_port_t *) d->aux) = MACH_PORT_NULL; } /* Deallocate the port and free its space */ @@ -87,6 +88,27 @@ pci_mfree(d->aux); } +static mach_port_t +device_port_lookup(struct pci_dev *d) +{ + char serverNAME_MAX; + mach_port_t device_port = *((mach_port_t *) d->aux); + + if (device_port != MACH_PORT_NULL) + return device_port; + + snprintf(server, NAME_MAX, "%s/%04x/%02x/%02x/%01u/%s", + _SERVERS_BUS_PCI, d->domain, d->bus, d->dev, d->func, + FILE_CONFIG_NAME); + device_port = file_name_lookup(server, 0, 0); + + if (device_port == MACH_PORT_NULL) + d->access->error("Cannot find the PCI arbiter"); + + *((mach_port_t *) d->aux) = device_port; + return device_port; +} + /* Walk through the FS tree to see what is allowed for us */ static void enum_devices(const char *parent, struct pci_access *a, int domain, int bus, @@ -96,10 +118,6 @@ DIR *dir; struct dirent *entry; char pathNAME_MAX; - char serverNAME_MAX; - uint32_t vd; - uint8_t ht; - mach_port_t device_port; struct pci_dev *d; dir = opendir(parent); @@ -128,8 +146,8 @@ if (closedir(dir) < 0) a->warning("Cannot close directory: %s (%s)", parent, strerror(errno)); - a->error("Wrong directory name: %s (number expected) probably \ - not connected to an arbiter", entry->d_name); + a->error("Wrong directory name: %s (number expected) probably " + "not connected to an arbiter", entry->d_name); } /* @@ -154,8 +172,7 @@ if (closedir(dir) < 0) a->warning("Cannot close directory: %s (%s)", parent, strerror(errno)); - a->error("Wrong directory tree, probably not connected \ - to an arbiter"); + a->error("Wrong directory tree, probably not connected to an arbiter"); } enum_devices(path, a, domain, bus, dev, func, lev + 1); @@ -167,31 +184,12 @@ continue; /* We found an available virtual device, add it to our list */ - snprintf(server, NAME_MAX, "%s/%04x/%02x/%02x/%01u/%s", - _SERVERS_BUS_PCI, domain, bus, dev, func, entry->d_name); - device_port = file_name_lookup(server, 0, 0); - if (device_port == MACH_PORT_NULL) - { - if (closedir(dir) < 0) - a->warning("Cannot close directory: %s (%s)", parent, - strerror(errno)); - a->error("Cannot open %s", server); - } - d = pci_alloc_dev(a); - *((mach_port_t *) d->aux) = device_port; + d->domain = domain; d->bus = bus; d->dev = dev; d->func = func; pci_link_dev(a, d); - - vd = pci_read_long(d, PCI_VENDOR_ID); - ht = pci_read_byte(d, PCI_HEADER_TYPE); - - d->vendor_id = vd & 0xffff; - d->device_id = vd >> 16U; - d->known_fields = PCI_FILL_IDENT; - d->hdrtype = ht; } } @@ -217,33 +215,27 @@ int err; size_t nread; char *data; - mach_port_t device_port; + mach_port_t device_port = device_port_lookup(d); - nread = len; - device_port = *((mach_port_t *) d->aux); if (len > 4) - err = !pci_generic_block_read(d, pos, buf, nread); - else - { - data = (char *) buf; - err = pci_conf_read(device_port, pos, &data, &nread, len); + return pci_generic_block_read(d, pos, buf, len); - if (data != (char *) buf) - { - if (nread > (size_t) len) /* Sanity check for bogus server. */ - { - vm_deallocate(mach_task_self(), (vm_address_t) data, nread); - return 0; - } + data = (char *) buf; + err = pci_conf_read(device_port, pos, &data, &nread, len); - memcpy(buf, data, nread); + if (data != (char *) buf) + { + if (nread > (size_t) len) /* Sanity check for bogus server. */ + { vm_deallocate(mach_task_self(), (vm_address_t) data, nread); + return 0; } + + memcpy(buf, data, nread); + vm_deallocate(mach_task_self(), (vm_address_t) data, nread); } - if (err) - return 0; - return nread == (size_t) len; + return !err && nread == (size_t) len; } /* @@ -256,33 +248,29 @@ { int err; size_t nwrote; - mach_port_t device_port; + mach_port_t device_port = device_port_lookup(d); - nwrote = len; - device_port = *((mach_port_t *) d->aux); if (len > 4) - err = !pci_generic_block_write(d, pos, buf, len); - else - err = pci_conf_write(device_port, pos, (char *) buf, len, &nwrote); - if (err) - return 0; + return pci_generic_block_write(d, pos, buf, len); + + err = pci_conf_write(device_port, pos, (char *) buf, len, &nwrote); - return nwrote == (size_t) len; + return !err && nwrote == (size_t) len; } /* Get requested info from the server */ -static void +static int hurd_fill_regions(struct pci_dev *d) { - mach_port_t device_port = *((mach_port_t *) d->aux); + mach_port_t device_port = device_port_lookup(d); struct pci_bar regions6; char *buf = (char *) ®ions; size_t size = sizeof(regions); int err = pci_get_dev_regions(device_port, &buf, &size); if (err) - return; + return 0; if ((char *) ®ions != buf) { @@ -290,7 +278,7 @@ if (size > sizeof(regions)) { vm_deallocate(mach_task_self(), (vm_address_t) buf, size); - return; + return 0; } memcpy(®ions, buf, size); @@ -307,22 +295,23 @@
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-beos.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-beos.h
Changed
@@ -16,10 +16,9 @@ return 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - return 1; } static inline u8
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-cygwin.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-cygwin.h
Changed
@@ -14,11 +14,10 @@ return (iopl(3) < 0) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - iopl(3); - return -1; + iopl(0); } static inline void intel_io_lock(void)
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-djgpp.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-djgpp.h
Changed
@@ -24,10 +24,9 @@ return 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - return 1; } static inline void intel_io_lock(void)
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-haiku.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-haiku.h
Changed
@@ -68,11 +68,10 @@ return (poke_driver_fd < 0) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { close(poke_driver_fd); - return 1; } static inline u8
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-hurd.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-hurd.h
Changed
@@ -18,12 +18,10 @@ return (ioperm (0, 65535, 1) == -1) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { ioperm (0, 65535, 0); - - return -1; } static inline void intel_io_lock(void)
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-linux.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-linux.h
Changed
@@ -7,18 +7,61 @@ */ #include <sys/io.h> +#include <errno.h> + +static int ioperm_enabled; +static int iopl_enabled; static int intel_setup_io(struct pci_access *a UNUSED) { - return (iopl(3) < 0) ? 0 : 1; + if (ioperm_enabled || iopl_enabled) + return 1; + + /* + * Before Linux 2.6.8, only the first 0x3ff I/O ports permissions can be + * modified via ioperm(). Since 2.6.8 all ports are supported. + * Since Linux 5.5, EFLAGS-based iopl() implementation was removed and + * replaced by new TSS-IOPB-map-all-based emulator. Before Linux 5.5, + * EFLAGS-based iopl() allowed userspace to enable/disable interrupts, + * which is dangerous. So prefer usage of ioperm() and fallback to iopl(). + */ + if (ioperm(0xcf8, 8, 1) < 0) /* conf1 + conf2 ports */ + { + if (errno == EINVAL) /* ioperm() unsupported */ + { + if (iopl(3) < 0) + return 0; + iopl_enabled = 1; + return 1; + } + return 0; + } + if (ioperm(0xc000, 0xfff, 1) < 0) /* remaining conf2 ports */ + { + ioperm(0xcf8, 8, 0); + return 0; + } + + ioperm_enabled = 1; + return 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { - iopl(3); - return -1; + if (ioperm_enabled) + { + ioperm(0xcf8, 8, 0); + ioperm(0xc000, 0xfff, 0); + ioperm_enabled = 0; + } + + if (iopl_enabled) + { + iopl(0); + iopl_enabled = 0; + } } static inline void intel_io_lock(void)
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-sunos.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-sunos.h
Changed
@@ -16,11 +16,10 @@ return (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) < 0) ? 0 : 1; } -static inline int +static inline void intel_cleanup_io(struct pci_access *a UNUSED) { /* FIXME: How to switch off I/O port access? */ - return 1; } static inline u8
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-io-windows.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-io-windows.h
Changed
@@ -3,14 +3,83 @@ * * Copyright (c) 2004 Alexander Stock <stock.alexander@gmx.de> * Copyright (c) 2006 Martin Mares <mj@ucw.cz> + * Copyright (c) 2021 Pali Rohár <pali@kernel.org> * * Can be freely distributed and used under the terms of the GNU GPL. */ #include <io.h> #include <windows.h> +#include <aclapi.h> -#ifndef __GNUC__ +#ifdef _MSC_VER +/* MSVC compiler provides I/O port intrinsics for both 32 and 64-bit modes. */ +#pragma intrinsic(_outp) +#pragma intrinsic(_outpw) +#pragma intrinsic(_outpd) +#pragma intrinsic(_inp) +#pragma intrinsic(_inpw) +#pragma intrinsic(_inpd) +#elif defined(_WIN64) || defined(_UCRT) +/* + * For other compilers I/O port intrinsics are available in <intrin.h> header + * file either as inline/external functions or macros. Beware that <intrin.h> + * names are different than MSVC intrinsics names and glibc function names. + * Usage of <intrin.h> is also the prefered way for 64-bit mode or when using + * new UCRT library. + */ +#include <intrin.h> +#define _outp(x,y) __outbyte(x,y) +#define _outpw(x,y) __outword(x,y) +#define _outpd(x,y) __outdword(x,y) +#define _inp(x) __inbyte(x) +#define _inpw(x) __inword(x) +#define _inpd(x) __indword(x) +#elif defined(__CRTDLL__) || (defined(__MSVCRT_VERSION__) && __MSVCRT_VERSION__ < 0x400) +/* + * Old 32-bit CRTDLL library and pre-4.00 MSVCRT library do not provide I/O + * port functions. As these libraries exist only in 32-bit mode variant, + * implement I/O port functions via 32-bit inline assembly. + */ +static inline int _outp(unsigned short port, int databyte) +{ + asm volatile ("outb %b0, %w1" : : "a" (databyte), "Nd" (port)); + return databyte; +} +static inline unsigned short _outpw(unsigned short port, unsigned short dataword) +{ + asm volatile ("outw %w0, %w1" : : "a" (dataword), "Nd" (port)); + return dataword; +} +static inline unsigned long _outpd(unsigned short port, unsigned long dataword) +{ + asm volatile ("outl %0, %w1" : : "a" (dataword), "Nd" (port)); + return dataword; +} +static inline int _inp(unsigned short port) +{ + unsigned char ret; + asm volatile ("inb %w1, %0" : "=a" (ret) : "Nd" (port)); + return ret; +} +static inline unsigned short _inpw(unsigned short port) +{ + unsigned short ret; + asm volatile ("inw %w1, %0" : "=a" (ret) : "Nd" (port)); + return ret; +} +static inline unsigned long _inpd(unsigned short port) +{ + unsigned long ret; + asm volatile ("inl %w1, %0" : "=a" (ret) : "Nd" (port)); + return ret; +} +#elif !defined(__GNUC__) +/* + * Old 32-bit MSVCRT (non-UCRT) library provides I/O port functions. Function + * prototypes are defined in <conio.h> header file but they are missing in + * some MinGW toolchains. So for GCC compiler define them manually. + */ #include <conio.h> #else int _outp(unsigned short port, int databyte); @@ -29,43 +98,1268 @@ #define inw(x) _inpw(x) #define inl(x) _inpd(x) -static int -intel_setup_io(struct pci_access *a) +/* + * Define __readeflags() for MSVC and GCC compilers. + * MSVC since version 14.00 included in WDK 6001 and since version 15.00 + * included in VS 2008 provides __readeflags() intrinsic for both 32 and 64-bit + * modes. WDK 6001 defines macro __BUILDMACHINE__ to value WinDDK. VS 2008 does + * not define this macro at all. MSVC throws error if name of user defined + * function conflicts with some MSVC intrinsic. + * MSVC supports inline assembly via __asm keyword in 32-bit mode only. + * GCC version 4.9.0 and higher provides __builtin_ia32_readeflags_uXX() + * builtin for XX-mode. This builtin is also available as __readeflags() + * function indirectly via <x86intrin.h> header file. + */ +#if defined(_MSC_VER) && (_MSC_VER >= 1500 || (_MSC_VER >= 1400 && defined(__BUILDMACHINE__))) +#pragma intrinsic(__readeflags) +#elif defined(__GNUC__) && ((__GNUC__ == 4 && __GNUC_MINOR__ >= 9) || (__GNUC__ > 4)) +#include <x86intrin.h> +#elif defined(_MSC_VER) && defined(_M_IX86) +static inline unsigned int +__readeflags(void) +{ + __asm pushfd; + __asm pop eax; +} +#elif defined(__GNUC__) +static inline unsigned +#ifdef __x86_64__ +long long +#endif +int +__readeflags(void) { - typedef int (*MYPROC)(void); - MYPROC InitializeWinIo; - HMODULE lib; + unsigned +#ifdef __x86_64__ + long long +#endif + int eflags; + asm volatile ("pushf\n\tpop %0\n" : "=r" (eflags)); + return eflags; +} +#else +#error "Unsupported compiler" +#endif + +/* Read IOPL of the current process, IOPL is stored in eflag bits 13:12. */ +#define read_iopl() ((__readeflags() >> 12) & 0x3) + +/* Unfortunately i586-mingw32msvc toolchain does not provide this constant. */ +#ifndef PROCESS_QUERY_LIMITED_INFORMATION +#define PROCESS_QUERY_LIMITED_INFORMATION 0x1000 +#endif + +/* Unfortunately some toolchains do not provide this constant. */ +#ifndef SE_IMPERSONATE_NAME +#define SE_IMPERSONATE_NAME TEXT("SeImpersonatePrivilege") +#endif + +/* + * These psapi functions are available in kernel32.dll library with K32 prefix + * on Windows 7 and higher systems. On older Windows systems these functions are + * available in psapi.dll libary without K32 prefix. So resolve pointers to + * these functions dynamically at runtime from the available system library. + * Function GetProcessImageFileNameW() is not available on Windows 2000 and + * older systems. + */ +typedef BOOL (WINAPI *EnumProcessesProt)(DWORD *lpidProcess, DWORD cb, DWORD *cbNeeded); +typedef DWORD (WINAPI *GetProcessImageFileNameWProt)(HANDLE hProcess, LPWSTR lpImageFileName, DWORD nSize); +typedef DWORD (WINAPI *GetModuleFileNameExWProt)(HANDLE hProcess, HMODULE hModule, LPWSTR lpImageFileName, DWORD nSize); + +/* + * These aclapi functions are available in advapi.dll library on Windows NT 4.0 + * and higher systems. + */ +typedef DWORD (WINAPI *GetSecurityInfoProt)(HANDLE handle, SE_OBJECT_TYPE ObjectType, SECURITY_INFORMATION SecurityInfo, PSID *ppsidOwner, PSID *ppsidGroup, PACL *ppDacl, PACL *ppSacl, PSECURITY_DESCRIPTOR *ppSecurityDescriptor); +typedef DWORD (WINAPI *SetSecurityInfoProt)(HANDLE handle, SE_OBJECT_TYPE ObjectType, SECURITY_INFORMATION SecurityInfo, PSID psidOwner, PSID psidGroup, PACL pDacl, PACL pSacl); +typedef DWORD (WINAPI *SetEntriesInAclProt)(ULONG cCountOfExplicitEntries, PEXPLICIT_ACCESS pListOfExplicitEntries, PACL OldAcl, PACL *NewAcl); - lib = LoadLibrary("WinIo.dll"); - if (!lib) +/* + * This errhandlingapi function is available in kernel32.dll library on + * Windows 7 and higher systems. + */ +typedef BOOL (WINAPI *SetThreadErrorModeProt)(DWORD dwNewMode, LPDWORD lpOldMode); + +/* + * Unfortunately NtSetInformationProcess() function, ProcessUserModeIOPL + * constant and all other helpers for its usage are not specified in any + * standard WinAPI header file. So define all of required constants and types. + * Function NtSetInformationProcess() is available in ntdll.dll library on all + * Windows systems but marked as it can be removed in some future version. + */ +#ifndef NTSTATUS +#define NTSTATUS LONG +#endif +#ifndef STATUS_NOT_IMPLEMENTED +#define STATUS_NOT_IMPLEMENTED (NTSTATUS)0xC0000002 +#endif +#ifndef STATUS_PRIVILEGE_NOT_HELD +#define STATUS_PRIVILEGE_NOT_HELD (NTSTATUS)0xC0000061 +#endif +#ifndef PROCESSINFOCLASS +#define PROCESSINFOCLASS DWORD +#endif +#ifndef ProcessUserModeIOPL +#define ProcessUserModeIOPL 16 +#endif
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/i386-ports.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/i386-ports.c
Changed
@@ -10,7 +10,7 @@ #include "internal.h" -#include <unistd.h> +#include <string.h> #if defined(PCI_OS_LINUX) #include "i386-io-linux.h" @@ -50,10 +50,13 @@ } static void -conf12_cleanup(struct pci_access *a UNUSED) +conf12_cleanup(struct pci_access *a) { if (conf12_io_enabled > 0) - conf12_io_enabled = intel_cleanup_io(a); + { + intel_cleanup_io(a); + conf12_io_enabled = -1; + } } /* @@ -72,6 +75,7 @@ { struct pci_dev d; + memset(&d, 0, sizeof(d)); a->debug("...sanity check"); d.bus = 0; d.func = 0; @@ -132,6 +136,9 @@ if (d->domain || pos >= 256) return 0; + if (len != 1 && len != 2 && len != 4) + return pci_generic_block_read(d, pos, buf, len); + intel_io_lock(); outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8); @@ -146,8 +153,6 @@ case 4: ((u32 *) buf)0 = cpu_to_le32(inl(addr)); break; - default: - res = pci_generic_block_read(d, pos, buf, len); } intel_io_unlock(); @@ -163,6 +168,9 @@ if (d->domain || pos >= 256) return 0; + if (len != 1 && len != 2 && len != 4) + return pci_generic_block_write(d, pos, buf, len); + intel_io_lock(); outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8); @@ -177,8 +185,6 @@ case 4: outl(le32_to_cpu(((u32 *) buf)0), addr); break; - default: - res = pci_generic_block_write(d, pos, buf, len); } intel_io_unlock(); return res; @@ -224,6 +230,9 @@ /* conf2 supports only 16 devices per bus */ return 0; + if (len != 1 && len != 2 && len != 4) + return pci_generic_block_read(d, pos, buf, len); + intel_io_lock(); outb((d->func << 1) | 0xf0, 0xcf8); outb(d->bus, 0xcfa); @@ -238,8 +247,6 @@ case 4: ((u32 *) buf)0 = cpu_to_le32(inl(addr)); break; - default: - res = pci_generic_block_read(d, pos, buf, len); } outb(0, 0xcf8); intel_io_unlock(); @@ -259,6 +266,9 @@ /* conf2 supports only 16 devices per bus */ return 0; + if (len != 1 && len != 2 && len != 4) + return pci_generic_block_write(d, pos, buf, len); + intel_io_lock(); outb((d->func << 1) | 0xf0, 0xcf8); outb(d->bus, 0xcfa); @@ -273,8 +283,6 @@ case 4: outl(le32_to_cpu(* (u32 *) buf), addr); break; - default: - res = pci_generic_block_write(d, pos, buf, len); } outb(0, 0xcf8);
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/init.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/init.c
Changed
@@ -13,6 +13,10 @@ #include "internal.h" +#ifdef PCI_OS_WINDOWS +#include <windows.h> +#endif + static struct pci_methods *pci_methodsPCI_ACCESS_MAX = { NULL, #ifdef PCI_HAVE_PM_LINUX_SYSFS @@ -72,6 +76,28 @@ #else NULL, #endif +#ifdef PCI_HAVE_PM_WIN32_CFGMGR32 + &pm_win32_cfgmgr32, +#else + NULL, +#endif +#ifdef PCI_HAVE_PM_WIN32_KLDBG + &pm_win32_kldbg, +#else + NULL, +#endif +#ifdef PCI_HAVE_PM_WIN32_SYSDBG + &pm_win32_sysdbg, +#else + NULL, +#endif +#ifdef PCI_HAVE_PM_MMIO_CONF + &pm_mmio_conf1, + &pm_mmio_conf1_ext, +#else + NULL, + NULL, +#endif }; // If PCI_ACCESS_AUTO is selected, we probe the access methods in this order @@ -86,39 +112,18 @@ PCI_ACCESS_DARWIN, PCI_ACCESS_SYLIXOS_DEVICE, PCI_ACCESS_HURD, + PCI_ACCESS_WIN32_CFGMGR32, + PCI_ACCESS_WIN32_KLDBG, + PCI_ACCESS_WIN32_SYSDBG, // Low-level methods poking the hardware directly PCI_ACCESS_I386_TYPE1, PCI_ACCESS_I386_TYPE2, + PCI_ACCESS_MMIO_TYPE1_EXT, + PCI_ACCESS_MMIO_TYPE1, -1, }; -void * -pci_malloc(struct pci_access *a, int size) -{ - void *x = malloc(size); - - if (!x) - a->error("Out of memory (allocation of %d bytes failed)", size); - return x; -} - -void -pci_mfree(void *x) -{ - if (x) - free(x); -} - -char * -pci_strdup(struct pci_access *a, const char *s) -{ - int len = strlen(s) + 1; - char *t = pci_malloc(a, len); - memcpy(t, s, len); - return t; -} - -static void +static void PCI_NONRET pci_generic_error(char *msg, ...) { va_list args; @@ -158,6 +163,34 @@ { } +// Memory allocation functions are safe to call if pci_access is not fully initalized or even NULL + +void * +pci_malloc(struct pci_access *a, int size) +{ + void *x = malloc(size); + + if (!x) + (a && a->error ? a->error : pci_generic_error)("Out of memory (allocation of %d bytes failed)", size); + return x; +} + +void +pci_mfree(void *x) +{ + if (x) + free(x); +} + +char * +pci_strdup(struct pci_access *a, const char *s) +{ + int len = strlen(s) + 1; + char *t = pci_malloc(a, len); + memcpy(t, s, len); + return t; +} + int pci_lookup_method(char *name) { @@ -180,14 +213,52 @@ return pci_methodsindex->name; } +#ifdef PCI_OS_WINDOWS + +static void +pci_init_name_list_path(struct pci_access *a) +{ + if ((PCI_PATH_IDS_DIR)0) + pci_set_name_list_path(a, PCI_PATH_IDS_DIR "\\" PCI_IDS, 0); + else + { + char *path, *sep; + DWORD len; + + path = pci_malloc(a, MAX_PATH+1); + len = GetModuleFileNameA(NULL, path, MAX_PATH+1); + sep = (len > 0) ? strrchr(path, '\\') : NULL; + if (len == 0 || len == MAX_PATH+1 || !sep || MAX_PATH-(size_t)(sep+1-path) < sizeof(PCI_IDS)) + { + free(path); + pci_set_name_list_path(a, PCI_IDS, 0); + } + else + { + memcpy(sep+1, PCI_IDS, sizeof(PCI_IDS)); + pci_set_name_list_path(a, path, 1); + } + } +} + +#else + +static void +pci_init_name_list_path(struct pci_access *a) +{ + pci_set_name_list_path(a, PCI_PATH_IDS_DIR "/" PCI_IDS, 0); +} + +#endif + struct pci_access * pci_alloc(void) { - struct pci_access *a = malloc(sizeof(struct pci_access)); + struct pci_access *a = pci_malloc(NULL, sizeof(struct pci_access)); int i; memset(a, 0, sizeof(*a)); - pci_set_name_list_path(a, PCI_PATH_IDS_DIR "/" PCI_IDS, 0); + pci_init_name_list_path(a); #ifdef PCI_USE_DNS pci_define_param(a, "net.domain", PCI_ID_DOMAIN, "DNS domain used for resolving of ID's"); pci_define_param(a, "net.cache_name", "~/.pciids-cache", "Name of the ID cache file");
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/internal.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/internal.h
Changed
@@ -1,7 +1,7 @@ /* * The PCI Library -- Internal Stuff * - * Copyright (c) 1997--2018 Martin Mares <mj@ucw.cz> + * Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz> * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -21,8 +21,15 @@ #else #define STATIC_ALIAS(_decl, _for) #define DEFINE_ALIAS(_decl, _for) extern _decl __attribute__((alias(#_for))) +#ifdef _WIN32 +/* GCC does not support asm .symver directive for Windows targets, so define new external global function symbol as alias to internal symbol */ +#define SYMBOL_VERSION(_int, _ext) asm(".globl\t" PCI_STRINGIFY(__MINGW_USYMBOL(_ext)) "\n\t" \ + ".def\t" PCI_STRINGIFY(__MINGW_USYMBOL(_ext)) ";\t.scl\t2;\t.type\t32;\t.endef\n\t" \ + ".set\t" PCI_STRINGIFY(__MINGW_USYMBOL(_ext)) "," PCI_STRINGIFY(__MINGW_USYMBOL(_int))) +#else #define SYMBOL_VERSION(_int, _ext) asm(".symver " #_int "," #_ext) #endif +#endif #else #define VERSIONED_ABI #define STATIC_ALIAS(_decl, _for) _decl { return _for; } @@ -33,6 +40,16 @@ #include "pci.h" #include "sysdep.h" +/* Old 32-bit-only versions of MinGW32 do not define __MINGW_USYMBOL macro */ +#ifdef __MINGW32__ +#ifndef __MINGW_USYMBOL +#define __MINGW_USYMBOL(sym) _##sym +#endif +#endif + +#define _PCI_STRINGIFY(x) #x +#define PCI_STRINGIFY(x) _PCI_STRINGIFY(x) + struct pci_methods { char *name; char *help; @@ -41,7 +58,7 @@ void (*init)(struct pci_access *); void (*cleanup)(struct pci_access *); void (*scan)(struct pci_access *); - unsigned int (*fill_info)(struct pci_dev *, unsigned int flags); + void (*fill_info)(struct pci_dev *, unsigned int flags); int (*read)(struct pci_dev *, int pos, byte *buf, int len); int (*write)(struct pci_dev *, int pos, byte *buf, int len); int (*read_vpd)(struct pci_dev *, int pos, byte *buf, int len); @@ -50,12 +67,16 @@ }; /* generic.c */ -void pci_generic_scan_bus(struct pci_access *, byte *busmap, int bus); +void pci_generic_scan_bus(struct pci_access *, byte *busmap, int domain, int bus); +void pci_generic_scan_domain(struct pci_access *, int domain); void pci_generic_scan(struct pci_access *); -unsigned int pci_generic_fill_info(struct pci_dev *, unsigned int flags); +void pci_generic_fill_info(struct pci_dev *, unsigned int flags); int pci_generic_block_read(struct pci_dev *, int pos, byte *buf, int len); int pci_generic_block_write(struct pci_dev *, int pos, byte *buf, int len); +/* emulated.c */ +int pci_emulated_read(struct pci_dev *d, int pos, byte *buf, int len); + /* init.c */ void *pci_malloc(struct pci_access *, int); void pci_mfree(void *); @@ -74,6 +95,24 @@ int pci_fill_info_v33(struct pci_dev *, int flags) VERSIONED_ABI; int pci_fill_info_v34(struct pci_dev *, int flags) VERSIONED_ABI; int pci_fill_info_v35(struct pci_dev *, int flags) VERSIONED_ABI; +int pci_fill_info_v38(struct pci_dev *, int flags) VERSIONED_ABI; + +static inline int want_fill(struct pci_dev *d, unsigned want_fields, unsigned int try_fields) +{ + want_fields &= try_fields; + if ((d->known_fields & want_fields) == want_fields) + return 0; + else + { + d->known_fields |= try_fields; + return 1; + } +} + +static inline void clear_fill(struct pci_dev *d, unsigned clear_fields) +{ + d->known_fields &= ~clear_fields; +} struct pci_property { struct pci_property *next; @@ -89,9 +128,11 @@ void pci_free_params(struct pci_access *acc); /* caps.c */ -unsigned int pci_scan_caps(struct pci_dev *, unsigned int want_fields); +void pci_scan_caps(struct pci_dev *, unsigned int want_fields); void pci_free_caps(struct pci_dev *); extern struct pci_methods pm_intel_conf1, pm_intel_conf2, pm_linux_proc, pm_fbsd_device, pm_aix_device, pm_nbsd_libpci, pm_obsd_device, - pm_dump, pm_linux_sysfs, pm_darwin, pm_sylixos_device, pm_hurd; + pm_dump, pm_linux_sysfs, pm_darwin, pm_sylixos_device, pm_hurd, + pm_mmio_conf1, pm_mmio_conf1_ext, + pm_win32_cfgmgr32, pm_win32_kldbg, pm_win32_sysdbg;
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/libpci.pc.in -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/libpci.pc.in
Changed
@@ -7,5 +7,5 @@ Description: libpci Version: @VERSION@ Libs: -L${libdir} -lpci -Libs.private: @LDLIBS@ +Libs.private: @LDLIBS@ @WITH_LIBS@ Cflags: -I${includedir}
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/libpci.ver -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/libpci.ver
Changed
@@ -4,6 +4,13 @@ * Visibility declarations in the source take precedence over this script, * so we can boldly declare pci_* as public and still keep the internal * functions properly hidden. + * + * To preserve compatibility of Windows DLL file, always add new symbol at + * the end of file and never change order of symbols nor version sections. + * On Windows the last referenced version of the symbol is the default one. + + * For PE/COFF targets this file is processed by ver2def.pl script and not + * by GNU LD linker like for ELF targets. */ LIBPCI_3.0 { @@ -82,3 +89,12 @@ global: pci_find_cap_nr; }; + +LIBPCI_3.8 { + global: + pci_fill_info; + pci_filter_init; + pci_filter_match; + pci_filter_parse_id; + pci_filter_parse_slot; +};
View file
_service:tar_scm:pciutils-3.9.0.tar.gz/lib/mmio-ports.c
Added
@@ -0,0 +1,466 @@ +/* + * The PCI Library -- Direct Configuration access via memory mapped ports + * + * Copyright (c) 2022 Pali Rohár <pali@kernel.org> + * + * Can be freely distributed and used under the terms of the GNU GPL. + */ + +/* + * Tell 32-bit platforms that we are interested in 64-bit variant of off_t type + * as 32-bit variant of off_t type is signed and so it cannot represent all + * possible 32-bit offsets. It is required because off_t type is used by mmap(). + */ +#define _FILE_OFFSET_BITS 64 + +#include "internal.h" + +#include <ctype.h> +#include <errno.h> +#include <stdlib.h> +#include <string.h> +#include <limits.h> + +#include <sys/mman.h> +#include <sys/types.h> +#include <fcntl.h> +#include <unistd.h> + +#ifndef OFF_MAX +#define OFF_MAX (off_t)((1ULL << (sizeof(off_t) * CHAR_BIT - 1)) - 1) +#endif + +struct mmio_cache +{ + off_t addr_page; + off_t data_page; + void *addr_map; + void *data_map; +}; + +static long pagesize; + +static void +munmap_regs(struct pci_access *a) +{ + struct mmio_cache *cache = a->aux; + + if (!cache) + return; + + munmap(cache->addr_map, pagesize); + if (cache->addr_page != cache->data_page) + munmap(cache->data_map, pagesize); + + pci_mfree(a->aux); + a->aux = NULL; +} + +static int +mmap_regs(struct pci_access *a, off_t addr_reg, off_t data_reg, int data_off, volatile void **addr, volatile void **data) +{ + struct mmio_cache *cache = a->aux; + off_t addr_page = addr_reg & ~(pagesize-1); + off_t data_page = data_reg & ~(pagesize-1); + void *addr_map = MAP_FAILED; + void *data_map = MAP_FAILED; + + if (cache && cache->addr_page == addr_page) + addr_map = cache->addr_map; + + if (cache && cache->data_page == data_page) + data_map = cache->data_map; + + if (addr_map == MAP_FAILED) + addr_map = mmap(NULL, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, a->fd, addr_page); + + if (addr_map == MAP_FAILED) + return 0; + + if (data_map == MAP_FAILED) + { + if (data_page == addr_page) + data_map = addr_map; + else + data_map = mmap(NULL, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, a->fd, data_page); + } + + if (data_map == MAP_FAILED) + { + if (!cache || cache->addr_map != addr_map) + munmap(addr_map, pagesize); + return 0; + } + + if (cache && cache->addr_page != addr_page) + munmap(cache->addr_map, pagesize); + + if (cache && cache->data_page != data_page && cache->data_page != cache->addr_page) + munmap(cache->data_map, pagesize); + + if (!cache) + cache = a->aux = pci_malloc(a, sizeof(*cache)); + + cache->addr_page = addr_page; + cache->data_page = data_page; + cache->addr_map = addr_map; + cache->data_map = data_map; + + *addr = (unsigned char *)addr_map + (addr_reg & (pagesize-1)); + *data = (unsigned char *)data_map + (data_reg & (pagesize-1)) + data_off; + return 1; +} + +static void +writeb(unsigned char value, volatile void *addr) +{ + *(volatile unsigned char *)addr = value; +} + +static void +writew(unsigned short value, volatile void *addr) +{ + *(volatile unsigned short *)addr = value; +} + +static void +writel(unsigned long value, volatile void *addr) +{ + *(volatile unsigned long *)addr = value; +} + +static unsigned char +readb(volatile void *addr) +{ + return *(volatile unsigned char *)addr; +} + +static unsigned short +readw(volatile void *addr) +{ + return *(volatile unsigned short *)addr; +} + +static unsigned long +readl(volatile void *addr) +{ + return *(volatile unsigned long *)addr; +} + +static int +validate_addrs(const char *addrs) +{ + const char *sep, *next; + unsigned long long num; + char *endptr; + + if (!*addrs) + return 0; + + while (1) + { + next = strchr(addrs, ','); + if (!next) + next = addrs + strlen(addrs); + + sep = strchr(addrs, '/'); + if (!sep) + return 0; + + if (!isxdigit(*addrs) || !isxdigit(*(sep+1))) + return 0; + + errno = 0; + num = strtoull(addrs, &endptr, 16); + if (errno || endptr != sep || (num & 3) || num > OFF_MAX) + return 0; + + errno = 0; + num = strtoull(sep+1, &endptr, 16); + if (errno || endptr != next || (num & 3) || num > OFF_MAX) + return 0; + + if (!*next) + return 1; + + addrs = next + 1; + } +} + +static int +get_domain_count(const char *addrs) +{ + int count = 1; + while (addrs = strchr(addrs, ',')) + { + addrs++; + count++; + } + return count;
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/names-hwdb.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/names-hwdb.c
Changed
@@ -71,8 +71,15 @@ struct udev_list_entry *entry; udev_list_entry_foreach(entry, udev_hwdb_get_properties_list_entry(a->id_udev_hwdb, modalias, 0)) - if (strcmp(udev_list_entry_get_name(entry), key) == 0) - return pci_strdup(a, udev_list_entry_get_value(entry)); + { + const char *entry_name = udev_list_entry_get_name(entry); + if (entry_name && !strcmp(entry_name, key)) + { + const char *entry_value = udev_list_entry_get_value(entry); + if (entry_value) + return pci_strdup(a, entry_value); + } + } } return NULL;
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lib/names-parse.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/names-parse.c
Changed
@@ -42,7 +42,7 @@ #define pci_close(f) gzclose(f) #define PCI_ERROR(f, err) \ if (!err) { \ - int errnum; \ + int errnum = 0; \ gzerror(f, &errnum); \ if (errnum >= 0) err = NULL; \ else if (errnum == Z_ERRNO) err = "I/O error"; \
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/names.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/names.c
Changed
@@ -31,6 +31,7 @@ if (name = pci_id_hwdb_lookup(a, cat, id1, id2, id3, id4)) { pci_id_insert(a, cat, id1, id2, id3, id4, name, SRC_HWDB); + pci_mfree(name); continue; } }
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/pci.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/pci.h
Changed
@@ -16,7 +16,7 @@ #include "header.h" #include "types.h" -#define PCI_LIB_VERSION 0x030700 +#define PCI_LIB_VERSION 0x030900 #ifndef PCI_ABI #define PCI_ABI @@ -43,6 +43,11 @@ PCI_ACCESS_DARWIN, /* Darwin */ PCI_ACCESS_SYLIXOS_DEVICE, /* SylixOS pci */ PCI_ACCESS_HURD, /* GNU/Hurd */ + PCI_ACCESS_WIN32_CFGMGR32, /* Win32 cfgmgr32.dll */ + PCI_ACCESS_WIN32_KLDBG, /* Win32 kldbgdrv.sys */ + PCI_ACCESS_WIN32_SYSDBG, /* Win32 NT SysDbg */ + PCI_ACCESS_MMIO_TYPE1, /* MMIO ports, type 1 */ + PCI_ACCESS_MMIO_TYPE1_EXT, /* MMIO ports, type 1 extended */ PCI_ACCESS_MAX }; @@ -62,7 +67,7 @@ int debugging; /* Turn on debugging messages */ /* Functions you can override: */ - void (*error)(char *msg, ...) PCI_PRINTF(1,2); /* Write error message and quit */ + void (*error)(char *msg, ...) PCI_PRINTF(1,2) PCI_NONRET; /* Write error message and quit */ void (*warning)(char *msg, ...) PCI_PRINTF(1,2); /* Write a warning message */ void (*debug)(char *msg, ...) PCI_PRINTF(1,2); /* Write a debugging message */ @@ -82,6 +87,7 @@ int fd_pos; /* proc/sys: current position */ int fd_vpd; /* sys: fd for VPD */ struct pci_dev *cached_dev; /* proc/sys: device the fds are for */ + void *aux; /* Auxiliary data for use by the back-end */ }; /* Initialize PCI access */ @@ -142,6 +148,13 @@ pciaddr_t flags6; /* PCI_IORESOURCE_* flags for regions */ pciaddr_t rom_flags; /* PCI_IORESOURCE_* flags for expansion ROM */ int domain; /* PCI domain (host bridge) */ + pciaddr_t bridge_base_addr4; /* Bridge base addresses (without flags) */ + pciaddr_t bridge_size4; /* Bridge sizes */ + pciaddr_t bridge_flags4; /* PCI_IORESOURCE_* flags for bridge addresses */ + u8 prog_if, rev_id; /* Programming interface for device_class and revision id */ + u16 subsys_vendor_id, subsys_id; /* Subsystem vendor id and subsystem id */ + struct pci_dev *parent; /* Parent device, does not have to be always accessible */ + int no_config_access; /* No access to config space for this device */ /* Fields used internally */ struct pci_access *access; @@ -205,7 +218,12 @@ #define PCI_FILL_IO_FLAGS 0x1000 #define PCI_FILL_DT_NODE 0x2000 /* Device tree node */ #define PCI_FILL_IOMMU_GROUP 0x4000 +#define PCI_FILL_BRIDGE_BASES 0x8000 #define PCI_FILL_RESCAN 0x00010000 +#define PCI_FILL_CLASS_EXT 0x00020000 /* prog_if and rev_id */ +#define PCI_FILL_SUBSYS 0x00040000 /* subsys_vendor_id and subsys_id */ +#define PCI_FILL_PARENT 0x00080000 +#define PCI_FILL_DRIVER 0x00100000 /* OS driver currently in use (string property) */ void pci_setup_cache(struct pci_dev *, u8 *cache, int len) PCI_ABI; @@ -233,8 +251,11 @@ struct pci_filter { int domain, bus, slot, func; /* -1 = ANY */ - int vendor, device, device_class; - int rfu3; + int vendor, device; + int device_class; + unsigned int device_class_mask; /* Which bits of the device_class are compared, default=all */ + int prog_if; + int rfu1; }; void pci_filter_init(struct pci_access *, struct pci_filter *) PCI_ABI;
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/proc.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/proc.c
Changed
@@ -11,6 +11,7 @@ #include <stdio.h> #include <string.h> #include <unistd.h> +#include <ctype.h> #include <errno.h> #include <fcntl.h> #include <sys/types.h> @@ -69,9 +70,11 @@ { struct pci_dev *d = pci_alloc_dev(a); unsigned int dfn, vend, cnt, known; + char *driver; + int offset; #define F " " PCIADDR_T_FMT - cnt = sscanf(buf, "%x %x %x" F F F F F F F F F F F F F F, + cnt = sscanf(buf, "%x %x %x" F F F F F F F F F F F F F F "%n", &dfn, &vend, &d->irq, @@ -88,7 +91,8 @@ &d->size3, &d->size4, &d->size5, - &d->rom_size); + &d->rom_size, + &offset); #undef F if (cnt != 9 && cnt != 10 && cnt != 17) a->error("proc: parse error (read only %d items)", cnt); @@ -106,6 +110,20 @@ if (cnt >= 17) known |= PCI_FILL_SIZES; } + if (cnt >= 17) + { + while (bufoffset && isspace(bufoffset)) + ++offset; + driver = &bufoffset; + while (bufoffset && !isspace(bufoffset)) + ++offset; + bufoffset = '\0'; + if (driver0) + { + pci_set_property(d, PCI_FILL_DRIVER, driver); + known |= PCI_FILL_DRIVER; + } + } d->known_fields = known; pci_link_dev(a, d); }
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/sylixos-device.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/sylixos-device.c
Changed
@@ -25,7 +25,7 @@ for (bus = 0; bus < PCI_MAX_BUS; bus++) if (!busmapbus) - pci_generic_scan_bus(a, busmap, bus); + pci_generic_scan_bus(a, busmap, 0, bus); } static void
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/sysdep.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/sysdep.h
Changed
@@ -21,7 +21,12 @@ typedef u16 word; #ifdef PCI_OS_WINDOWS -#define strcasecmp strcmpi +#define strcasecmp _strcmpi +#define strncasecmp _strnicmp +#if defined(_MSC_VER) && _MSC_VER < 1900 +#define snprintf _snprintf +#define vsnprintf _vsnprintf +#endif #endif #ifdef PCI_HAVE_LINUX_BYTEORDER_H @@ -66,7 +71,6 @@ #define BIG_ENDIAN 4321 #define LITTLE_ENDIAN 1234 #define BYTE_ORDER LITTLE_ENDIAN - #define snprintf _snprintf #endif #endif
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/sysfs.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/sysfs.c
Changed
@@ -153,14 +153,17 @@ { struct pci_access *a = d->access; char namebufOBJNAMELEN, buf256; + struct { pciaddr_t flags, base_addr, size; } lines10; + int have_bar_bases, have_rom_base, have_bridge_bases; FILE *file; int i; + have_bar_bases = have_rom_base = have_bridge_bases = 0; sysfs_obj_name(d, "resource", namebuf); file = fopen(namebuf, "r"); if (!file) a->error("Cannot open %s: %s", namebuf, strerror(errno)); - for (i = 0; i < 7; i++) + for (i = 0; i < 7+6+4+1; i++) { unsigned long long start, end, size, flags; if (!fgets(buf, sizeof(buf), file)) @@ -177,16 +180,55 @@ flags &= PCI_ADDR_FLAG_MASK; d->base_addri = start | flags; d->sizei = size; + have_bar_bases = 1; } - else + else if (i == 6) { d->rom_flags = flags; flags &= PCI_ADDR_FLAG_MASK; d->rom_base_addr = start | flags; d->rom_size = size; + have_rom_base = 1; } + else if (i < 7+6+4) + { + /* + * If kernel was compiled without CONFIG_PCI_IOV option then after + * the ROM line for configured bridge device (that which had set + * subordinary bus number to non-zero value) are four additional lines + * which describe resources behind bridge. For PCI-to-PCI bridges they + * are: IO, MEM, PREFMEM and empty. For CardBus bridges they are: IO0, + * IO1, MEM0 and MEM1. For unconfigured bridges and other devices + * there is no additional line after the ROM line. If kernel was + * compiled with CONFIG_PCI_IOV option then after the ROM line and + * before the first bridge resource line are six additional lines + * which describe IOV resources. Read all remaining lines in resource + * file and based on the number of remaining lines (0, 4, 6, 10) parse + * resources behind bridge. + */ + linesi-7.flags = flags; + linesi-7.base_addr = start; + linesi-7.size = size; + } + } + if (i == 7+4 || i == 7+6+4) + { + int offset = (i == 7+6+4) ? 6 : 0; + for (i = 0; i < 4; i++) + { + d->bridge_flagsi = linesoffset+i.flags; + d->bridge_base_addri = linesoffset+i.base_addr; + d->bridge_sizei = linesoffset+i.size; + } + have_bridge_bases = 1; } fclose(file); + if (!have_bar_bases) + clear_fill(d, PCI_FILL_BASES | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS); + if (!have_rom_base) + clear_fill(d, PCI_FILL_ROM_BASE); + if (!have_bridge_bases) + clear_fill(d, PCI_FILL_BRIDGE_BASES); } static void sysfs_scan(struct pci_access *a) @@ -288,10 +330,10 @@ closedir(dir); } -static unsigned int +static void sysfs_fill_info(struct pci_dev *d, unsigned int flags) { - unsigned int done = 0; + int value, want_class, want_class_ext; if (!d->access->buscentric) { @@ -300,61 +342,106 @@ * the kernel's view, which has regions and IRQs remapped and other fields * (most importantly classes) possibly fixed if the device is known broken. */ - if (flags & PCI_FILL_IDENT) + if (want_fill(d, flags, PCI_FILL_IDENT)) { d->vendor_id = sysfs_get_value(d, "vendor", 1); d->device_id = sysfs_get_value(d, "device", 1); - done |= PCI_FILL_IDENT; } - if (flags & PCI_FILL_CLASS) - { - d->device_class = sysfs_get_value(d, "class", 1) >> 8; - done |= PCI_FILL_CLASS; + want_class = want_fill(d, flags, PCI_FILL_CLASS); + want_class_ext = want_fill(d, flags, PCI_FILL_CLASS_EXT); + if (want_class || want_class_ext) + { + value = sysfs_get_value(d, "class", 1); + if (want_class) + d->device_class = value >> 8; + if (want_class_ext) + { + d->prog_if = value & 0xff; + value = sysfs_get_value(d, "revision", 0); + if (value < 0) + value = pci_read_byte(d, PCI_REVISION_ID); + if (value >= 0) + d->rev_id = value; + } } - if (flags & PCI_FILL_IRQ) + if (want_fill(d, flags, PCI_FILL_SUBSYS)) { - d->irq = sysfs_get_value(d, "irq", 1); - done |= PCI_FILL_IRQ; + value = sysfs_get_value(d, "subsystem_vendor", 0); + if (value >= 0) + { + d->subsys_vendor_id = value; + value = sysfs_get_value(d, "subsystem_device", 0); + if (value >= 0) + d->subsys_id = value; + } + else + clear_fill(d, PCI_FILL_SUBSYS); } - if (flags & (PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS)) - { + if (want_fill(d, flags, PCI_FILL_IRQ)) + d->irq = sysfs_get_value(d, "irq", 1); + if (want_fill(d, flags, PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS | PCI_FILL_BRIDGE_BASES)) sysfs_get_resources(d); - done |= PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES | PCI_FILL_IO_FLAGS; + if (want_fill(d, flags, PCI_FILL_PARENT)) + { + unsigned int domain, bus, dev, func; + char *path_abs, *path_canon, *name; + char path_relOBJNAMELEN; + struct pci_dev *parent; + + /* Construct sysfs path for parent device */ + sysfs_obj_name(d, "..", path_rel); + path_abs = realpath(path_rel, NULL); + name = path_abs ? strrchr(path_abs, '/') : NULL; + name = name ? name+1 : name; + parent = NULL; + + if (name && sscanf(name, "%x:%x:%x.%d", &domain, &bus, &dev, &func) == 4 && domain <= 0x7fffffff) + for (parent = d->access->devices; parent; parent = parent->next) + if (parent->domain == (int)domain && parent->bus == bus && parent->dev == dev && parent->func == func) + break; + + if (parent) + { + /* Check if parsed BDF address from parent sysfs device is really expected PCI device */ + sysfs_obj_name(parent, ".", path_rel); + path_canon = realpath(path_rel, NULL); + if (!path_canon || strcmp(path_canon, path_abs) != 0) + parent = NULL; + } + + if (parent) + d->parent = parent; + else + clear_fill(d, PCI_FILL_PARENT); } } - if (flags & PCI_FILL_PHYS_SLOT) + if (want_fill(d, flags, PCI_FILL_PHYS_SLOT)) { struct pci_dev *pd; sysfs_fill_slots(d->access); for (pd = d->access->devices; pd; pd = pd->next) pd->known_fields |= PCI_FILL_PHYS_SLOT; - done |= PCI_FILL_PHYS_SLOT; } - if (flags & PCI_FILL_MODULE_ALIAS) + if (want_fill(d, flags, PCI_FILL_MODULE_ALIAS)) { char bufOBJBUFSIZE; if (sysfs_get_string(d, "modalias", buf, 0)) d->module_alias = pci_set_property(d, PCI_FILL_MODULE_ALIAS, buf); - done |= PCI_FILL_MODULE_ALIAS; } - if (flags & PCI_FILL_LABEL) + if (want_fill(d, flags, PCI_FILL_LABEL))
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_service:tar_scm:pciutils-3.7.0.tar.gz/lib/types.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lib/types.h
Changed
@@ -1,7 +1,7 @@ /* * The PCI Library -- Types and Format Strings * - * Copyright (c) 1997--2017 Martin Mares <mj@ucw.cz> + * Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz> * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -11,13 +11,14 @@ #ifndef PCI_HAVE_Uxx_TYPES #ifdef PCI_OS_WINDOWS -/* On Windows compilers, use <windef.h> */ -#include <windef.h> +/* On Windows compilers, use <windows.h> */ +#include <windows.h> typedef BYTE u8; typedef WORD u16; typedef DWORD u32; typedef unsigned __int64 u64; #define PCI_U64_FMT_X "I64x" +#define PCI_U64_FMT_U "I64u" #elif defined(PCI_HAVE_STDINT_H) || (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) /* Use standard types in C99 and newer */ @@ -28,6 +29,7 @@ typedef uint32_t u32; typedef uint64_t u64; #define PCI_U64_FMT_X PRIx64 +#define PCI_U64_FMT_U PRIu64 #else /* Hope for POSIX types from <sys/types.h> */ @@ -40,9 +42,11 @@ #if ULONG_MAX > 0xffffffff typedef unsigned long u64; #define PCI_U64_FMT_X "lx" +#define PCI_U64_FMT_U "lu" #else typedef unsigned long long u64; #define PCI_U64_FMT_X "llx" +#define PCI_U64_FMT_U "llu" #endif #endif @@ -70,6 +74,10 @@ #if defined(__GNUC__) && __GNUC__ > 2 #define PCI_PRINTF(x,y) __attribute__((format(printf, x, y))) +#define PCI_NONRET __attribute((noreturn)) +#define PCI_PACKED __attribute((packed)) #else #define PCI_PRINTF(x,y) +#define PCI_NONRET +#define PCI_PACKED #endif
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_service:tar_scm:pciutils-3.9.0.tar.gz/lib/ver2def.pl
Added
@@ -0,0 +1,47 @@ +#!/usr/bin/perl +use strict; +use warnings; +die "Usage: $0 script.ver dllname build.def import.def\n" if @ARGV != 4; +my ($verfile, $dllname, $builddef, $importdef) = @ARGV; +open my $verfh, '<', $verfile or die "Cannot open input file $verfile: $!\n"; +my $input = join '', <$verfh>; +close $verfh; +my @syms; +my (%cnt, %last, %ords); +$input =~ s/\/\*.*?\*\///sg; # Remove C comments +while ($input =~ m/(\S+)\s*\{((?:^\{\}|\{(?2)\})+)\}\s*;/sg) { # Split {...} + my ($ver, $block) = ($1, $2); + while ($block =~ s/(\S+)\s*:((?:^\{\}:|\{(?2)\})+)$//sg) { # Split section: + my ($section, $syms) = ($1, $2); + next if $section ne 'global'; + $syms =~ s/\s+//g; + foreach (split /;\s*/, $syms) { # Split symbols + $cnt{$_}++; + $last{$_} = $ver; + push @syms, $_, $ver; + } + } +} +open my $importfh, '>', $importdef or die "Cannot open output file $importdef: $!\n"; +open my $buildfh, '>', $builddef or die "Cannot open output file $builddef: $!\n"; +print $importfh "LIBRARY \"$dllname\"\n"; +print $importfh "EXPORTS\n"; +print $buildfh "EXPORTS\n"; +my $ord = 1; +foreach (@syms) { + my ($sym, $ver) = @{$_}; + print $importfh "\"$sym\@$ver\" \@$ord\n"; + if ($last{$sym} ne $ver) { + print $buildfh "\"$sym\@$ver\" \@$ord\n"; + } else { + $ords{$sym} = $ord; + print $buildfh "\"$sym\@$ver\" = " . (($cnt{$sym} > 1) ? "\"$sym\@\@$ver\"" : $sym) . " \@$ord\n" + } + $ord++; +} +# GNU dlltool has broken calculation of ordinals for aliased symbols, so specify ordinals explicitly +# GNU LD prior 2.21 has broken handling of symbols with dot character +# Operator == for defining symbol alias is supported since GNU dlltool 2.21 +print $importfh "$_ \@$ords{$_} == \"$_\@$last{$_}\"\n" foreach sort keys %last; +close $importfh; +close $buildfh;
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_service:tar_scm:pciutils-3.9.0.tar.gz/lib/win32-cfgmgr32.c
Added
@@ -0,0 +1,1708 @@ +/* + * The PCI Library -- List PCI devices on Win32 via Configuration Manager + * + * Copyright (c) 2021 Pali Rohár <pali@kernel.org> + * + * Can be freely distributed and used under the terms of the GNU GPL. + */ + +#include <windows.h> +#include <cfgmgr32.h> + +#include <ctype.h> /* for isxdigit() */ +#include <stdio.h> /* for sprintf() */ +#include <string.h> /* for strlen(), strchr(), strncmp() */ +#include <wchar.h> /* for wcslen(), wcscpy() */ + +#include "internal.h" + +/* Unfortunately MinGW32 toolchain does not provide these cfgmgr32 constants. */ + +#ifndef RegDisposition_OpenExisting +#define RegDisposition_OpenExisting 0x00000001 +#endif + +#ifndef CM_REGISTRY_SOFTWARE +#define CM_REGISTRY_SOFTWARE 0x00000001 +#endif + +#ifndef CM_DRP_HARDWAREID +#define CM_DRP_HARDWAREID 0x00000002 +#endif +#ifndef CM_DRP_SERVICE +#define CM_DRP_SERVICE 0x00000005 +#endif +#ifndef CM_DRP_BUSNUMBER +#define CM_DRP_BUSNUMBER 0x00000016 +#endif +#ifndef CM_DRP_ADDRESS +#define CM_DRP_ADDRESS 0x0000001D +#endif + +#ifndef CR_INVALID_CONFLICT_LIST +#define CR_INVALID_CONFLICT_LIST 0x00000039 +#endif +#ifndef CR_INVALID_INDEX +#define CR_INVALID_INDEX 0x0000003A +#endif +#ifndef CR_INVALID_STRUCTURE_SIZE +#define CR_INVALID_STRUCTURE_SIZE 0x0000003B +#endif + +#ifndef fIOD_10_BIT_DECODE +#define fIOD_10_BIT_DECODE 0x0004 +#endif +#ifndef fIOD_12_BIT_DECODE +#define fIOD_12_BIT_DECODE 0x0008 +#endif +#ifndef fIOD_16_BIT_DECODE +#define fIOD_16_BIT_DECODE 0x0010 +#endif +#ifndef fIOD_POSITIVE_DECODE +#define fIOD_POSITIVE_DECODE 0x0020 +#endif +#ifndef fIOD_PASSIVE_DECODE +#define fIOD_PASSIVE_DECODE 0x0040 +#endif +#ifndef fIOD_WINDOW_DECODE +#define fIOD_WINDOW_DECODE 0x0080 +#endif +#ifndef fIOD_PORT_BAR +#define fIOD_PORT_BAR 0x0100 +#endif + +#ifndef fMD_WINDOW_DECODE +#define fMD_WINDOW_DECODE 0x0040 +#endif +#ifndef fMD_MEMORY_BAR +#define fMD_MEMORY_BAR 0x0080 +#endif + +/* + * Unfortunately MinGW32 toolchain does not provide import library for these + * cfgmgr32.dll functions. So resolve pointers to these functions at runtime. + */ + +#ifdef CM_Get_DevNode_Registry_PropertyA +#undef CM_Get_DevNode_Registry_PropertyA +#endif +static CONFIGRET (WINAPI *MyCM_Get_DevNode_Registry_PropertyA)(DEVINST dnDevInst, ULONG ulProperty, PULONG pulRegDataType, PVOID Buffer, PULONG pulLength, ULONG ulFlags); +#define CM_Get_DevNode_Registry_PropertyA MyCM_Get_DevNode_Registry_PropertyA + +#ifdef CM_Get_DevNode_Registry_PropertyW +#undef CM_Get_DevNode_Registry_PropertyW +#endif +static CONFIGRET (WINAPI *MyCM_Get_DevNode_Registry_PropertyW)(DEVINST dnDevInst, ULONG ulProperty, PULONG pulRegDataType, PVOID Buffer, PULONG pulLength, ULONG ulFlags); +#define CM_Get_DevNode_Registry_PropertyW MyCM_Get_DevNode_Registry_PropertyW + +#ifndef CM_Open_DevNode_Key +#undef CM_Open_DevNode_Key +#endif +static CONFIGRET (WINAPI *MyCM_Open_DevNode_Key)(DEVINST dnDevNode, REGSAM samDesired, ULONG ulHardwareProfile, REGDISPOSITION Disposition, PHKEY phkDevice, ULONG ulFlags); +#define CM_Open_DevNode_Key MyCM_Open_DevNode_Key + +static BOOL +resolve_cfgmgr32_functions(void) +{ + HMODULE cfgmgr32; + + if (CM_Get_DevNode_Registry_PropertyA && CM_Get_DevNode_Registry_PropertyW && CM_Open_DevNode_Key) + return TRUE; + + cfgmgr32 = GetModuleHandleA("cfgmgr32.dll"); + if (!cfgmgr32) + return FALSE; + + CM_Get_DevNode_Registry_PropertyA = (void *)GetProcAddress(cfgmgr32, "CM_Get_DevNode_Registry_PropertyA"); + CM_Get_DevNode_Registry_PropertyW = (void *)GetProcAddress(cfgmgr32, "CM_Get_DevNode_Registry_PropertyW"); + CM_Open_DevNode_Key = (void *)GetProcAddress(cfgmgr32, "CM_Open_DevNode_Key"); + if (!CM_Get_DevNode_Registry_PropertyA || !CM_Get_DevNode_Registry_PropertyW || !CM_Open_DevNode_Key) + return FALSE; + + return TRUE; +} + +/* + * cfgmgr32.dll uses custom non-Win32 error numbers which are unsupported by + * Win32 APIs like GetLastError() and FormatMessage() functions. + * + * Windows 7 introduced new cfgmgr32.dll function CM_MapCrToWin32Err() for + * translating mapping CR_* errors to Win32 errors but most error codes are + * not mapped. So this function is unusable. + * + * Error strings for CR_* errors are defined in cmapi.rc file which is + * statically linked into some system libraries (e.g. filemgmt.dll, + * acledit.dll, netui0.dll or netui2.dll) but due to static linking it is + * not possible to access these error strings easily at runtime. + * + * So define own function for translating CR_* errors directly to strings. + */ +static const char * +cr_strerror(CONFIGRET cr_error_id) +{ + static char unknown_errorsizeof("Unknown CR error XXXXXXXXXX"); + static const char *cr_errors = { + "The operation completed successfully", + "CR_DEFAULT", + "Not enough memory is available to process this command", + "A required pointer parameter is invalid", + "The ulFlags parameter specified is invalid for this operation", + "The device instance handle parameter is not valid", + "The supplied resource descriptor parameter is invalid", + "The supplied logical configuration parameter is invalid", + "CR_INVALID_ARBITRATOR", + "CR_INVALID_NODELIST", + "CR_DEVNODE_HAS_REQS/CR_DEVINST_HAS_REQS", + "The RESOURCEID parameter does not contain a valid RESOURCEID", + "CR_DLVXD_NOT_FOUND", + "The specified device instance handle does not correspond to a present device", + "There are no more logical configurations available", + "There are no more resource descriptions available", + "This device instance already exists", + "The supplied range list parameter is invalid", + "CR_INVALID_RANGE", + "A general internal error occurred", + "CR_NO_SUCH_LOGICAL_DEV", + "The device is disabled for this configuration", + "CR_NOT_SYSTEM_VM", + "A service or application refused to allow removal of this device", + "CR_APM_VETOED", + "CR_INVALID_LOAD_TYPE", + "An output parameter was too small to hold all the data available", + "CR_NO_ARBITRATOR", + "CR_NO_REGISTRY_HANDLE", + "A required entry in the registry is missing or an attempt to write to the registry failed", + "The specified Device ID is not a valid Device ID", + "One or more parameters were invalid", + "CR_INVALID_API", + "CR_DEVLOADER_NOT_READY", + "CR_NEED_RESTART", + "There are no more hardware profiles available", + "CR_DEVICE_NOT_THERE", + "The specified value does not exist in the registry", + "CR_WRONG_TYPE", + "The specified priority is invalid for this operation", + "This device cannot be disabled", + "CR_FREE_RESOURCES", + "CR_QUERY_VETOED", + "CR_CANT_SHARE_IRQ", + "CR_NO_DEPENDENT", + "CR_SAME_RESOURCES", + "The specified key does not exist in the registry", + "The specified machine name does not meet the UNC naming conventions", + "A general remote communication error occurred", + "The machine selected for remote communication is not available at this time", + "The Plug and Play service or another required service is not available", + "Access denied", + "This routine is not implemented in this version of the operating system", + "The specified property type is invalid for this operation", + "Device interface is active",
View file
_service:tar_scm:pciutils-3.9.0.tar.gz/lib/win32-kldbg.c
Added
@@ -0,0 +1,796 @@ +/* + * The PCI Library -- PCI config space access using Kernel Local Debugging Driver + * + * Copyright (c) 2022 Pali Rohár <pali@kernel.org> + * + * Can be freely distributed and used under the terms of the GNU GPL. + */ + +#include <windows.h> +#include <winioctl.h> + +#include <stdio.h> /* for sprintf() */ +#include <string.h> /* for memset() and memcpy() */ + +#include "internal.h" +#include "i386-io-windows.h" + +#ifndef LOAD_LIBRARY_AS_IMAGE_RESOURCE +#define LOAD_LIBRARY_AS_IMAGE_RESOURCE 0x20 +#endif +#ifndef LOAD_LIBRARY_AS_DATAFILE_EXCLUSIVE +#define LOAD_LIBRARY_AS_DATAFILE_EXCLUSIVE 0x40 +#endif + +#ifndef IOCTL_KLDBG +#define IOCTL_KLDBG CTL_CODE(FILE_DEVICE_UNKNOWN, 0x1, METHOD_NEITHER, FILE_READ_ACCESS | FILE_WRITE_ACCESS) +#endif + +#ifndef BUS_DATA_TYPE +#define BUS_DATA_TYPE LONG +#endif +#ifndef PCIConfiguration +#define PCIConfiguration (BUS_DATA_TYPE)4 +#endif + +#ifndef SYSDBG_COMMAND +#define SYSDBG_COMMAND ULONG +#endif +#ifndef SysDbgReadBusData +#define SysDbgReadBusData (SYSDBG_COMMAND)18 +#endif +#ifndef SysDbgWriteBusData +#define SysDbgWriteBusData (SYSDBG_COMMAND)19 +#endif + +#ifndef SYSDBG_BUS_DATA +typedef struct _SYSDBG_BUS_DATA { + ULONG Address; + PVOID Buffer; + ULONG Request; + BUS_DATA_TYPE BusDataType; + ULONG BusNumber; + ULONG SlotNumber; +} SYSDBG_BUS_DATA, *PSYSDBG_BUS_DATA; +#define SYSDBG_BUS_DATA SYSDBG_BUS_DATA +#endif + +#ifndef PCI_SEGMENT_BUS_NUMBER +typedef struct _PCI_SEGMENT_BUS_NUMBER { + union { + struct { + ULONG BusNumber:8; + ULONG SegmentNumber:16; + ULONG Reserved:8; + } bits; + ULONG AsULONG; + } u; +} PCI_SEGMENT_BUS_NUMBER, *PPCI_SEGMENT_BUS_NUMBER; +#define PCI_SEGMENT_BUS_NUMBER PCI_SEGMENT_BUS_NUMBER +#endif + +#ifndef PCI_SLOT_NUMBER +typedef struct _PCI_SLOT_NUMBER { + union { + struct { + ULONG DeviceNumber:5; + ULONG FunctionNumber:3; + ULONG Reserved:24; + } bits; + ULONG AsULONG; + } u; +} PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER; +#define PCI_SLOT_NUMBER PCI_SLOT_NUMBER +#endif + +#ifndef KLDBG +typedef struct _KLDBG { + SYSDBG_COMMAND Command; + PVOID Buffer; + DWORD BufferLength; +} KLDBG, *PKLDBG; +#define KLDBG KLDBG +#endif + +static BOOL debug_privilege_enabled; +static LUID luid_debug_privilege; +static BOOL revert_only_privilege; +static HANDLE revert_token; + +static HANDLE kldbg_dev = INVALID_HANDLE_VALUE; + +static BOOL +win32_kldbg_pci_bus_data(BOOL WriteBusData, USHORT SegmentNumber, BYTE BusNumber, BYTE DeviceNumber, BYTE FunctionNumber, USHORT Address, PVOID Buffer, ULONG BufferSize, LPDWORD Length); + +static const char * +win32_strerror(DWORD win32_error_id) +{ + /* + * Use static buffer which is large enough. + * Hopefully no Win32 API error message string is longer than 4 kB. + */ + static char buffer4096; + DWORD len; + + len = FormatMessageA(FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_IGNORE_INSERTS, NULL, win32_error_id, MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), buffer, sizeof(buffer), NULL); + + /* FormatMessage() automatically appends ".\r\n" to the error message. */ + if (len && bufferlen-1 == '\n') + buffer--len = '\0'; + if (len && bufferlen-1 == '\r') + buffer--len = '\0'; + if (len && bufferlen-1 == '.') + buffer--len = '\0'; + + if (!len) + sprintf(buffer, "Unknown Win32 error %lu", win32_error_id); + + return buffer; +} + +static BOOL +win32_is_32bit_on_64bit_system(void) +{ + BOOL (WINAPI *MyIsWow64Process)(HANDLE, PBOOL); + HMODULE kernel32; + BOOL is_wow64; + + kernel32 = GetModuleHandle(TEXT("kernel32.dll")); + if (!kernel32) + return FALSE; + + MyIsWow64Process = (void *)GetProcAddress(kernel32, "IsWow64Process"); + if (!MyIsWow64Process) + return FALSE; + + if (!MyIsWow64Process(GetCurrentProcess(), &is_wow64)) + return FALSE; + + return is_wow64; +} + +static WORD +win32_get_current_process_machine(void) +{ + IMAGE_DOS_HEADER *dos_header; + IMAGE_NT_HEADERS *nt_header; + + dos_header = (IMAGE_DOS_HEADER *)GetModuleHandle(NULL); + if (dos_header->e_magic != IMAGE_DOS_SIGNATURE) + return IMAGE_FILE_MACHINE_UNKNOWN; + + nt_header = (IMAGE_NT_HEADERS *)((BYTE *)dos_header + dos_header->e_lfanew); + if (nt_header->Signature != IMAGE_NT_SIGNATURE) + return IMAGE_FILE_MACHINE_UNKNOWN; + + return nt_header->FileHeader.Machine; +} + +static BOOL +win32_check_driver(BYTE *driver_data) +{ + IMAGE_DOS_HEADER *dos_header; + IMAGE_NT_HEADERS *nt_headers; + WORD current_machine; + + current_machine = win32_get_current_process_machine(); + if (current_machine == IMAGE_FILE_MACHINE_UNKNOWN) + return FALSE; + + dos_header = (IMAGE_DOS_HEADER *)driver_data; + if (dos_header->e_magic != IMAGE_DOS_SIGNATURE) + return FALSE; + + nt_headers = (IMAGE_NT_HEADERS *)((BYTE *)dos_header + dos_header->e_lfanew); + if (nt_headers->Signature != IMAGE_NT_SIGNATURE) + return FALSE; + + if (nt_headers->FileHeader.Machine != current_machine) + return FALSE; + + if (!(nt_headers->FileHeader.Characteristics & IMAGE_FILE_EXECUTABLE_IMAGE)) + return FALSE; + +#ifndef _WIN64 + if (!(nt_headers->FileHeader.Characteristics & IMAGE_FILE_32BIT_MACHINE)) + return FALSE; +#endif + + /* IMAGE_NT_OPTIONAL_HDR_MAGIC is alias for the header magic used on the target compiler architecture. */
View file
_service:tar_scm:pciutils-3.9.0.tar.gz/lib/win32-sysdbg.c
Added
@@ -0,0 +1,304 @@ +/* + * The PCI Library -- PCI config space access using NT SysDbg interface + * + * Copyright (c) 2022 Pali Rohár <pali@kernel.org> + * + * Can be freely distributed and used under the terms of the GNU GPL. + */ + +#include <windows.h> + +#include "internal.h" +#include "i386-io-windows.h" + +#ifndef NTSTATUS +#define NTSTATUS LONG +#endif +#ifndef STATUS_UNSUCCESSFUL +#define STATUS_UNSUCCESSFUL (NTSTATUS)0xC0000001 +#endif +#ifndef STATUS_NOT_IMPLEMENTED +#define STATUS_NOT_IMPLEMENTED (NTSTATUS)0xC0000002 +#endif +#ifndef STATUS_INVALID_INFO_CLASS +#define STATUS_INVALID_INFO_CLASS (NTSTATUS)0xC0000003 +#endif +#ifndef STATUS_ACCESS_DENIED +#define STATUS_ACCESS_DENIED (NTSTATUS)0xC0000022 +#endif +#ifndef STATUS_DEBUGGER_INACTIVE +#define STATUS_DEBUGGER_INACTIVE (NTSTATUS)0xC0000354 +#endif + +#ifndef BUS_DATA_TYPE +#define BUS_DATA_TYPE LONG +#endif +#ifndef PCIConfiguration +#define PCIConfiguration (BUS_DATA_TYPE)4 +#endif + +#ifndef SYSDBG_COMMAND +#define SYSDBG_COMMAND ULONG +#endif +#ifndef SysDbgReadBusData +#define SysDbgReadBusData (SYSDBG_COMMAND)18 +#endif +#ifndef SysDbgWriteBusData +#define SysDbgWriteBusData (SYSDBG_COMMAND)19 +#endif + +#ifndef SYSDBG_BUS_DATA +typedef struct _SYSDBG_BUS_DATA { + ULONG Address; + PVOID Buffer; + ULONG Request; + BUS_DATA_TYPE BusDataType; + ULONG BusNumber; + ULONG SlotNumber; +} SYSDBG_BUS_DATA, *PSYSDBG_BUS_DATA; +#define SYSDBG_BUS_DATA SYSDBG_BUS_DATA +#endif + +#ifndef PCI_SLOT_NUMBER +typedef struct _PCI_SLOT_NUMBER { + union { + struct { + ULONG DeviceNumber:5; + ULONG FunctionNumber:3; + ULONG Reserved:24; + } bits; + ULONG AsULONG; + } u; +} PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER; +#define PCI_SLOT_NUMBER PCI_SLOT_NUMBER +#endif + +#ifdef NtSystemDebugControl +#undef NtSystemDebugControl +#endif +static NTSTATUS (NTAPI *MyNtSystemDebugControl)(SYSDBG_COMMAND Command, PVOID InputBuffer, ULONG InputBufferLength, PVOID OutputBuffer, ULONG OutputBufferLength, PULONG ReturnLength); +#define NtSystemDebugControl MyNtSystemDebugControl + +static BOOL debug_privilege_enabled; +static LUID luid_debug_privilege; +static BOOL revert_only_privilege; +static HANDLE revert_token; +static HMODULE ntdll; + +static int win32_sysdbg_initialized; + +static NTSTATUS +win32_sysdbg_pci_bus_data(BOOL WriteBusData, BYTE BusNumber, BYTE DeviceNumber, BYTE FunctionNumber, BYTE Address, PVOID Buffer, BYTE BufferSize, PULONG Length) +{ + SYSDBG_BUS_DATA sysdbg_cmd; + PCI_SLOT_NUMBER pci_slot; + + if (!NtSystemDebugControl) + return STATUS_NOT_IMPLEMENTED; + + memset(&pci_slot, 0, sizeof(pci_slot)); + memset(&sysdbg_cmd, 0, sizeof(sysdbg_cmd)); + + sysdbg_cmd.Address = Address; + sysdbg_cmd.Buffer = Buffer; + sysdbg_cmd.Request = BufferSize; + sysdbg_cmd.BusDataType = PCIConfiguration; + sysdbg_cmd.BusNumber = BusNumber; + pci_slot.u.bits.DeviceNumber = DeviceNumber; + pci_slot.u.bits.FunctionNumber = FunctionNumber; + sysdbg_cmd.SlotNumber = pci_slot.u.AsULONG; + + *Length = 0; + return NtSystemDebugControl(WriteBusData ? SysDbgWriteBusData : SysDbgReadBusData, &sysdbg_cmd, sizeof(sysdbg_cmd), NULL, 0, Length); +} + +static int +win32_sysdbg_setup(struct pci_access *a) +{ + UINT prev_error_mode; + NTSTATUS status; + ULONG ret_len; + DWORD id; + + if (win32_sysdbg_initialized) + return 1; + + prev_error_mode = change_error_mode(SEM_FAILCRITICALERRORS); + ntdll = LoadLibrary(TEXT("ntdll.dll")); + change_error_mode(prev_error_mode); + if (!ntdll) + { + a->debug("Cannot open ntdll.dll library."); + return 0; + } + + NtSystemDebugControl = (LPVOID)GetProcAddress(ntdll, "NtSystemDebugControl"); + if (!NtSystemDebugControl) + { + a->debug("Function NtSystemDebugControl() is not supported."); + FreeLibrary(ntdll); + ntdll = NULL; + return 0; + } + + /* + * Try to read PCI id register from PCI device 00:00.0. + * If this device does not exist and NT SysDbg API is working then + * NT SysDbg returns STATUS_UNSUCCESSFUL. + */ + status = win32_sysdbg_pci_bus_data(FALSE, 0, 0, 0, 0, &id, sizeof(id), &ret_len); + if ((status >= 0 && ret_len == sizeof(id)) || status == STATUS_UNSUCCESSFUL) + { + win32_sysdbg_initialized = 1; + return 1; + } + else if (status != STATUS_ACCESS_DENIED) + { + if (status == STATUS_NOT_IMPLEMENTED || status == STATUS_INVALID_INFO_CLASS) + a->debug("NT SysDbg is not supported."); + else if (status == STATUS_DEBUGGER_INACTIVE) + a->debug("NT SysDbg is disabled."); + else + a->debug("NT SysDbg returned error 0x%lx.", status); + FreeLibrary(ntdll); + ntdll = NULL; + NtSystemDebugControl = NULL; + return 0; + } + + a->debug("NT SysDbg returned Access Denied, trying again with Debug privilege..."); + + if (!LookupPrivilegeValue(NULL, SE_DEBUG_NAME, &luid_debug_privilege)) + { + a->debug("Debug privilege is not supported."); + FreeLibrary(ntdll); + ntdll = NULL; + NtSystemDebugControl = NULL; + return 0; + } + + if (!enable_privilege(luid_debug_privilege, &revert_token, &revert_only_privilege)) + { + a->debug("Cannot enable Debug privilege."); + FreeLibrary(ntdll); + ntdll = NULL; + NtSystemDebugControl = NULL; + return 0; + } + + status = win32_sysdbg_pci_bus_data(FALSE, 0, 0, 0, 0, &id, sizeof(id), &ret_len); + if ((status >= 0 && ret_len == sizeof(id)) || status == STATUS_UNSUCCESSFUL) + { + a->debug("Succeeded."); + debug_privilege_enabled = TRUE; + win32_sysdbg_initialized = 1; + return 1; + } + + revert_privilege(luid_debug_privilege, revert_token, revert_only_privilege); + revert_token = NULL;
View file
_service:tar_scm:pciutils-3.9.0.tar.gz/lib/winrsrc.rc.in
Added
@@ -0,0 +1,39 @@ +#include <windows.h> +VS_VERSION_INFO VERSIONINFO +FILEVERSION @PCILIB_VERSION_WINRC@ +PRODUCTVERSION @PCILIB_VERSION_WINRC@ +FILEFLAGSMASK VS_FFI_FILEFLAGSMASK +#if @DEBUG_BUILD@ +FILEFLAGS VS_FF_DEBUG +#else +FILEFLAGS 0 +#endif +FILEOS VOS_NT_WINDOWS32 +#if @LIBRARY_BUILD@ +FILETYPE VFT_DLL +#else +FILETYPE VFT_APP +#endif +FILESUBTYPE 0 +BEGIN + BLOCK "StringFileInfo" + BEGIN + /* + * GNU windres seems that converts 7-bit ASCII strings to UTF-16, + * so specify UNICODE/UTF-16 encoding (0x04B0) for these strings. + */ + BLOCK "040904B0" /* Default U.S. English language, UNICODE/UTF-16 codepage */ + BEGIN + VALUE "FileDescription", "@DESCRIPTION@" + VALUE "FileVersion", "@PCILIB_VERSION@" + VALUE "InternalName", "@FILENAME@" + VALUE "OriginalFilename", "@FILENAME@" + VALUE "ProductName", "pciutils" + VALUE "ProductVersion", "@PCILIB_VERSION@" + END + END + BLOCK "VarFileInfo" + BEGIN + VALUE "Translation", 0x0409, 0x04B0 /* Default U.S. English language, UNICODE/UTF-16 codepage */ + END +END
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/ls-caps.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/ls-caps.c
Changed
@@ -44,8 +44,8 @@ b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS); if (b) printf("\t\tBridge: PM%c B3%c\n", - FLAG(t, PCI_PM_BPCC_ENABLE), - FLAG(~t, PCI_PM_PPB_B2_B3)); + FLAG(b, PCI_PM_BPCC_ENABLE), + FLAG(~b, PCI_PM_PPB_B2_B3)); } static void @@ -578,7 +578,7 @@ break; offl = get_conf_long(d, where + PCI_HT_MSIM_ADDR_LO); offh = get_conf_long(d, where + PCI_HT_MSIM_ADDR_HI); - printf("\t\tMapping Address Base: %016llx\n", ((unsigned long long)offh << 32) | (offl & ~0xfffff)); + printf("\t\tMapping Address Base: %016" PCI_U64_FMT_X "\n", ((u64)offh << 32) | (offl & ~0xfffff)); } break; case PCI_HT_CMD_TYP_DR: @@ -656,10 +656,20 @@ type == PCI_EXP_TYPE_PCIE_BRIDGE; /* PCI/PCI-X to PCIe Bridge */ } -static float power_limit(int value, int scale) +static void show_power_limit(int value, int scale) { static const float scales4 = { 1.0, 0.1, 0.01, 0.001 }; - return value * scalesscale; + + if (scale == 0 && value == 0xFF) + { + printf(">600W"); + return; + } + + if (scale == 0 && value >= 0xF0 && value <= 0xFE) + value = 250 + 25 * (value - 0xF0); + + printf("%gW", value * scalesscale); } static const char *latency_l0s(int value) @@ -701,9 +711,10 @@ FLAG(t, PCI_EXP_DEVCAP_FLRESET)); if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_UPSTREAM) || (type == PCI_EXP_TYPE_PCI_BRIDGE)) - printf(" SlotPowerLimit %.3fW", - power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, - (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26)); + { + printf(" SlotPowerLimit "); + show_power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26); + } printf("\n"); w = get_conf_word(d, where + PCI_EXP_DEVCTL); @@ -751,18 +762,23 @@ return "16GT/s"; case 5: return "32GT/s"; + case 6: + return "64GT/s"; default: return "unknown"; } } -static char *link_compare(int sta, int cap) +static char *link_compare(int type, int sta, int cap) { - if (sta < cap) - return "downgraded"; if (sta > cap) - return "strange"; - return "ok"; + return " (overdriven)"; + if (sta == cap) + return ""; + if ((type == PCI_EXP_TYPE_ROOT_PORT) || (type == PCI_EXP_TYPE_DOWNSTREAM) || + (type == PCI_EXP_TYPE_PCIE_BRIDGE)) + return ""; + return " (downgraded)"; } static char *aspm_support(int code) @@ -835,11 +851,11 @@ w = get_conf_word(d, where + PCI_EXP_LNKSTA); sta_speed = w & PCI_EXP_LNKSTA_SPEED; sta_width = (w & PCI_EXP_LNKSTA_WIDTH) >> 4; - printf("\t\tLnkSta:\tSpeed %s (%s), Width x%d (%s)\n", + printf("\t\tLnkSta:\tSpeed %s%s, Width x%d%s\n", link_speed(sta_speed), - link_compare(sta_speed, cap_speed), + link_compare(type, sta_speed, cap_speed), sta_width, - link_compare(sta_width, cap_width)); + link_compare(type, sta_width, cap_width)); printf("\t\t\tTrErr%c Train%c SlotClk%c DLActive%c BWMgmt%c ABWMgmt%c\n", FLAG(w, PCI_EXP_LNKSTA_TR_ERR), FLAG(w, PCI_EXP_LNKSTA_TRAIN), @@ -869,9 +885,10 @@ FLAG(t, PCI_EXP_SLTCAP_PWRI), FLAG(t, PCI_EXP_SLTCAP_HPC), FLAG(t, PCI_EXP_SLTCAP_HPS)); - printf("\t\t\tSlot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c\n", - (t & PCI_EXP_SLTCAP_PSN) >> 19, - power_limit((t & PCI_EXP_SLTCAP_PWR_VAL) >> 7, (t & PCI_EXP_SLTCAP_PWR_SCL) >> 15), + printf("\t\t\tSlot #%d, PowerLimit ", + (t & PCI_EXP_SLTCAP_PSN) >> 19); + show_power_limit((t & PCI_EXP_SLTCAP_PWR_VAL) >> 7, (t & PCI_EXP_SLTCAP_PWR_SCL) >> 15); + printf("; Interlock%c NoCompl%c\n", FLAG(t, PCI_EXP_SLTCAP_INTERLOCK), FLAG(t, PCI_EXP_SLTCAP_NOCMDCOMP)); @@ -1066,7 +1083,7 @@ int i, found = 0; for (i=0; i<6; i++) - if (p->base_addri && p->sizei) + if (p->base_addri || p->sizei) { if (!(p->base_addri & PCI_BASE_ADDRESS_SPACE_IO)) { @@ -1085,8 +1102,8 @@ l = get_conf_long(d, where + PCI_EXP_DEVCAP2); printf("\t\tDevCap2: Completion Timeout: %s, TimeoutDis%c NROPrPrP%c LTR%c", - cap_express_dev2_timeout_range(PCI_EXP_DEV2_TIMEOUT_RANGE(l)), - FLAG(l, PCI_EXP_DEV2_TIMEOUT_DIS), + cap_express_dev2_timeout_range(PCI_EXP_DEVCAP2_TIMEOUT_RANGE(l)), + FLAG(l, PCI_EXP_DEVCAP2_TIMEOUT_DIS), FLAG(l, PCI_EXP_DEVCAP2_NROPRPRP), FLAG(l, PCI_EXP_DEVCAP2_LTR)); printf("\n\t\t\t 10BitTagComp%c 10BitTagReq%c OBFF %s, ExtFmt%c EETLPPrefix%c", @@ -1115,7 +1132,7 @@ printf(" %s", cap_express_devcap2_tphcomp(PCI_EXP_DEVCAP2_TPH_COMP(l))); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) - printf(" ARIFwd%c\n", FLAG(l, PCI_EXP_DEV2_ARI)); + printf(" ARIFwd%c\n", FLAG(l, PCI_EXP_DEVCAP2_ARI)); else printf("\n"); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_UPSTREAM || @@ -1134,13 +1151,14 @@ } w = get_conf_word(d, where + PCI_EXP_DEVCTL2); - printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c OBFF %s,", - cap_express_dev2_timeout_value(PCI_EXP_DEV2_TIMEOUT_VALUE(w)), - FLAG(w, PCI_EXP_DEV2_TIMEOUT_DIS), - FLAG(w, PCI_EXP_DEV2_LTR), - cap_express_devctl2_obff(PCI_EXP_DEV2_OBFF(w))); + printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c 10BitTagReq%c OBFF %s,", + cap_express_dev2_timeout_value(PCI_EXP_DEVCTL2_TIMEOUT_VALUE(w)), + FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS), + FLAG(w, PCI_EXP_DEVCTL2_LTR), + FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ), + cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w))); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) - printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEV2_ARI)); + printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEVCTL2_ARI)); else printf("\n"); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_UPSTREAM || @@ -1150,10 +1168,10 @@ printf("\t\t\t AtomicOpsCtl:"); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_ENDPOINT || type == PCI_EXP_TYPE_ROOT_INT_EP || type == PCI_EXP_TYPE_LEG_END) - printf(" ReqEn%c", FLAG(w, PCI_EXP_DEV2_ATOMICOP_REQUESTER_EN)); + printf(" ReqEn%c", FLAG(w, PCI_EXP_DEVCTL2_ATOMICOP_REQUESTER_EN)); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_UPSTREAM || type == PCI_EXP_TYPE_DOWNSTREAM) - printf(" EgressBlck%c", FLAG(w, PCI_EXP_DEV2_ATOMICOP_EGRESS_BLOCK)); + printf(" EgressBlck%c", FLAG(w, PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK)); printf("\n"); } } @@ -1196,6 +1214,8 @@ return "16GT/s"; case 5: return "32GT/s"; + case 6: + return "64GT/s"; default: return "Unknown"; } @@ -1214,6 +1234,35 @@ } } +static const char *cap_express_link2_compliance_preset(int type) +{ + switch (type) + { + case 0: + return "-6dB de-emphasis, 0dB preshoot"; + case 1: + return "-3.5dB de-emphasis, 0dB preshoot"; + case 2:
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/ls-ecaps.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/ls-ecaps.c
Changed
@@ -1,7 +1,7 @@ /* * The PCI Utilities -- Show Extended Capabilities * - * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz> + * Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz> * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -67,13 +67,13 @@ snoop = get_conf_word(d, where + PCI_LTR_MAX_SNOOP); scale = cap_ltr_scale((snoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK); - printf("\t\tMax snoop latency: %lldns\n", - ((unsigned long long)snoop & PCI_LTR_VALUE_MASK) * scale); + printf("\t\tMax snoop latency: %" PCI_U64_FMT_U "ns\n", + ((u64)snoop & PCI_LTR_VALUE_MASK) * scale); nosnoop = get_conf_word(d, where + PCI_LTR_MAX_NOSNOOP); scale = cap_ltr_scale((nosnoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK); - printf("\t\tMax no snoop latency: %lldns\n", - ((unsigned long long)nosnoop & PCI_LTR_VALUE_MASK) * scale); + printf("\t\tMax no snoop latency: %" PCI_U64_FMT_U "ns\n", + ((u64)nosnoop & PCI_LTR_VALUE_MASK) * scale); } static void @@ -369,13 +369,13 @@ return; l = get_conf_long(d, where + PCI_IOV_CAP); - printf("\t\tIOVCap:\tMigration%c, Interrupt Message Number: %03x\n", - FLAG(l, PCI_IOV_CAP_VFM), PCI_IOV_CAP_IMN(l)); + printf("\t\tIOVCap:\tMigration%c 10BitTagReq%c Interrupt Message Number: %03x\n", + FLAG(l, PCI_IOV_CAP_VFM), FLAG(l, PCI_IOV_CAP_VF_10BIT_TAG_REQ), PCI_IOV_CAP_IMN(l)); w = get_conf_word(d, where + PCI_IOV_CTRL); - printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c\n", + printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c 10BitTagReq%c\n", FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME), FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE), - FLAG(w, PCI_IOV_CTRL_ARI)); + FLAG(w, PCI_IOV_CTRL_ARI), FLAG(w, PCI_IOV_CTRL_VF_10BIT_TAG_REQ_EN)); w = get_conf_word(d, where + PCI_IOV_STATUS); printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS)); w = get_conf_word(d, where + PCI_IOV_INITIALVF); @@ -549,7 +549,7 @@ pat_pos = BITS(rcap, 24, 8); printf("Caps:\tPATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c\n", pat_pos, - BITS(rcap, 16, 6) + 1, + BITS(rcap, 16, 7) + 1, FLAG(rcap, 1 << 15)); printf("\t\t\tArb:"); @@ -635,30 +635,465 @@ } static void -cap_dvsec_cxl(struct device *d, int where) +cap_rcec(struct device *d, int where) { - u16 l; - - printf(": CXL\n"); + printf("Root Complex Event Collector Endpoint Association\n"); if (verbose < 2) return; - if (!config_fetch(d, where + PCI_CXL_CAP, 12)) + if (!config_fetch(d, where, 12)) + return; + + u32 hdr = get_conf_long(d, where); + byte cap_ver = PCI_RCEC_EP_CAP_VER(hdr); + u32 bmap = get_conf_long(d, where + PCI_RCEC_RCIEP_BMAP); + printf("\t\tRCiEPBitmap: "); + if (bmap) + { + int prevmatched=0; + int adjcount=0; + int prevdev=0; + printf("RCiEP at Device(s):"); + for (int dev=0; dev < 32; dev++) + { + if (BITS(bmap, dev, 1)) + { + if (!adjcount) + printf("%s %u", (prevmatched) ? "," : "", dev); + adjcount++; + prevdev=dev; + prevmatched=1; + } + else + { + if (adjcount > 1) + printf("-%u", prevdev); + adjcount=0; + } + } + } + else + printf("%s", (verbose > 2) ? "00000000 none" : "none"); + printf("\n"); + + if (cap_ver < PCI_RCEC_BUSN_REG_VER) + return; + + u32 busn = get_conf_long(d, where + PCI_RCEC_BUSN_REG); + u8 lastbusn = BITS(busn, 16, 8); + u8 nextbusn = BITS(busn, 8, 8); + + if ((lastbusn == 0x00) && (nextbusn == 0xff)) + printf("\t\tAssociatedBusNumbers: %s\n", (verbose > 2) ? "ff-00 none" : "none"); + else + printf("\t\tAssociatedBusNumbers: %02x-%02x\n", nextbusn, lastbusn ); +} + +static void +cxl_range(u64 base, u64 size, int n) +{ + u32 interleave = { 0, 256, 4096, 512, 1024, 2048, 8192, 16384 }; + const char *type = { "Volatile", "Non-volatile", "CDAT" }; + const char *class = { "DRAM", "Storage", "CDAT" }; + u16 w; + + w = (u16) size; + + size &= ~0x0fffffffULL; + + printf("\t\tRange%d: %016"PCI_U64_FMT_X"-%016"PCI_U64_FMT_X"\n", n, base, base + size - 1); + printf("\t\t\tValid%c Active%c Type=%s Class=%s interleave=%d timeout=%ds\n", + FLAG(w, PCI_CXL_RANGE_VALID), FLAG(w, PCI_CXL_RANGE_ACTIVE), + typePCI_CXL_RANGE_TYPE(w), classPCI_CXL_RANGE_CLASS(w), + interleavePCI_CXL_RANGE_INTERLEAVE(w), + 1 << (PCI_CXL_RANGE_TIMEOUT(w) * 2)); +} + +static void +dvsec_cxl_device(struct device *d, int rev, int where, int len) +{ + u32 cache_size, cache_unit_size; + u64 range_base, range_size; + u16 w; + + if (len < PCI_CXL_DEV_LEN) + return; + + /* Legacy 1.1 revs aren't handled */ + if (rev < 1) return; - l = get_conf_word(d, where + PCI_CXL_CAP); + w = get_conf_word(d, where + PCI_CXL_DEV_CAP); printf("\t\tCXLCap:\tCache%c IO%c Mem%c Mem HW Init%c HDMCount %d Viral%c\n", - FLAG(l, PCI_CXL_CAP_CACHE), FLAG(l, PCI_CXL_CAP_IO), FLAG(l, PCI_CXL_CAP_MEM), - FLAG(l, PCI_CXL_CAP_MEM_HWINIT), PCI_CXL_CAP_HDM_CNT(l), FLAG(l, PCI_CXL_CAP_VIRAL)); + FLAG(w, PCI_CXL_DEV_CAP_CACHE), FLAG(w, PCI_CXL_DEV_CAP_IO), FLAG(w, PCI_CXL_DEV_CAP_MEM), + FLAG(w, PCI_CXL_DEV_CAP_MEM_HWINIT), PCI_CXL_DEV_CAP_HDM_CNT(w), FLAG(w, PCI_CXL_DEV_CAP_VIRAL)); - l = get_conf_word(d, where + PCI_CXL_CTRL); + w = get_conf_word(d, where + PCI_CXL_DEV_CTRL); printf("\t\tCXLCtl:\tCache%c IO%c Mem%c Cache SF Cov %d Cache SF Gran %d Cache Clean%c Viral%c\n", - FLAG(l, PCI_CXL_CTRL_CACHE), FLAG(l, PCI_CXL_CTRL_IO), FLAG(l, PCI_CXL_CTRL_MEM), - PCI_CXL_CTRL_CACHE_SF_COV(l), PCI_CXL_CTRL_CACHE_SF_GRAN(l), FLAG(l, PCI_CXL_CTRL_CACHE_CLN), - FLAG(l, PCI_CXL_CTRL_VIRAL)); + FLAG(w, PCI_CXL_DEV_CTRL_CACHE), FLAG(w, PCI_CXL_DEV_CTRL_IO), FLAG(w, PCI_CXL_DEV_CTRL_MEM), + PCI_CXL_DEV_CTRL_CACHE_SF_COV(w), PCI_CXL_DEV_CTRL_CACHE_SF_GRAN(w), FLAG(w, PCI_CXL_DEV_CTRL_CACHE_CLN), + FLAG(w, PCI_CXL_DEV_CTRL_VIRAL)); + + w = get_conf_word(d, where + PCI_CXL_DEV_STATUS); + printf("\t\tCXLSta:\tViral%c\n", FLAG(w, PCI_CXL_DEV_STATUS_VIRAL)); + + w = get_conf_word(d, where + PCI_CXL_DEV_STATUS2); + printf("\t\tCXLSta2:\tResetComplete%c ResetError%c PMComplete%c\n", + FLAG(w, PCI_CXL_DEV_STATUS_RC), FLAG(w,PCI_CXL_DEV_STATUS_RE), FLAG(w, PCI_CXL_DEV_STATUS_PMC)); + + w = get_conf_word(d, where + PCI_CXL_DEV_CAP2); + cache_unit_size = BITS(w, 0, 4); + cache_size = BITS(w, 8, 8); + switch (cache_unit_size) + { + case PCI_CXL_DEV_CAP2_CACHE_1M: + printf("\t\tCache Size: %08x\n", cache_size * (1<<20)); + break; + case PCI_CXL_DEV_CAP2_CACHE_64K: + printf("\t\tCache Size: %08x\n", cache_size * (64<<10)); + break; + case PCI_CXL_DEV_CAP2_CACHE_UNK: + printf("\t\tCache Size Not Reported\n"); + break; + default: + printf("\t\tCache Size: %d of unknown unit size (%d)\n", cache_size, cache_unit_size); + break; + } + + range_size = (u64) get_conf_long(d, where + PCI_CXL_DEV_RANGE1_SIZE_HI) << 32; + range_size |= get_conf_long(d, where + PCI_CXL_DEV_RANGE1_SIZE_LO); + range_base = (u64) get_conf_long(d, where + PCI_CXL_DEV_RANGE1_BASE_HI) << 32; + range_base |= get_conf_long(d, where + PCI_CXL_DEV_RANGE1_BASE_LO); + cxl_range(range_base, range_size, 1);
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/ls-kernel.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/ls-kernel.c
Changed
@@ -8,7 +8,6 @@ #include <stdio.h> #include <string.h> -#include <unistd.h> #include "lspci.h" @@ -174,16 +173,14 @@ match_pcimap(struct device *d, struct pcimap_entry *e) { struct pci_dev *dev = d->dev; - unsigned int class = get_conf_long(d, PCI_REVISION_ID) >> 8; - word subv, subd; + unsigned int class = (((unsigned int)dev->device_class << 8) | dev->prog_if); #define MATCH(x, y) ((y) > 0xffff || (x) == (y)) - get_subid(d, &subv, &subd); return MATCH(dev->vendor_id, e->vendor) && MATCH(dev->device_id, e->device) && - MATCH(subv, e->subvendor) && - MATCH(subd, e->subdevice) && + MATCH(dev->subsys_vendor_id, e->subvendor) && + MATCH(dev->subsys_id, e->subdevice) && (class & e->class_mask) == e->class; #undef MATCH } @@ -214,40 +211,6 @@ #endif -#define DRIVER_BUF_SIZE 1024 - -static char * -find_driver(struct device *d, char *buf) -{ - struct pci_dev *dev = d->dev; - char name1024, *drv, *base; - int n; - - if (dev->access->method != PCI_ACCESS_SYS_BUS_PCI) - return NULL; - - base = pci_get_param(dev->access, "sysfs.path"); - if (!base || !base0) - return NULL; - - n = snprintf(name, sizeof(name), "%s/devices/%04x:%02x:%02x.%d/driver", - base, dev->domain, dev->bus, dev->dev, dev->func); - if (n < 0 || n >= (int)sizeof(name)) - die("show_driver: sysfs device name too long, why?"); - - n = readlink(name, buf, DRIVER_BUF_SIZE); - if (n < 0) - return NULL; - if (n >= DRIVER_BUF_SIZE) - return "<name-too-long>"; - bufn = 0; - - if (drv = strrchr(buf, '/')) - return drv+1; - else - return buf; -} - static const char * next_module_filtered(struct device *d) { @@ -270,10 +233,10 @@ void show_kernel(struct device *d) { - char bufDRIVER_BUF_SIZE; const char *driver, *module; - if (driver = find_driver(d, buf)) + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) printf("\tKernel driver in use: %s\n", driver); if (!show_kernel_init()) @@ -289,10 +252,10 @@ void show_kernel_machine(struct device *d) { - char bufDRIVER_BUF_SIZE; const char *driver, *module; - if (driver = find_driver(d, buf)) + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) printf("Driver:\t%s\n", driver); if (!show_kernel_init()) @@ -305,13 +268,23 @@ #else void -show_kernel(struct device *d UNUSED) +show_kernel(struct device *d) { + const char *driver; + + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) + printf("\tDriver in use: %s\n", driver); } void -show_kernel_machine(struct device *d UNUSED) +show_kernel_machine(struct device *d) { + const char *driver; + + pci_fill_info(d->dev, PCI_FILL_DRIVER); + if (driver = pci_get_string_property(d->dev, PCI_FILL_DRIVER)) + printf("Driver:\t%s\n", driver); } void
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/ls-map.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/ls-map.c
Changed
@@ -52,13 +52,14 @@ static void do_map_bus(int bus) { + int domain = (filter.domain >= 0 ? filter.domain : 0); int dev, func; int verbose = pacc->debugging; struct bus_info *bi = bus_info + bus; struct device *d; if (verbose) - printf("Mapping bus %02x\n", bus); + printf("Mapping bus %04x:%02x\n", domain, bus); for (dev = 0; dev < 32; dev++) if (filter.slot < 0 || filter.slot == dev) { @@ -66,15 +67,14 @@ for (func = 0; func < func_limit; func++) if (filter.func < 0 || filter.func == func) { - /* XXX: Bus mapping supports only domain 0 */ - struct pci_dev *p = pci_get_dev(pacc, 0, bus, dev, func); + struct pci_dev *p = pci_get_dev(pacc, domain, bus, dev, func); u16 vendor = pci_read_word(p, PCI_VENDOR_ID); if (vendor && vendor != 0xffff) { if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80)) func_limit = 8; if (verbose) - printf("Discovered device %02x:%02x.%d\n", bus, dev, func); + printf("Discovered device %04x:%02x:%02x.%d\n", domain, bus, dev, func); bi->exists = 1; if (d = scan_device(p)) { @@ -165,6 +165,7 @@ { if (pacc->method == PCI_ACCESS_PROC_BUS_PCI || pacc->method == PCI_ACCESS_SYS_BUS_PCI || + pacc->method == PCI_ACCESS_WIN32_CFGMGR32 || pacc->method == PCI_ACCESS_DUMP) printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n"); bus_info = xmalloc(sizeof(struct bus_info) * 256);
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/ls-tree.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/ls-tree.c
Changed
@@ -1,7 +1,7 @@ /* * The PCI Utilities -- Show Bus Tree * - * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz> + * Copyright (c) 1997--2021 Martin Mares <mj@ucw.cz> * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -12,7 +12,7 @@ #include "lspci.h" -struct bridge host_bridge = { NULL, NULL, NULL, NULL, 0, ~0, 0, ~0, NULL }; +struct bridge host_bridge = { NULL, NULL, NULL, NULL, NULL, 0, ~0, 0, ~0, NULL }; static struct bus * find_bus(struct bridge *b, unsigned int domain, unsigned int n) @@ -25,17 +25,34 @@ return bus; } +static struct device * +find_device(struct pci_dev *dd) +{ + struct device *d; + + if (!dd) + return NULL; + for (d=first_dev; d; d=d->next) + if (d->dev == dd) + break; + return d; +} + static struct bus * new_bus(struct bridge *b, unsigned int domain, unsigned int n) { struct bus *bus = xmalloc(sizeof(struct bus)); bus->domain = domain; bus->number = n; - bus->sibling = b->first_bus; + bus->sibling = NULL; bus->first_dev = NULL; bus->last_dev = &bus->first_dev; bus->parent_bridge = b; - b->first_bus = bus; + if (b->last_bus) + b->last_bus->sibling = bus; + b->last_bus = bus; + if (!b->first_bus) + b->first_bus = bus; return bus; } @@ -43,9 +60,20 @@ insert_dev(struct device *d, struct bridge *b) { struct pci_dev *p = d->dev; - struct bus *bus; + struct device *parent = NULL; + struct bus *bus = NULL; - if (! (bus = find_bus(b, p->domain, p->bus))) + if (p->known_fields & PCI_FILL_PARENT) + parent = find_device(p->parent); + + if (parent && parent->bridge) + { + bus = parent->bridge->first_bus; + if (!bus) + bus = new_bus(parent->bridge, p->domain, p->bus); + } + + if (!bus && ! (bus = find_bus(b, p->domain, p->bus))) { struct bridge *c; for (c=b->child; c; c=c->next) @@ -79,7 +107,7 @@ { struct pci_dev *dd = d->dev; word class = dd->device_class; - byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f; + byte ht = d->no_config_access ? -1 : (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f); if ((class >> 8) == PCI_BASE_CLASS_BRIDGE && (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS)) { @@ -101,6 +129,7 @@ last_br = &b->chain; b->next = b->child = NULL; b->first_bus = NULL; + b->last_bus = NULL; b->br_dev = d; d->bridge = b; pacc->debug("Tree: bridge %04x:%02x:%02x.%d: %02x -> %02x-%02x\n", @@ -108,14 +137,47 @@ b->primary, b->secondary, b->subordinate); } } + + /* Append additional bridges reported by libpci via d->parent */ + + for (d=first_dev; d; d=d->next) + { + struct device *parent = NULL; + if (d->dev->known_fields & PCI_FILL_PARENT) + parent = find_device(d->dev->parent); + if (!parent || parent->bridge) + continue; + b = xmalloc(sizeof(struct bridge)); + b->domain = parent->dev->domain; + b->primary = parent->dev->bus; + b->secondary = d->dev->bus; + /* At this stage subordinate number is unknown, so set it to secondary bus number. */ + b->subordinate = b->secondary; + *last_br = b; + last_br = &b->chain; + b->next = b->child = NULL; + b->first_bus = NULL; + b->last_bus = NULL; + b->br_dev = parent; + parent->bridge = b; + pacc->debug("Tree: bridge %04x:%02x:%02x.%d\n", b->domain, + parent->dev->bus, parent->dev->dev, parent->dev->func); + } *last_br = NULL; /* Create a bridge tree */ for (b=&host_bridge; b; b=b->chain) { - struct bridge *c, *best; - best = NULL; + struct device *br_dev = b->br_dev; + struct bridge *c, *best = NULL; + struct device *parent = NULL; + + if (br_dev && (br_dev->dev->known_fields & PCI_FILL_PARENT)) + parent = find_device(br_dev->dev->parent); + if (parent) + best = parent->bridge; + if (!best) for (c=&host_bridge; c; c=c->chain) if (c != b && (c == &host_bridge || b->domain == c->domain) && b->primary >= c->secondary && b->primary <= c->subordinate && @@ -140,12 +202,16 @@ insert_dev(d, &host_bridge); } +#define LINE_BUF_SIZE 1024 + static void print_it(char *line, char *p) { - *p++ = '\n'; *p = 0; fputs(line, stdout); + if (p >= line + LINE_BUF_SIZE - 1) + fputs("...", stdout); + putchar('\n'); for (p=line; *p; p++) if (*p == '+' || *p == '|') *p = '|'; @@ -153,25 +219,30 @@ *p = ' '; } -static void show_tree_bridge(struct bridge *, char *, char *); - -#define LINE_BUF_SIZE 1024 +static void show_tree_bridge(struct pci_filter *filter, struct bridge *, char *, char *); static char * FORMAT_CHECK(printf, 3, 4) tree_printf(char *line, char *p, char *fmt, ...) { va_list args; - char *end = line + LINE_BUF_SIZE - 2; + int space = line + LINE_BUF_SIZE - 1 - p; - if (p >= end) + if (space <= 0) return p; va_start(args, fmt); - int res = vsnprintf(p, end - p, fmt, args); + int res = vsnprintf(p, space, fmt, args); if (res < 0) { - /* Ancient C libraries return -1 on overflow */ - p += strlen(p); + /* Ancient C libraries return -1 on overflow and they do not truncate the output properly. */ + *p = 0; + p += space; + } + else if (res >= space) + { + /* Ancient C libraries do not truncate the output properly. */ + *(p+space-1) = 0; + p += space; }
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lspci.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/lspci.c
Changed
@@ -124,18 +124,18 @@ d = xmalloc(sizeof(struct device)); memset(d, 0, sizeof(*d)); d->dev = p; + d->no_config_access = p->no_config_access; d->config_cached = d->config_bufsize = 64; d->config = xmalloc(64); d->present = xmalloc(64); memset(d->present, 1, 64); - if (!pci_read_block(p, 0, d->config, 64)) + if (!d->no_config_access && !pci_read_block(p, 0, d->config, 64)) { - fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n", - p->domain, p->bus, p->dev, p->func); - seen_errors++; - return NULL; + d->no_config_access = 1; + d->config_cached = d->config_bufsize = 0; + memset(d->present, 0, 64); } - if ((d->configPCI_HEADER_TYPE & 0x7f) == PCI_HEADER_TYPE_CARDBUS) + if (!d->no_config_access && (d->configPCI_HEADER_TYPE & 0x7f) == PCI_HEADER_TYPE_CARDBUS) { /* For cardbus bridges, we need to fetch 64 bytes more to get the * full standard header... */ @@ -143,7 +143,7 @@ d->config_cached += 64; } pci_setup_cache(p, d->config, d->config_cached); - pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS); + pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS | PCI_FILL_CLASS_EXT | PCI_FILL_SUBSYS | (need_topology ? PCI_FILL_PARENT : 0)); return d; } @@ -285,25 +285,6 @@ show_slot_path(d); } -void -get_subid(struct device *d, word *subvp, word *subdp) -{ - byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f; - - if (htype == PCI_HEADER_TYPE_NORMAL) - { - *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID); - *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID); - } - else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128) - { - *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID); - *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID); - } - else - *subvp = *subdp = 0xffff; -} - static void show_terse(struct device *d) { @@ -319,12 +300,12 @@ pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id)); - if (c = get_conf_byte(d, PCI_REVISION_ID)) - printf(" (rev %02x)", c); + if ((p->known_fields & PCI_FILL_CLASS_EXT) && p->rev_id) + printf(" (rev %02x)", p->rev_id); if (verbose) { char *x; - c = get_conf_byte(d, PCI_CLASS_PROG); + c = (p->known_fields & PCI_FILL_CLASS_EXT) ? p->prog_if : 0; x = pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS, p->device_class, c); @@ -340,19 +321,18 @@ if (verbose || opt_kernel) { - word subsys_v, subsys_d; char ssnamebuf256; pci_fill_info(p, PCI_FILL_LABEL); if (p->label) printf("\tDeviceName: %s", p->label); - get_subid(d, &subsys_v, &subsys_d); - if (subsys_v && subsys_v != 0xffff) + if ((p->known_fields & PCI_FILL_SUBSYS) && + p->subsys_vendor_id && p->subsys_vendor_id != 0xffff) printf("\tSubsystem: %s\n", pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE, - p->vendor_id, p->device_id, subsys_v, subsys_d)); + p->vendor_id, p->device_id, p->subsys_vendor_id, p->subsys_id)); } } @@ -374,40 +354,60 @@ } static void -show_range(char *prefix, u64 base, u64 limit, int is_64bit) +show_range(const char *prefix, u64 base, u64 limit, int bits, int disabled) { printf("%s:", prefix); if (base <= limit || verbose > 2) - { - if (is_64bit) - printf(" %016" PCI_U64_FMT_X "-%016" PCI_U64_FMT_X, base, limit); - else - printf(" %08x-%08x", (unsigned) base, (unsigned) limit); - } - if (base <= limit) + printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit); + if (!disabled && base <= limit) show_size(limit - base + 1); else printf(" disabled"); + if (bits) + printf(" %d-bit", bits); putchar('\n'); } +static u32 +ioflg_to_pciflg(pciaddr_t ioflg) +{ + u32 flg; + + if (ioflg & PCI_IORESOURCE_IO) + flg = PCI_BASE_ADDRESS_SPACE_IO; + else if (!(ioflg & PCI_IORESOURCE_MEM)) + flg = 0; + else + { + flg = PCI_BASE_ADDRESS_SPACE_MEMORY; + if (ioflg & PCI_IORESOURCE_MEM_64) + flg |= PCI_BASE_ADDRESS_MEM_TYPE_64; + else + flg |= PCI_BASE_ADDRESS_MEM_TYPE_32; + if (ioflg & PCI_IORESOURCE_PREFETCH) + flg |= PCI_BASE_ADDRESS_MEM_PREFETCH; + } + + return flg; +} + static void -show_bases(struct device *d, int cnt) +show_bases(struct device *d, int cnt, int without_config_data) { struct pci_dev *p = d->dev; - word cmd = get_conf_word(d, PCI_COMMAND); + word cmd = without_config_data ? (PCI_COMMAND_IO | PCI_COMMAND_MEMORY) : get_conf_word(d, PCI_COMMAND); int i; - int virtual = 0; for (i=0; i<cnt; i++) { pciaddr_t pos = p->base_addri; pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->sizei : 0; pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flagsi : 0; - u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); - u32 hw_lower; + u32 flg = (p->known_fields & PCI_FILL_IO_FLAGS) ? ioflg_to_pciflg(ioflg) : without_config_data ? 0 : get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); + u32 hw_lower = 0; u32 hw_upper = 0; int broken = 0; + int virtual = 0; if (flg == 0xffffffff) flg = 0; @@ -419,31 +419,26 @@ else putchar('\t'); - /* Read address as seen by the hardware */ - if (flg & PCI_BASE_ADDRESS_SPACE_IO) - hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK; - else + /* Detect virtual regions, which are reported by the OS, but unassigned in the device */ + if ((p->known_fields & PCI_FILL_IO_FLAGS) && !without_config_data) { - hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK; - if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) + /* Read address as seen by the hardware */ + hw_lower = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); + if ((hw_lower & PCI_BASE_ADDRESS_SPACE) == (ioflg_to_pciflg(ioflg) & PCI_BASE_ADDRESS_SPACE)) { - if (i >= cnt - 1) - broken = 1; - else - { - i++; - hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i); + if ((ioflg & PCI_IORESOURCE_TYPE_BITS) == PCI_IORESOURCE_MEM && + (hw_lower & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) + { + if (i >= cnt - 1)
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lspci.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/lspci.h
Changed
@@ -39,6 +39,7 @@ struct bus *parent_bus; struct bridge *bridge; /* Cache */ + int no_config_access; unsigned int config_cached, config_bufsize; byte *config; /* Cached configuration space data */ byte *present; /* Maps which configuration bytes are present */ @@ -55,8 +56,6 @@ word get_conf_word(struct device *d, unsigned int pos); byte get_conf_byte(struct device *d, unsigned int pos); -void get_subid(struct device *d, word *subvp, word *subdp); - /* Useful macros for decoding of bits and bit fields */ #define FLAG(x,y) ((x & y) ? '+' : '-') @@ -90,7 +89,7 @@ struct bridge { struct bridge *chain; /* Single-linked list of bridges */ struct bridge *next, *child; /* Tree of bridges */ - struct bus *first_bus; /* List of buses connected to this bridge */ + struct bus *first_bus, *last_bus; /* List of buses connected to this bridge */ unsigned int domain; unsigned int primary, secondary, subordinate; /* Bus numbers */ struct device *br_dev;
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/lspci.man -> _service:tar_scm:pciutils-3.9.0.tar.gz/lspci.man
Changed
@@ -142,10 +142,10 @@ on any bus, "0.3" selects third function of device 0 on all buses and ".4" shows only the fourth function of each device. .TP -.B -d <vendor>:<device>:<class> -Show only devices with specified vendor, device and class ID. The ID's are -given in hexadecimal and may be omitted or given as "*", both meaning -"any value". +.B -d <vendor>:<device>:<class>:<prog-if> +Show only devices with specified vendor, device, class ID, and programming interface. +The ID's are given in hexadecimal and may be omitted or given as "*", both meaning +"any value". The class ID can contain "x" characters which stand for "any digit". .SS Other options .TP @@ -167,7 +167,9 @@ Invoke bus mapping mode which performs a thorough scan of all PCI devices, including those behind misconfigured bridges, etc. This option gives meaningful results only with a direct hardware access mode, which usually requires root privileges. -Please note that the bus mapper only scans PCI domain 0. +By default, the bus mapper scans domain. You can use the +.B -s +option to select a different domain. .TP .B --version Shows @@ -188,7 +190,7 @@ .TP .B -O <param>=<value> The behavior of the library is controlled by several named parameters. -This option allows to set the value of any of the parameters. Use \fB-O help\fP +This option allows one to set the value of any of the parameters. Use \fB-O help\fP for a list of known parameters and their default values. .TP .B -H1
View file
_service:tar_scm:pciutils-3.9.0.tar.gz/maint/README
Changed
(renamed from maint/RELEASE)
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/maint/tag-release -> _service:tar_scm:pciutils-3.9.0.tar.gz/maint/tag-release
Changed
@@ -3,4 +3,4 @@ echo >&2 'Usage: tag-release vX.Y.Z' exit 1 fi -git tag -u ED70F82D $1 +git tag -u 1F3D0761D9B65F0B $1
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/pci.ids -> _service:tar_scm:pciutils-3.9.0.tar.gz/pci.ids
Changed
@@ -1,8 +1,8 @@ # # List of PCI ID's # -# Version: 2020.05.29 -# Date: 2020-05-29 03:15:02 +# Version: 2022.11.19 +# Date: 2022-11-19 03:15:02 # # Maintained by Albert Pool, Martin Mares, and other volunteers from # the PCI ID Project at https://pci-ids.ucw.cz/. @@ -42,6 +42,8 @@ 7a0b SPI Controller 7a0c LPC Controller 7a0f DMA (Direct Memory Access) Controller +# Found on some boards with two sockets + 7a10 Hyper Transport Bridge Controller 7a14 EHCI USB Controller 7a15 Vivante GPU (Graphics Processing Unit) 7a19 PCI-to-PCI Bridge @@ -68,9 +70,15 @@ 018a LevelOne 0106 FPC-0106TX misprogrammed RTL81xx 01de Oxide Computer Company + 0000 Propolis NVMe Controller + 0001 Propolis xHCI Controller + 0002 Propolis PCI-PCI Bridge +# probably misprogrammed Intel Atom C2338 on Dell 0K8Y0N board +0200 Dell (wrong ID) # 021b is not Compaq but there is a board misprogrammed 021b Compaq Computer Corporation 8139 HNE-300 (RealTek RTL8139c) iPaq Networking +025e Solidigm 0270 Hauppauge computer works Inc. (Wrong ID) 0291 Davicom Semiconductor, Inc. (Wrong ID) # SpeedStream is Efficient Networks, Inc, a Siemens Company @@ -91,6 +99,44 @@ 1703 ISDN Adapter (PCI Bus, DV, W) 1704 ISDN Adapter (PCI Bus, D, C) 0721 Sapphire, Inc. +0731 Jingjia Microelectronics Co Ltd + 7200 JM7200 Series GPU + 0731 7201 JM7201 + 0731 7202 JM7202 + 0731 7208 JM7200 + 0731 7212 JM7200 + 0731 7214 JM7500 + 0731 7215 JM7200 + 9100 JM9100 + 0731 9101 JM9100 + 0731 9102 JM9100-I + 0731 9103 JM9100M + 910a JH910 + 0731 910a JH910 + 0731 910b JH910-I + 0731 910c JH910-M + 9200 JM9200 + 920a JH920 + 0731 920a JH920 + 0731 920b JH920-I + 0731 920c JH920-M + 920b JH920-I + 920c JH920-M + 9210 JM9210 + 0731 9210 JM9210 + 0731 9211 JM9210-I + 9211 JM9210-I + 9230 JM9230 + 0731 9230 JM9230 + 0731 9231 JM9230-I + 9231 JM9231-I + 9250 JM9250 + 0731 9250 JM9250 + 930a JH930-I + 0731 930a JH930-I + 0731 930b JH930-M + 0731 930c JH930 + 930b JH930-M 0777 Ubiquiti Networks, Inc. 0795 Wired Inc. 6663 Butane II (MPEG2 encoder board) @@ -114,6 +160,8 @@ 0905 R1T3 Single T3 Digital Telephony Card 0906 RCB24FXX 24-channel modular analog telephony card 0a06 RCB672FXX 672-channel modular analog telephony card +0bae Bachmann electronic GmbH +0ccd Preferred Networks, Inc. 0e11 Compaq Computer Corporation 0001 PCI to EISA Bridge 0002 PCI to ISA Bridge @@ -217,7 +265,9 @@ b1a4 NC7131 Gigabit Server Adapter b200 Memory Hot-Plug Controller b203 Integrated Lights Out Controller + 103c 3305 iLO2 b204 Integrated Lights Out Processor + 103c 3305 iLO2 c000 Remote Insight Lights-Out Edition f130 NetFlex-3/P ThunderLAN 1.0 f150 NetFlex-3/P ThunderLAN 2.3 @@ -270,6 +320,9 @@ 0013 53c875a 1000 1000 LSI53C875A PCI to Ultra SCSI Controller 0014 MegaRAID Tri-Mode SAS3516 + 1000 9460 MegaRAID 9460-16i + 1000 9480 MegaRAID 9480-8i8e + 1000 9481 MegaRAID 9480-8e 1028 1f3a PERC H745 Adapter 1028 1f3b PERC H745 Front 1028 1fd4 PERC H745P MX @@ -281,10 +334,15 @@ 8086 9460 RAID Controller RSP3TD160F 8086 9480 RAID Controller RSP3MD088F 0015 MegaRAID Tri-Mode SAS3416 + 1000 9441 MegaRAID 9440-16i 1028 1f3c PERC H345 Adapter 1028 1f3d PERC H345 Front 1d49 0503 ThinkSystem RAID 530-16i PCIe 12Gb Adapter 0016 MegaRAID Tri-Mode SAS3508 + 1000 9461 MegaRAID 9460-8i + 1000 9462 MegaRAID 9460-4i + 1000 9463 MegaRAID 9365-28i + 1000 9464 MegaRAID 9365-24i 1028 1fc9 PERC H840 Adapter 1028 1fcb PERC H740P Adapter 1028 1fcd PERC H740P Mini @@ -295,6 +353,8 @@ 8086 352f Integrated RAID Module RMSP3HD080E 8086 9461 RAID Controller RSP3DD080F 0017 MegaRAID Tri-Mode SAS3408 + 1000 9440 MegaRAID 9440-8i + 1000 9442 MegaRAID 9440-4i 1d49 0500 ThinkSystem RAID 530-8i PCIe 12Gb Adapter 1d49 0502 ThinkSystem RAID 530-8i Dense Adapter 8086 3528 Integrated RAID RMSP3LD060 @@ -424,6 +484,7 @@ 1000 9363 MegaRAID SAS 9361-4i 1000 9364 MegaRAID SAS 9364-8i 1000 936a MegaRAID SAS 9364-8i + 1000 9380 MegaRAID SAS 9380-8e 1028 1f41 PERC H830 Adapter 1028 1f42 PERC H730P Adapter 1028 1f43 PERC H730 Adapter @@ -435,6 +496,7 @@ 1028 1f4f PERC H730P Slim 1028 1f54 PERC FD33xD 1028 1fd1 PERC H730P MX + 1734 11f6 PRAID EP400i 17aa 1052 ThinkServer RAID 720i 17aa 1053 ThinkServer RAID 720ix 1bd4 0014 12G SAS3108 2G @@ -502,9 +564,11 @@ 1014 040e ServeRAID H1110 0071 MR SAS HBA 2004 0072 SAS2008 PCI-Express Fusion-MPT SAS-2 Falcon + 1000 3020 9211-8i 1000 3040 9210-8i 1000 3080 9200-8e LSI SAS 6Gb/s SAS/SATA PCIe x8 External HBA 1000 30b0 9200-8e LSI SAS 6Gb/s SAS/SATA PCIe x8 External HBA + 1014 03ca IBM 6Gb SAS HBA 9212-4i4e 1028 1f1c 6Gbps SAS HBA Adapter 1028 1f1d PERC H200 Adapter 1028 1f1e PERC H200 Integrated @@ -622,6 +686,7 @@ 1000 3050 SAS9217-8i 1000 3060 SAS9217-4i4e 1014 0472 N2125 External Host Bus Adapter + 1014 047a N2115 Internal Host Bus Adapter 1590 0041 H220i 1590 0042 H221 / 9207-8e 1590 0044 H220i @@ -665,6 +730,37 @@ 1bd4 0026 12G SAS3008IT RACK 1bd4 0027 12G SAS3008IMR RACK 1bd4 0028 12G SAS3008IR RACK + 00a5 Fusion-MPT 24GSAS/PCIe SAS40xx + 1000 4600 MegaRAID 9670W-16i Tri-Mode Storage Adapter + 1000 4610 MegaRAID 9670-24i Tri-Mode Storage Adapter + 1000 4620 MegaRAID 9660-16i Tri-Mode Storage Adapter + 1000 4630 MegaRAID 9660-8i8e Tri-Mode Storage Adapter + 1000 4640 eHBA 9600W-16i Tri-Mode Storage Adapter + 1000 4650 eHBA 9600W-16e Tri-Mode Storage Adapter + 1000 4660 eHBA 9600-24i Tri-Mode Storage Adapter + 1000 4670 eHBA 9600-16i Tri-Mode Storage Adapter + 1000 4680 eHBA 9600-16e Tri-Mode Storage Adapter + 1000 4690 MegaRAID 9620-16i Tri-Mode Storage Adapter + 1000 46a0 MegaRAID 9660-24i Tri-Mode Storage Adapter + 1000 46c0 eHBA 9680W-16e Tri-Mode Storage Adapter + 1000 46d0 eHBA 9600-8i8e Tri-Mode Storage Adapter +# eHBA 9602W-16e Tri-Mode Storage Adapter + 1000 46e0 eHBA 9602W-16e Tri-Mode Storage Adapter + 1028 2114 PERC H965i Adapter + 1028 2115 PERC H965i Front + 1028 2117 PERC H965i MX + 1028 213a PERC H965e Adapter + 1028 213b PERC H765i Adapter + 1028 213c PERC H765i Front + 1028 213d PERC H765N Front + 1028 213e PERC H765i MX + 1028 213f PERC H365i Adapter
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_service:tar_scm:pciutils-3.7.0.tar.gz/pci.ids.man -> _service:tar_scm:pciutils-3.9.0.tar.gz/pci.ids.man
Changed
@@ -83,6 +83,11 @@ To ensure extensibility of the format, lines starting with an unrecognized letter followed by a single space are ignored and so are all following TAB-indented lines. +.SH FILES +.TP +.B @IDSDIR@/@PCI_IDS@ +Location of the list. + .SH SEE ALSO .BR lspci (8), .BR update-pciids (8),
View file
_service:tar_scm:pciutils-3.9.0.tar.gz/pci.ids.old
Added
@@ -0,0 +1,35086 @@ +# +# List of PCI ID's +# +# Version: 2022.04.16 +# Date: 2022-04-16 00:17:00 +# +# Maintained by Albert Pool, Martin Mares, and other volunteers from +# the PCI ID Project at https://pci-ids.ucw.cz/. +# +# New data are always welcome, especially if they are accurate. If you have +# anything to contribute, please follow the instructions at the web site. +# +# This file can be distributed under either the GNU General Public License +# (version 2 or higher) or the 3-clause BSD License. +# +# The database is a compilation of factual data, and as such the copyright +# only covers the aggregation and formatting. The copyright is held by +# Martin Mares and Albert Pool. +# + +# Vendors, devices and subsystems. Please keep sorted. + +# Syntax: +# vendor vendor_name +# device device_name <-- single tab +# subvendor subdevice subsystem_name <-- two tabs + +0001 SafeNet (wrong ID) +0010 Allied Telesis, Inc (Wrong ID) +# This is a relabelled RTL-8139 + 8139 AT-2500TX V3 Ethernet +0014 Loongson Technology LLC + 7a00 Hyper Transport Bridge Controller + 7a02 APB (Advanced Peripheral Bus) Controller + 7a03 Gigabit Ethernet Controller + 7a04 OTG USB Controller + 7a05 Vivante GPU (Graphics Processing Unit) + 7a06 DC (Display Controller) + 7a07 HDA (High Definition Audio) Controller + 7a08 SATA AHCI Controller + 7a09 PCI-to-PCI Bridge + 7a0b SPI Controller + 7a0c LPC Controller + 7a0f DMA (Direct Memory Access) Controller +# Found on some boards with two sockets + 7a10 Hyper Transport Bridge Controller + 7a14 EHCI USB Controller + 7a15 Vivante GPU (Graphics Processing Unit) + 7a19 PCI-to-PCI Bridge + 7a24 OHCI USB Controller + 7a29 PCI-to-PCI Bridge +001c PEAK-System Technik GmbH + 0001 PCAN-PCI CAN-Bus controller + 001c 0004 2 Channel CAN Bus SJC1000 + 001c 0005 2 Channel CAN Bus SJC1000 (Optically Isolated) +003d Lockheed Martin-Marietta Corp +# Real TJN ID is e159, but they got it wrong several times --mj +0059 Tiger Jet Network Inc. (Wrong ID) +0070 Hauppauge computer works Inc. + 7801 WinTV HVR-1800 MCE +0071 Nebula Electronics Ltd. +0095 Silicon Image, Inc. (Wrong ID) + 0680 Ultra ATA/133 IDE RAID CONTROLLER CARD +# Wrong ID used in subsystem ID of the TELES.S0/PCI 2.x ISDN adapter +00a7 Teles AG (Wrong ID) +0100 nCipher Security +0123 General Dynamics +0128 Dell (wrong ID) +# 018a is not LevelOne but there is a board misprogrammed +018a LevelOne + 0106 FPC-0106TX misprogrammed RTL81xx +01de Oxide Computer Company +# probably misprogrammed Intel Atom C2338 on Dell 0K8Y0N board +0200 Dell (wrong ID) +# 021b is not Compaq but there is a board misprogrammed +021b Compaq Computer Corporation + 8139 HNE-300 (RealTek RTL8139c) iPaq Networking +0270 Hauppauge computer works Inc. (Wrong ID) +0291 Davicom Semiconductor, Inc. (Wrong ID) +# SpeedStream is Efficient Networks, Inc, a Siemens Company +02ac SpeedStream + 1012 1012 PCMCIA 10/100 Ethernet Card RTL81xx +02e0 XFX Pine Group Inc. (Wrong ID) +0303 Hewlett-Packard Company (Wrong ID) +0308 ZyXEL Communications Corporation (Wrong ID) +0315 SK-Electronics Co., Ltd. +0357 TTTech Computertechnik AG (Wrong ID) + 000a TTP-Monitoring Card V2.0 +0432 SCM Microsystems, Inc. + 0001 Pluto2 DVB-T Receiver for PCMCIA EasyWatch MobilSet +0497 Dell Inc. (wrong ID) +0675 Dynalink + 1700 IS64PH ISDN Adapter + 1702 IS64PH ISDN Adapter + 1703 ISDN Adapter (PCI Bus, DV, W) + 1704 ISDN Adapter (PCI Bus, D, C) +0721 Sapphire, Inc. +0731 Jingjia Microelectronics Co Ltd + 7200 JM7200 Series GPU + 0731 7201 JM7201 + 0731 7202 JM7202 + 0731 7208 JM7200 + 0731 7212 JM7200 + 0731 7214 JM7500 + 0731 7215 JM7200 + 9100 JM9100 + 0731 9101 JM9100 + 0731 9102 JM9100-I + 910a JH910 + 0731 910a JH910 + 0731 910b JH910-I + 0731 910c JH910-M + 9200 JM9200 + 920a JH920 + 0731 920a JH920 + 0731 920b JH920-I + 0731 920c JH920-M + 920b JH920-I + 920c JH920-M + 9210 JM9210 + 0731 9210 JM9210 + 0731 9211 JM9210-I + 9211 JM9210-I + 9230 JM9230 + 0731 9230 JM9230 + 0731 9231 JM9230-I + 9231 JM9231-I + 9250 JM9250 + 0731 9250 JM9250 + 930a JH930-I + 0731 930a JH930-I + 0731 930b JH930-M + 930b JH930-M +0777 Ubiquiti Networks, Inc. +0795 Wired Inc. + 6663 Butane II (MPEG2 encoder board) + 6666 MediaPress (MPEG2 encoder board) +07d1 D-Link System Inc +0824 T1042 Freescale +0925 VIA Technologies, Inc. (Wrong ID) +0a89 BREA Technologies Inc +0b0b Rhino Equipment Corp. + 0105 R1T1 + 0205 R4FXO + 0206 RCB4FXO 4-channel FXO analog telephony card + 0305 R4T1 + 0405 R8FXX + 0406 RCB8FXX 8-channel modular analog telephony card + 0505 R24FXX + 0506 RCB24FXS 24-Channel FXS analog telephony card + 0605 R2T1 + 0705 R24FXS + 0706 RCB24FXO 24-Channel FXO analog telephony card + 0905 R1T3 Single T3 Digital Telephony Card + 0906 RCB24FXX 24-channel modular analog telephony card + 0a06 RCB672FXX 672-channel modular analog telephony card +0ccd Preferred Networks, Inc. +0e11 Compaq Computer Corporation + 0001 PCI to EISA Bridge + 0002 PCI to ISA Bridge + 0046 Smart Array 64xx + 0e11 4091 Smart Array 6i + 0e11 409a Smart Array 641 + 0e11 409b Smart Array 642 + 0e11 409c Smart Array 6400 + 0e11 409d Smart Array 6400 EM + 0049 NC7132 Gigabit Upgrade Module + 004a NC6136 Gigabit Server Adapter + 005a Remote Insight II board - Lights-Out + 007c NC7770 1000BaseTX + 007d NC6770 1000BaseTX + 0085 NC7780 1000BaseTX + 00b1 Remote Insight II board - PCI device + 00bb NC7760 + 00ca NC7771 + 00cb NC7781 + 00cf NC7772 + 00d0 NC7782 + 00d1 NC7783 + 00e3 NC7761 + 0508 Netelligent 4/16 Token Ring + 1000 Triflex/Pentium Bridge, Model 1000 + 2000 Triflex/Pentium Bridge, Model 2000 + 3032 QVision 1280/p + 3033 QVision 1280/p + 3034 QVision 1280/p + 4000 4000 Triflex + 4040 Integrated Array + 4048 Compaq Raid LC2 + 4050 Smart Array 4200 + 4051 Smart Array 4250ES + 4058 Smart Array 431 + 4070 Smart Array 5300 + 4080 Smart Array 5i + 4082 Smart Array 532 + 4083 Smart Array 5312 + 4091 Smart Array 6i + 409a Smart Array 641 + 409b Smart Array 642
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_service:tar_scm:pciutils-3.7.0.tar.gz/pcilib.man -> _service:tar_scm:pciutils-3.9.0.tar.gz/pcilib.man
Changed
@@ -40,6 +40,20 @@ is able to address only the first 16 devices on any bus and it seems to be very unreliable in many cases. .TP +.B mmio-conf1 +Direct hardware access via Intel configuration mechanism 1 via memory-mapped I/O. +Mostly used on non-i386 platforms. Requires root privileges. Warning: This method +needs to be properly configured via the +.B mmio-conf1.addrs +parameter. +.TP +.B mmio-conf1-ext +Direct hardware access via Extended PCIe Intel configuration mechanism 1 via memory-mapped I/O. +Mostly used on non-i386 platforms. Requires root privileges. Warning: This method +needs to be properly configured via the +.B mmio-conf1-ext.addrs +parameter. +.TP .B fbsd-device The .B /dev/pci @@ -66,6 +80,48 @@ .B darwin Access method used on Mac OS X / Darwin. Must be run as root and the system must have been booted with debug=0x144. +.TP +.B win32-cfgmgr32 +Device listing on Windows systems using the Windows Configuration Manager +via cfgmgr32.dll system library. This method does not require any special +Administrator rights or privileges. Configuration Manager provides only basic +information about devices, assigned resources and device tree structure. There +is no access to the PCI configuration space but libpci provides read-only +virtual emulation based on information from Configuration Manager. Starting +with Windows 8 (NT 6.2) it is not possible to retrieve resources from 32-bit +application or library on 64-bit system. +.TP +.B win32-sysdbg +Access to the PCI configuration space via NT SysDbg interface on Windows +systems. Process needs to have Debug privilege, which local Administrators +have by default. Not available on 64-bit systems and neither on recent 32-bit +systems. Only devices from the first domain are accessible and only first +256 bytes of the PCI configuration space is accessible via this method. +.TP +.B win32-kldbg +Access to the PCI configuration space via Kernel Local Debugging Driver +kldbgdrv.sys. This driver is not part of the Windows system but is part of +the Microsoft WinDbg tool. It is required to have kldbgdrv.sys driver installed +in the system32 directory or to have windbg.exe or kd.exe binary in PATH. +kldbgdrv.sys driver has some restrictions. Process needs to have Debug privilege +and Windows system has to be booted with Debugging option. Debugging option can +be enabled by calling (takes effect after next boot): +.B bcdedit /debug on +.IP +Download links for WinDbg 6.12.2.633 standalone installer from Microsoft Windows +SDK for Windows 7 and .NET Framework 4: +.br +amd64: https://download.microsoft.com/download/A/6/A/A6AC035D-DA3F-4F0C-ADA4-37C8E5D34E3D/setup/WinSDKDebuggingTools_amd64/dbg_amd64.msi +.br +ia64: https://download.microsoft.com/download/A/6/A/A6AC035D-DA3F-4F0C-ADA4-37C8E5D34E3D/setup/WinSDKDebuggingTools_ia64/dbg_ia64.msi +.br +x86: https://download.microsoft.com/download/A/6/A/A6AC035D-DA3F-4F0C-ADA4-37C8E5D34E3D/setup/WinSDKDebuggingTools/dbg_x86.msi +.IP +Archived download links of previous WinDbg versions: +.br +https://web.archive.org/web/20110221133326/https://www.microsoft.com/whdc/devtools/debugging/installx86.mspx +.br +https://web.archive.org/web/20110214012715/https://www.microsoft.com/whdc/devtools/debugging/install64bit.mspx .SH PARAMETERS @@ -94,6 +150,21 @@ .TP .B sysfs.path Path to the sysfs device tree. +.TP +.B devmem.path +Path to the /dev/mem device. +.TP +.B mmio-conf1.addrs +Physical addresses of memory-mapped I/O ports for Intel configuration mechanism 1. +CF8 (address) and CFC (data) I/O port addresses are separated by slash and +multiple addresses for different PCI domains are separated by commas. +Format: 0xaddr1/0xdata1,0xaddr2/0xdata2,... +.TP +.B mmio-conf1-ext.addrs +Physical addresses of memory-mapped I/O ports for Extended PCIe Intel configuration mechanism 1. +It has same format as +.B mmio-conf1.addrs +parameter. .SS Parameters for resolving of ID's via DNS .TP
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_service:tar_scm:pciutils-3.7.0.tar.gz/pciutils.h -> _service:tar_scm:pciutils-3.9.0.tar.gz/pciutils.h
Changed
@@ -9,7 +9,20 @@ #include "lib/pci.h" #include "lib/sysdep.h" -#ifdef PCI_OS_WINDOWS +/* + * gcc predefines macro __MINGW32__ for all MinGW targets. + * Including some MinGW header (e.g. windef.h) defines additional + * macro __MINGW32_MAJOR_VERSION (available for all MinGW targets). + */ +#if defined(PCI_OS_WINDOWS) && defined(__MINGW32__) +#include <windef.h> +#endif + +/* + * On Windows only MinGW 3.0 and higher versions provides <getopt.h> + * header file. Older MinGW versions and MSVC do not have it. + */ +#if defined(PCI_OS_WINDOWS) && !(defined(__MINGW32_MAJOR_VERSION) && __MINGW32_MAJOR_VERSION >= 3) #include "compat/getopt.h" #else #include <unistd.h>
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_service:tar_scm:pciutils-3.7.0.tar.gz/pciutils.lsm -> _service:tar_scm:pciutils-3.9.0.tar.gz/pciutils.lsm
Changed
@@ -1,14 +1,13 @@ Begin3 Title: The PCI Utilities -Version: 3.7.0 -Entered-date: 200531 +Version: 3.9.0 +Entered-date: 221120 Description: This package contains various utilities for inspecting and setting of devices connected to the PCI bus. Keywords: kernel, pci, lspci, setpci, libpci Author: mj@ucw.cz (Martin Mares) Maintained-by: mj@ucw.cz (Martin Mares) -Primary-site: ftp.ucw.cz pub/mj/linux/pci/pciutils-3.7.0.tar.gz -Alternate-site: ftp.kernel.org pub/software/utils/pciutils/pciutils-3.7.0.tar.gz -Alternate-site: metalab.unc.edu pub/Linux/hardware/pciutils-3.7.0.tar.gz +Primary-site: ftp.ucw.cz pub/mj/linux/pci/pciutils-3.9.0.tar.gz +Alternate-site: ftp.kernel.org pub/software/utils/pciutils/pciutils-3.9.0.tar.gz Copying-policy: GPL End
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_service:tar_scm:pciutils-3.7.0.tar.gz/pciutils.spec -> _service:tar_scm:pciutils-3.9.0.tar.gz/pciutils.spec
Changed
@@ -1,5 +1,5 @@ Name: pciutils -Version: 3.7.0 +Version: 3.9.0 Release: 1 Source: http://mj.ucw.cz/download/linux/pci/%{name}-%{version}.tar.gz Copyright: GNU GPL
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_service:tar_scm:pciutils-3.7.0.tar.gz/setpci.c -> _service:tar_scm:pciutils-3.9.0.tar.gz/setpci.c
Changed
@@ -33,6 +33,8 @@ struct op *next; u16 cap_type; /* PCI_CAP_xxx or 0 */ u16 cap_id; + const char *name; + unsigned int hdr_type_mask; unsigned int addr; unsigned int width; /* Byte width of the access */ unsigned int num_values; /* Number of values to write; 0=read */ @@ -144,6 +146,13 @@ if (addr + width > 0x1000) die("%s: Access of width %d to register %04x out of range", slot, width, addr); + if (op->hdr_type_mask) + { + unsigned int hdr_type = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f; + if (hdr_type > 2 || !((1 << hdr_type) & op->hdr_type_mask)) + die("%s: Does not have register %s.", slot, op->name); + } + if (op->num_values) { for (i=0; i<op->num_values; i++) @@ -256,134 +265,136 @@ unsigned int cap; unsigned int offset; unsigned int width; + unsigned int hdr_type_mask; const char *name; }; static const struct reg_name pci_reg_names = { - { 0, 0x00, 2, "VENDOR_ID" }, - { 0, 0x02, 2, "DEVICE_ID" }, - { 0, 0x04, 2, "COMMAND" }, - { 0, 0x06, 2, "STATUS" }, - { 0, 0x08, 1, "REVISION" }, - { 0, 0x09, 1, "CLASS_PROG" }, - { 0, 0x0a, 2, "CLASS_DEVICE" }, - { 0, 0x0c, 1, "CACHE_LINE_SIZE" }, - { 0, 0x0d, 1, "LATENCY_TIMER" }, - { 0, 0x0e, 1, "HEADER_TYPE" }, - { 0, 0x0f, 1, "BIST" }, - { 0, 0x10, 4, "BASE_ADDRESS_0" }, - { 0, 0x14, 4, "BASE_ADDRESS_1" }, - { 0, 0x18, 4, "BASE_ADDRESS_2" }, - { 0, 0x1c, 4, "BASE_ADDRESS_3" }, - { 0, 0x20, 4, "BASE_ADDRESS_4" }, - { 0, 0x24, 4, "BASE_ADDRESS_5" }, - { 0, 0x28, 4, "CARDBUS_CIS" }, - { 0, 0x2c, 2, "SUBSYSTEM_VENDOR_ID" }, - { 0, 0x2e, 2, "SUBSYSTEM_ID" }, - { 0, 0x30, 4, "ROM_ADDRESS" }, - { 0, 0x3c, 1, "INTERRUPT_LINE" }, - { 0, 0x3d, 1, "INTERRUPT_PIN" }, - { 0, 0x3e, 1, "MIN_GNT" }, - { 0, 0x3f, 1, "MAX_LAT" }, - { 0, 0x18, 1, "PRIMARY_BUS" }, - { 0, 0x19, 1, "SECONDARY_BUS" }, - { 0, 0x1a, 1, "SUBORDINATE_BUS" }, - { 0, 0x1b, 1, "SEC_LATENCY_TIMER" }, - { 0, 0x1c, 1, "IO_BASE" }, - { 0, 0x1d, 1, "IO_LIMIT" }, - { 0, 0x1e, 2, "SEC_STATUS" }, - { 0, 0x20, 2, "MEMORY_BASE" }, - { 0, 0x22, 2, "MEMORY_LIMIT" }, - { 0, 0x24, 2, "PREF_MEMORY_BASE" }, - { 0, 0x26, 2, "PREF_MEMORY_LIMIT" }, - { 0, 0x28, 4, "PREF_BASE_UPPER32" }, - { 0, 0x2c, 4, "PREF_LIMIT_UPPER32" }, - { 0, 0x30, 2, "IO_BASE_UPPER16" }, - { 0, 0x32, 2, "IO_LIMIT_UPPER16" }, - { 0, 0x38, 4, "BRIDGE_ROM_ADDRESS" }, - { 0, 0x3e, 2, "BRIDGE_CONTROL" }, - { 0, 0x10, 4, "CB_CARDBUS_BASE" }, - { 0, 0x14, 2, "CB_CAPABILITIES" }, - { 0, 0x16, 2, "CB_SEC_STATUS" }, - { 0, 0x18, 1, "CB_BUS_NUMBER" }, - { 0, 0x19, 1, "CB_CARDBUS_NUMBER" }, - { 0, 0x1a, 1, "CB_SUBORDINATE_BUS" }, - { 0, 0x1b, 1, "CB_CARDBUS_LATENCY" }, - { 0, 0x1c, 4, "CB_MEMORY_BASE_0" }, - { 0, 0x20, 4, "CB_MEMORY_LIMIT_0" }, - { 0, 0x24, 4, "CB_MEMORY_BASE_1" }, - { 0, 0x28, 4, "CB_MEMORY_LIMIT_1" }, - { 0, 0x2c, 2, "CB_IO_BASE_0" }, - { 0, 0x2e, 2, "CB_IO_BASE_0_HI" }, - { 0, 0x30, 2, "CB_IO_LIMIT_0" }, - { 0, 0x32, 2, "CB_IO_LIMIT_0_HI" }, - { 0, 0x34, 2, "CB_IO_BASE_1" }, - { 0, 0x36, 2, "CB_IO_BASE_1_HI" }, - { 0, 0x38, 2, "CB_IO_LIMIT_1" }, - { 0, 0x3a, 2, "CB_IO_LIMIT_1_HI" }, - { 0, 0x40, 2, "CB_SUBSYSTEM_VENDOR_ID" }, - { 0, 0x42, 2, "CB_SUBSYSTEM_ID" }, - { 0, 0x44, 4, "CB_LEGACY_MODE_BASE" }, - { 0x10001, 0, 0, "CAP_PM" }, - { 0x10002, 0, 0, "CAP_AGP" }, - { 0x10003, 0, 0, "CAP_VPD" }, - { 0x10004, 0, 0, "CAP_SLOTID" }, - { 0x10005, 0, 0, "CAP_MSI" }, - { 0x10006, 0, 0, "CAP_CHSWP" }, - { 0x10007, 0, 0, "CAP_PCIX" }, - { 0x10008, 0, 0, "CAP_HT" }, - { 0x10009, 0, 0, "CAP_VNDR" }, - { 0x1000a, 0, 0, "CAP_DBG" }, - { 0x1000b, 0, 0, "CAP_CCRC" }, - { 0x1000c, 0, 0, "CAP_HOTPLUG" }, - { 0x1000d, 0, 0, "CAP_SSVID" }, - { 0x1000e, 0, 0, "CAP_AGP3" }, - { 0x1000f, 0, 0, "CAP_SECURE" }, - { 0x10010, 0, 0, "CAP_EXP" }, - { 0x10011, 0, 0, "CAP_MSIX" }, - { 0x10012, 0, 0, "CAP_SATA" }, - { 0x10013, 0, 0, "CAP_AF" }, - { 0x10014, 0, 0, "CAP_EA" }, - { 0x20001, 0, 0, "ECAP_AER" }, - { 0x20002, 0, 0, "ECAP_VC" }, - { 0x20003, 0, 0, "ECAP_DSN" }, - { 0x20004, 0, 0, "ECAP_PB" }, - { 0x20005, 0, 0, "ECAP_RCLINK" }, - { 0x20006, 0, 0, "ECAP_RCILINK" }, - { 0x20007, 0, 0, "ECAP_RCECOLL" }, - { 0x20008, 0, 0, "ECAP_MFVC" }, - { 0x20009, 0, 0, "ECAP_VC2" }, - { 0x2000a, 0, 0, "ECAP_RBCB" }, - { 0x2000b, 0, 0, "ECAP_VNDR" }, - { 0x2000d, 0, 0, "ECAP_ACS" }, - { 0x2000e, 0, 0, "ECAP_ARI" }, - { 0x2000f, 0, 0, "ECAP_ATS" }, - { 0x20010, 0, 0, "ECAP_SRIOV" }, - { 0x20011, 0, 0, "ECAP_MRIOV" }, - { 0x20012, 0, 0, "ECAP_MCAST" }, - { 0x20013, 0, 0, "ECAP_PRI" }, - { 0x20015, 0, 0, "ECAP_REBAR" }, - { 0x20016, 0, 0, "ECAP_DPA" }, - { 0x20017, 0, 0, "ECAP_TPH" }, - { 0x20018, 0, 0, "ECAP_LTR" }, - { 0x20019, 0, 0, "ECAP_SECPCI" }, - { 0x2001a, 0, 0, "ECAP_PMUX" }, - { 0x2001b, 0, 0, "ECAP_PASID" }, - { 0x2001c, 0, 0, "ECAP_LNR" }, - { 0x2001d, 0, 0, "ECAP_DPC" }, - { 0x2001e, 0, 0, "ECAP_L1PM" }, - { 0x2001f, 0, 0, "ECAP_PTM" }, - { 0x20020, 0, 0, "ECAP_M_PCIE" }, - { 0x20021, 0, 0, "ECAP_FRS" }, - { 0x20022, 0, 0, "ECAP_RTR" }, - { 0x20023, 0, 0, "ECAP_DVSEC" }, - { 0x20024, 0, 0, "ECAP_VF_REBAR" }, - { 0x20025, 0, 0, "ECAP_DLNK" }, - { 0x20026, 0, 0, "ECAP_16GT" }, - { 0x20027, 0, 0, "ECAP_LMR" }, - { 0x20028, 0, 0, "ECAP_HIER_ID" }, - { 0x20029, 0, 0, "ECAP_NPEM" }, - { 0, 0, 0, NULL } + { 0, 0x00, 2, 0x0, "VENDOR_ID" }, + { 0, 0x02, 2, 0x0, "DEVICE_ID" }, + { 0, 0x04, 2, 0x0, "COMMAND" }, + { 0, 0x06, 2, 0x0, "STATUS" }, + { 0, 0x08, 1, 0x0, "REVISION" }, + { 0, 0x09, 1, 0x0, "CLASS_PROG" }, + { 0, 0x0a, 2, 0x0, "CLASS_DEVICE" }, + { 0, 0x0c, 1, 0x0, "CACHE_LINE_SIZE" }, + { 0, 0x0d, 1, 0x0, "LATENCY_TIMER" }, + { 0, 0x0e, 1, 0x0, "HEADER_TYPE" }, + { 0, 0x0f, 1, 0x0, "BIST" }, + { 0, 0x10, 4, 0x3, "BASE_ADDRESS_0" }, + { 0, 0x14, 4, 0x3, "BASE_ADDRESS_1" }, + { 0, 0x18, 4, 0x1, "BASE_ADDRESS_2" }, + { 0, 0x1c, 4, 0x1, "BASE_ADDRESS_3" }, + { 0, 0x20, 4, 0x1, "BASE_ADDRESS_4" }, + { 0, 0x24, 4, 0x1, "BASE_ADDRESS_5" }, + { 0, 0x28, 4, 0x1, "CARDBUS_CIS" }, + { 0, 0x2c, 2, 0x1, "SUBSYSTEM_VENDOR_ID" }, + { 0, 0x2e, 2, 0x1, "SUBSYSTEM_ID" }, + { 0, 0x30, 4, 0x1, "ROM_ADDRESS" }, + { 0, 0x34, 1, 0x3, "CAPABILITIES" }, + { 0, 0x3c, 1, 0x3, "INTERRUPT_LINE" }, + { 0, 0x3d, 1, 0x3, "INTERRUPT_PIN" }, + { 0, 0x3e, 1, 0x1, "MIN_GNT" }, + { 0, 0x3f, 1, 0x1, "MAX_LAT" }, + { 0, 0x18, 1, 0x2, "PRIMARY_BUS" }, + { 0, 0x19, 1, 0x2, "SECONDARY_BUS" }, + { 0, 0x1a, 1, 0x2, "SUBORDINATE_BUS" }, + { 0, 0x1b, 1, 0x2, "SEC_LATENCY_TIMER" }, + { 0, 0x1c, 1, 0x2, "IO_BASE" }, + { 0, 0x1d, 1, 0x2, "IO_LIMIT" }, + { 0, 0x1e, 2, 0x2, "SEC_STATUS" }, + { 0, 0x20, 2, 0x2, "MEMORY_BASE" }, + { 0, 0x22, 2, 0x2, "MEMORY_LIMIT" }, + { 0, 0x24, 2, 0x2, "PREF_MEMORY_BASE" }, + { 0, 0x26, 2, 0x2, "PREF_MEMORY_LIMIT" }, + { 0, 0x28, 4, 0x2, "PREF_BASE_UPPER32" }, + { 0, 0x2c, 4, 0x2, "PREF_LIMIT_UPPER32" }, + { 0, 0x30, 2, 0x2, "IO_BASE_UPPER16" }, + { 0, 0x32, 2, 0x2, "IO_LIMIT_UPPER16" }, + { 0, 0x38, 4, 0x2, "BRIDGE_ROM_ADDRESS" }, + { 0, 0x3e, 2, 0x2, "BRIDGE_CONTROL" }, + { 0, 0x10, 4, 0x4, "CB_CARDBUS_BASE" },
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_service:tar_scm:pciutils-3.7.0.tar.gz/setpci.man -> _service:tar_scm:pciutils-3.9.0.tar.gz/setpci.man
Changed
@@ -78,7 +78,7 @@ .TP .B -O <param>=<value> The behavior of the library is controlled by several named parameters. -This option allows to set the value of any of the parameters. Use \fB-O help\fP +This option allows one to set the value of any of the parameters. Use \fB-O help\fP for a list of known parameters and their default values. .TP .B -H1 @@ -106,9 +106,10 @@ on any bus, "0.3" selects third function of device 0 on all buses and ".4" matches only the fourth function of each device. .TP -.B -d <vendor>:<device> -Select devices with specified vendor and device ID. Both ID's are given in -hexadecimal and may be omitted or given as "*", both meaning "any value". +.B -d <vendor>:<device>:<class>:<prog-if> +Select devices with specified vendor, device, class ID, and programming interface. +The ID's are given in hexadecimal and may be omitted or given as "*", both meaning +"any value". The class ID can contain "x" characters which stand for "any digit". .PP When .B -s
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_service:tar_scm:pciutils-3.9.0.tar.gz/tests/cap-doe
Added
@@ -0,0 +1,302 @@ +df:00.0 Class 0502: Device 8086:0d93 (rev 01) (prog-if 10) + Subsystem: Device 1af4:1100 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin ? routed to IRQ 255 + Region 0: Memory at 10800000 (64-bit, non-prefetchable) disabled + Region 2: Memory at 10810000 (64-bit, non-prefetchable) disabled + Region 4: Memory at 10811000 (32-bit, non-prefetchable) disabled + Capabilities: 40 MSI-X: Enable- Count=2 Masked- + Vector table: BAR=4 offset=00000000 + PBA: BAR=4 offset=00000800 + Capabilities: 80 Express (v2) Endpoint, MSI 00 + DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0W + DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend- + LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s, Exit Latency L0s <64ns + ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp- + LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s (ok), Width x1 (ok) + TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- + DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR- + 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt+ EETLPPrefix+, MaxEETLPPrefixes 4 + EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit- + FRS- TPHComp- ExtTPHComp- + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- 10BitTagReq- OBFF Disabled, + AtomicOpsCtl: ReqEn- + LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis- + Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- + Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot + LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1- + EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest- + Retimer- 2Retimers- CrosslinkRes: unsupported + Capabilities: 100 v1 Data Object Exchange + DOECap: IntSup+ + Interrupt Message Number 001 + DOECtl: IntEn+ + DOESta: Busy- IntSta- Error- ObjectReady+ + Capabilities: 130 v1 Data Object Exchange + DOECap: IntSup- + DOECtl: IntEn- + DOESta: Busy- IntSta- Error- ObjectReady- +00: 86 80 93 0d 00 00 10 00 01 10 02 05 00 00 00 00 +10: 04 00 80 10 00 00 00 00 04 00 81 10 00 00 00 00 +20: 00 10 81 10 00 00 00 00 00 00 00 00 f4 1a 00 11 +30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 00 00 +40: 11 80 01 00 04 00 00 00 04 08 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 10 00 02 00 00 80 00 00 00 00 00 00 11 04 00 00 +90: 00 00 11 00 00 00 00 00 00 00 00 00 00 00 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View file
_service:tar_scm:pciutils-3.7.0.tar.gz/tests/cap-dvsec-cxl -> _service:tar_scm:pciutils-3.9.0.tar.gz/tests/cap-dvsec-cxl
Changed
@@ -79,8 +79,8 @@ PTMControl: Enabled:- RootSelected:- PTMEffectiveGranularity: Unknown Capabilities: b80 v1 Single Root I/O Virtualization (SR-IOV) - IOVCap: Migration-, Interrupt Message Number: 000 - IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy- + IOVCap: Migration- 10BitTagReq- Interrupt Message Number: 000 + IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy- 10BitTagReq- IOVSta: Migration- Initial VFs: 6, Total VFs: 6, Number of VFs: 0, Function Dependency Link: 00 VF offset: 16, stride: 2, Device ID: 0d52 @@ -351,3 +351,261 @@ fd0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fe0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +7f:00.0 CXL: Xilinx Corporation Device c084 (rev 70) (prog-if 10 CXL Memory Device (CXL 2.x)) +00: ee 10 84 c0 02 00 10 00 70 10 02 05 10 00 00 00 +10: 0c 00 00 b0 80 03 00 00 0c 00 10 b0 80 03 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 ee 10 84 c0 +30: 00 00 00 00 80 00 00 00 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00 00 00 00 00 00 00 00 00 00 00 00 00 +ab0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ac0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ad0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +ae0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +af0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +b60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/tests/cap-ea-1 -> _service:tar_scm:pciutils-3.9.0.tar.gz/tests/cap-ea-1
Changed
@@ -57,8 +57,8 @@ ARICtl: MFVC- ACS-, Function Group: 0 Capabilities: 108 v1 Vendor Specific Information: ID=00a0 Rev=1 Len=040 <?> Capabilities: 180 v1 Single Root I/O Virtualization (SR-IOV) - IOVCap: Migration-, Interrupt Message Number: 000 - IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+ + IOVCap: Migration- 10BitTagReq- Interrupt Message Number: 000 + IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+ 10BitTagReq- IOVSta: Migration- Initial VFs: 128, Total VFs: 128, Number of VFs: 128, Function Dependency Link: 00 VF offset: 1, stride: 1, Device ID: a034
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/tests/cap-pcie-2 -> _service:tar_scm:pciutils-3.9.0.tar.gz/tests/cap-pcie-2
Changed
@@ -48,8 +48,8 @@ ARICap: MFVC- ACS-, Next Function: 1 ARICtl: MFVC- ACS-, Function Group: 0 Capabilities: 160 Single Root I/O Virtualization (SR-IOV) - IOVCap: Migration-, Interrupt Message Number: 000 - IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy- + IOVCap: Migration- 10BitTagReq- Interrupt Message Number: 000 + IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy- 10BitTagReq- IOVSta: Migration- Initial VFs: 8, Total VFs: 8, Number of VFs: 1, Function Dependency Link: 00 VF offset: 384, stride: 2, Device ID: 10ca
View file
_service:tar_scm:pciutils-3.9.0.tar.gz/tests/cap-rcec
Added
@@ -0,0 +1,299 @@ +6a:00.4 Generic system peripheral 0807: Intel Corporation Device 0b23 + Subsystem: Intel Corporation Device 0000 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- + Interrupt: pin A routed to IRQ 255 + NUMA node: 0 + Capabilities: 40 Express (v2) Root Complex Event Collector, MSI 00 + DevCap: MaxPayload 512 bytes, PhantFunc 0 + ExtTag- RBE- + DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- + MaxPayload 128 bytes, MaxReadReq 128 bytes + DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend- + RootCap: CRSVisible- + RootCtl: ErrCorrectable+ ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible- + RootSta: PME ReqID 0000, PMEStatus- PMEPending- + DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR- + 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix- + EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit- + FRS- + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled, + Capabilities: 80 Power Management version 3 + Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: 90 MSI: Enable- Count=1/1 Maskable+ 64bit- + Address: 00000000 Data: 0000 + Masking: 00000000 Pending: 00000000 + Capabilities: 100 v1 Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- + UESvrt: DLP+ SDES- TLP+ FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ + AERCap: First Error Pointer: 00, ECRCGenCap- ECRCGenEn- ECRCChkCap- ECRCChkEn- + MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap- + HeaderLog: 00000000 00000000 00000000 00000000 + RootCmd: CERptEn- NFERptEn- FERptEn- + RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd- + FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0 + ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000 + Capabilities: 160 v2 Root Complex Event Collector Endpoint Association + RCiEPBitmap: RCiEP at Device(s): 1, 6, 8-10, 12, 15 + AssociatedBusNumbers: 02-08 +00: 86 80 23 0b 00 01 10 00 00 00 07 08 00 00 00 00 +10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00 +40: 10 80 a2 00 02 00 00 00 07 00 00 00 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 07 00 00 00 +60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +80: 01 90 03 00 00 00 00 00 00 00 00 00 00 00 00 00 +90: 05 00 00 01 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View file
_service:tar_scm:pciutils-3.7.0.tar.gz/update-pciids.man -> _service:tar_scm:pciutils-3.9.0.tar.gz/update-pciids.man
Changed
@@ -22,12 +22,17 @@ .SH FILES .TP -.B @IDSDIR@/pci.ids +.B @IDSDIR@/@PCI_IDS@ Here we install the new list. .SH SEE ALSO .BR lspci (8), -.BR setpci (8) +.BR pci.ids (5), +.BR curl (1), +.BR wget (1), +.BR lynx (1), +.BR gzip (1), +.BR bzip2 (1) .SH AUTHOR The PCI Utilities are maintained by Martin Mares <mj@ucw.cz>.
View file
_service:tar_scm:pciutils-3.7.0.tar.gz/update-pciids.sh -> _service:tar_scm:pciutils-3.9.0.tar.gz/update-pciids.sh
Changed
@@ -1,13 +1,14 @@ #!/bin/sh - "$1" = "-q" && quiet=true || quiet=false - set -e + SRC="https://pci-ids.ucw.cz/v2.2/pci.ids" DEST=pci.ids PCI_COMPRESSED_IDS= GREP=grep + "$1" = "-q" && quiet=true || quiet=false + # if pci.ids is read-only (because the filesystem is read-only), # then just skip this whole process. if ! touch ${DEST} >/dev/null 2>&1 ; then @@ -31,7 +32,7 @@ if which curl >/dev/null 2>&1 ; then DL="curl -o $DEST.new $SRC" - ${quiet} && DL="$DL -s -S" + ${quiet} && DL="$DL -s -S" elif which wget >/dev/null 2>&1 ; then DL="wget --no-timestamping -O $DEST.new $SRC" ${quiet} && DL="$DL -q" @@ -59,7 +60,7 @@ fi if -f $DEST ; then - mv $DEST $DEST.old + ln -f $DEST $DEST.old # --reference is supported only by chmod from GNU file, so let's ignore any errors chmod -f --reference=$DEST.old $DEST.neww 2>/dev/null || true fi
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