File _service:obs_scm:0016-eal-introduce-more-macros... of Package dpdk

File _service:obs_scm:0016-eal-introduce-more-macros-for-bit-definition.patch of Package dpdk

From 8ff07d4203a07fadbae3b9cac3e0f6301d85b022 Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Fri, 26 Jan 2024 06:10:06 +0000
Subject: [PATCH 16/30] eal: introduce more macros for bit definition

[ upstream commit 1d8f2285ed3ffc3dfbf0857a960915c0e8ef6a8d ]

Introduce macros:
1. RTE_SHIFT_VAL64: get the uint64_t value which shifted by nr.
2. RTE_SHIFT_VAL32: get the uint32_t value which shifted by nr.
3. RTE_GENMASK64: generate a contiguous 64bit bitmask starting at bit
                  position low and ending at position high.
4. RTE_GENMASK32: generate a contiguous 32bit bitmask starting at bit
                  position low and ending at position high.
5. RTE_FIELD_GET64: extract a 64bit field element.
6. RTE_FIELD_GET32: extract a 32bit field element.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/eal/include/rte_bitops.h | 66 ++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/lib/eal/include/rte_bitops.h b/lib/eal/include/rte_bitops.h
index 6bd8bae..449565e 100644
--- a/lib/eal/include/rte_bitops.h
+++ b/lib/eal/include/rte_bitops.h
@@ -39,6 +39,72 @@ extern "C" {
  */
 #define RTE_BIT32(nr) (UINT32_C(1) << (nr))
 
+/**
+ * Get the uint32_t shifted value.
+ *
+ * @param val
+ *   The value to be shifted.
+ * @param nr
+ *   The shift number in range of 0 to (32 - width of val).
+ */
+#define RTE_SHIFT_VAL32(val, nr) (UINT32_C(val) << (nr))
+
+/**
+ * Get the uint64_t shifted value.
+ *
+ * @param val
+ *   The value to be shifted.
+ * @param nr
+ *   The shift number in range of 0 to (64 - width of val).
+ */
+#define RTE_SHIFT_VAL64(val, nr) (UINT64_C(val) << (nr))
+
+/**
+ * Generate a contiguous 32-bit mask
+ * starting at bit position low and ending at position high.
+ *
+ * @param high
+ *   High bit position.
+ * @param low
+ *   Low bit position.
+ */
+#define RTE_GENMASK32(high, low) \
+		(((~UINT32_C(0)) << (low)) & (~UINT32_C(0) >> (31u - (high))))
+
+/**
+ * Generate a contiguous 64-bit mask
+ * starting at bit position low and ending at position high.
+ *
+ * @param high
+ *   High bit position.
+ * @param low
+ *   Low bit position.
+ */
+#define RTE_GENMASK64(high, low) \
+		(((~UINT64_C(0)) << (low)) & (~UINT64_C(0) >> (63u - (high))))
+
+/**
+ * Extract a 32-bit field element.
+ *
+ * @param mask
+ *   Shifted mask.
+ * @param reg
+ *   Value of entire bitfield.
+ */
+#define RTE_FIELD_GET32(mask, reg) \
+		((typeof(mask))(((reg) & (mask)) >> rte_ctz32(mask)))
+
+/**
+ * Extract a 64-bit field element.
+ *
+ * @param mask
+ *   Shifted mask.
+ * @param reg
+ *   Value of entire bitfield.
+ */
+#define RTE_FIELD_GET64(mask, reg) \
+		((typeof(mask))(((reg) & (mask)) >> rte_ctz64(mask)))
+
 /*------------------------ 32-bit relaxed operations ------------------------*/
 
 /**
-- 
2.33.0