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File _service:tar_scm:LoongArch-Provide-fmin-fmax-RTL-pattern.patch of Package gcc
From b065c84206cdf463a377ca28f719dae7acbed0f7 Mon Sep 17 00:00:00 2001 From: Xi Ruoyao <xry111@xry111.site> Date: Tue, 16 Aug 2022 15:34:36 +0800 Subject: [PATCH 009/124] LoongArch: Provide fmin/fmax RTL pattern We already had smin/smax RTL pattern using fmin/fmax instruction. But for smin/smax, it's unspecified what will happen if either operand is NaN. So we would generate calls to libc fmin/fmax functions with -fno-finite-math-only (the default for all optimization levels expect -Ofast). But, LoongArch fmin/fmax instruction is IEEE-754-2008 conformant so we can also use the instruction for fmin/fmax pattern and avoid the library function call. gcc/ChangeLog: * config/loongarch/loongarch.md (fmax<mode>3): New RTL pattern. (fmin<mode>3): Likewise. gcc/testsuite/ChangeLog: * gcc.target/loongarch/fmax-fmin.c: New test. Signed-off-by: Peng Fan <fanpeng@loongson.cn> Signed-off-by: ticat_fp <fanpeng@loongson.cn> --- gcc/config/loongarch/loongarch.md | 18 +++++++++++ .../gcc.target/loongarch/fmax-fmin.c | 30 +++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 gcc/testsuite/gcc.target/loongarch/fmax-fmin.c diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 6b6df22a5..8e8868de9 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -1023,6 +1023,24 @@ [(set_attr "type" "fmove") (set_attr "mode" "<MODE>")]) +(define_insn "fmax<mode>3" + [(set (match_operand:ANYF 0 "register_operand" "=f") + (smax:ANYF (match_operand:ANYF 1 "register_operand" "f") + (match_operand:ANYF 2 "register_operand" "f")))] + "" + "fmax.<fmt>\t%0,%1,%2" + [(set_attr "type" "fmove") + (set_attr "mode" "<MODE>")]) + +(define_insn "fmin<mode>3" + [(set (match_operand:ANYF 0 "register_operand" "=f") + (smin:ANYF (match_operand:ANYF 1 "register_operand" "f") + (match_operand:ANYF 2 "register_operand" "f")))] + "" + "fmin.<fmt>\t%0,%1,%2" + [(set_attr "type" "fmove") + (set_attr "mode" "<MODE>")]) + (define_insn "smaxa<mode>3" [(set (match_operand:ANYF 0 "register_operand" "=f") (if_then_else:ANYF diff --git a/gcc/testsuite/gcc.target/loongarch/fmax-fmin.c b/gcc/testsuite/gcc.target/loongarch/fmax-fmin.c new file mode 100644 index 000000000..92cf8a150 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/fmax-fmin.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mdouble-float -fno-finite-math-only" } */ +/* { dg-final { scan-assembler "fmin\\.s" } } */ +/* { dg-final { scan-assembler "fmin\\.d" } } */ +/* { dg-final { scan-assembler "fmax\\.s" } } */ +/* { dg-final { scan-assembler "fmax\\.d" } } */ + +double +_fmax(double a, double b) +{ + return __builtin_fmax(a, b); +} + +float +_fmaxf(float a, float b) +{ + return __builtin_fmaxf(a, b); +} + +double +_fmin(double a, double b) +{ + return __builtin_fmin(a, b); +} + +float +_fminf(float a, float b) +{ + return __builtin_fminf(a, b); +} -- 2.33.0
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